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[/] [rs232_interface/] [trunk/] [uart.vhd] - Diff between revs 3 and 5
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| Rev 3 |
Rev 5 |
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Line 13... |
CLK_FREQ : integer := 50; -- Main frequency (MHz)
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CLK_FREQ : integer := 50; -- Main frequency (MHz)
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SER_FREQ : integer := 9600 -- Baud rate (bps)
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SER_FREQ : integer := 9600 -- Baud rate (bps)
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);
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);
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port (
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port (
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-- Control
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-- Control
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clk : in std_logic;
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clk : in std_logic; -- Main clock
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rst : in std_logic;
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rst : in std_logic; -- Main reset
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-- External Interface
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-- External Interface
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rx : in std_logic;
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rx : in std_logic; -- RS232 received serial data
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tx : out std_logic;
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tx : out std_logic; -- RS232 transmitted serial data
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-- uPC Interface
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-- uPC Interface
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tx_req : in std_logic;
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tx_req : in std_logic; -- Request SEND of data
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tx_end : out std_logic;
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tx_end : out std_logic; -- Data SENDED
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tx_data : in std_logic_vector(7 downto 0);
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tx_data : in std_logic_vector(7 downto 0); -- Data to transmit
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rx_ready : out std_logic;
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rx_ready : out std_logic; -- Received data ready to uPC read
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rx_data : out std_logic_vector(7 downto 0)
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rx_data : out std_logic_vector(7 downto 0) -- Received data
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);
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);
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end uart;
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end uart;
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architecture Behavioral of uart is
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architecture Behavioral of uart is
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