| Line 117... |
Line 117... |
signal count, next_count : std_logic_vector(7 downto 0);
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signal count, next_count : std_logic_vector(7 downto 0);
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--seņal para escribir el loopback en la fifo de entrada de feedback
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--seņal para escribir el loopback en la fifo de entrada de feedback
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signal wr_fifofeed : std_logic;
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signal wr_fifofeed : std_logic;
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type state_type is (wait_start, process_data, dump_feed);
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type state_type is (rst_fifos,wait_start, process_data, dump_feed);
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signal state, next_state : state_type;
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signal state, next_state : state_type;
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signal reg_busy : std_logic;
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signal reg_busy : std_logic;
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signal reset_fifos : std_logic;
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signal reset_fifos : std_logic;
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signal count_feedback, next_count_feedback : std_logic_vector(15 downto 0);
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signal count_feedback, next_count_feedback : std_logic_vector(15 downto 0);
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| Line 307... |
Line 307... |
end loop;
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end loop;
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case state is
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case state is
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--Esperamos a que tengamos un input y vamos cargando las b's
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--Esperamos a que tengamos un input y vamos cargando las b's
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when wait_start =>
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when wait_start =>
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reset_fifos <= '1';
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--reset_fifos <= '1';
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if(valid_in = '1') then
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if(valid_in = '1') then
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reset_fifos <= '0';
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reset_fifos <= '0';
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--next_b_reg(0) <= b;
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--next_b_reg(0) <= b;
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next_state <= process_data;
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next_state <= process_data;
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--wr_en <= '1';
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--wr_en <= '1';
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| Line 357... |
Line 357... |
end if;
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end if;
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if(count_feedback = x"22") then
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if(count_feedback = x"22") then
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read_fifo_feedback <= '0';
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read_fifo_feedback <= '0';
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next_state <= process_data;
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next_state <= process_data;
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end if;
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end if;
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when rst_fifos =>
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next_state <= wait_start;
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reset_fifos <= '1';
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end case;
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end case;
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end process;
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end process;
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end Behavioral;
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end Behavioral;
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