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[/] [rtc/] [trunk/] [rtl/] [verilog/] [rtc_defines.v] - Diff between revs 15 and 18

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Rev 15 Rev 18
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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.1  2001/09/18 22:55:39  lampret
 
// Changed rtc into rtc_top. Changed defines.v into rtc_defines.v. Fixed a bug with two defines for alarms.
 
//
// Revision 1.1  2001/08/21 12:53:11  lampret
// Revision 1.1  2001/08/21 12:53:11  lampret
// Changed directory structure, uniquified defines and changed design's port names.
// Changed directory structure, uniquified defines and changed design's port names.
//
//
// Revision 1.2  2001/07/16 01:08:45  lampret
// Revision 1.2  2001/07/16 01:08:45  lampret
// Added additional parameters to make RTL more configurable. Added bunch of comments to defines.v
// Added additional parameters to make RTL more configurable. Added bunch of comments to defines.v
//
//
// Revision 1.1  2001/06/05 07:45:43  lampret
// Revision 1.1  2001/06/05 07:45:43  lampret
// Added initial RTL and test benches. There are still some issues with these files.
// Added initial RTL and test benches. There are still some issues with these files.
//
//
//
//
 
 
//
//
// Undefine this one if you don't want to remove RTC block from your design
// Undefine this one if you don't want to remove RTC block from your design
// but you also don't need it. When it is undefined, all RTC ports still
// but you also don't need it. When it is undefined, all RTC ports still
// remain valid and the core can be synthesized however internally there is
// remain valid and the core can be synthesized however internally there is
// no RTC funationality.
// no RTC funationality.

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