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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [byte_jmp_ind.v] - Diff between revs 10 and 21

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Rev 10 Rev 21
Line 45... Line 45...
                radr <= radr34p1[33:2];
                radr <= radr34p1[33:2];
                radr2LSB <= radr34p1[1:0];
                radr2LSB <= radr34p1[1:0];
                pc[7:0] <= dati;
                pc[7:0] <= dati;
                state <= BYTE_JMP_IND3;
                state <= BYTE_JMP_IND3;
        end
        end
 
        else if (err_i) begin
 
                lock_o <= 1'b0;
 
                cyc_o <= 1'b0;
 
                stb_o <= 1'b0;
 
                we_o <= 1'b0;
 
                sel_o <= 4'h0;
 
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
 
                state <= BUS_ERROR;
 
        end
BYTE_JMP_IND3:
BYTE_JMP_IND3:
        if (unCachedData) begin
        if (unCachedData) begin
                cyc_o <= 1'b1;
                cyc_o <= 1'b1;
                stb_o <= 1'b1;
                stb_o <= 1'b1;
                sel_o <= 4'hF;
                sel_o <= 4'hF;
Line 68... Line 78...
                sel_o <= 4'h0;
                sel_o <= 4'h0;
                adr_o <= 34'd0;
                adr_o <= 34'd0;
                pc[15:8] <= dati;
                pc[15:8] <= dati;
                state <= IFETCH;
                state <= IFETCH;
        end
        end
 
        else if (err_i) begin
 
                lock_o <= 1'b0;
 
                cyc_o <= 1'b0;
 
                stb_o <= 1'b0;
 
                we_o <= 1'b0;
 
                sel_o <= 4'h0;
 
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
 
                state <= BUS_ERROR;
 
        end
 
 
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