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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [byte_jsl.v] - Diff between revs 21 and 23

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Rev 21 Rev 23
Line 41... Line 41...
                lock_o <= 1'b0;
                lock_o <= 1'b0;
                cyc_o <= 1'b0;
                cyc_o <= 1'b0;
                stb_o <= 1'b0;
                stb_o <= 1'b0;
                we_o <= 1'b0;
                we_o <= 1'b0;
                sel_o <= 4'h0;
                sel_o <= 4'h0;
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
                dat_o <= 32'h0;
                state <= BUS_ERROR;
                state <= BUS_ERROR;
        end
        end
BYTE_JSL2:
BYTE_JSL2:
        begin
        begin
Line 89... Line 88...
                lock_o <= 1'b0;
                lock_o <= 1'b0;
                cyc_o <= 1'b0;
                cyc_o <= 1'b0;
                stb_o <= 1'b0;
                stb_o <= 1'b0;
                we_o <= 1'b0;
                we_o <= 1'b0;
                sel_o <= 4'h0;
                sel_o <= 4'h0;
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
                dat_o <= 32'h0;
                state <= BUS_ERROR;
                state <= BUS_ERROR;
        end
        end
BYTE_JSL4:
BYTE_JSL4:
        begin
        begin
Line 137... Line 135...
                lock_o <= 1'b0;
                lock_o <= 1'b0;
                cyc_o <= 1'b0;
                cyc_o <= 1'b0;
                stb_o <= 1'b0;
                stb_o <= 1'b0;
                we_o <= 1'b0;
                we_o <= 1'b0;
                sel_o <= 4'h0;
                sel_o <= 4'h0;
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
                dat_o <= 32'h0;
                state <= BUS_ERROR;
                state <= BUS_ERROR;
        end
        end
BYTE_JSL6:
BYTE_JSL6:
        begin
        begin
Line 186... Line 183...
                lock_o <= 1'b0;
                lock_o <= 1'b0;
                cyc_o <= 1'b0;
                cyc_o <= 1'b0;
                stb_o <= 1'b0;
                stb_o <= 1'b0;
                we_o <= 1'b0;
                we_o <= 1'b0;
                sel_o <= 4'h0;
                sel_o <= 4'h0;
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
                dat_o <= 32'h0;
                state <= BUS_ERROR;
                state <= BUS_ERROR;
        end
        end
 
 
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