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Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [byte_jsr.v] - Diff between revs 20 and 21

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Rev 20	Rev 21
Line 35...	Line 35...
`else if (write_allocate) begin`	`else if (write_allocate) begin`
`state <= WAIT_DHIT;`	`state <= WAIT_DHIT;`
dmiss <= `TRUE;	dmiss <= `TRUE;
`end`	`end`
`end`	`end`
	`else if (err_i) begin`
	`lock_o <= 1'b0;`
	`cyc_o <= 1'b0;`
	`stb_o <= 1'b0;`
	`we_o <= 1'b0;`
	`sel_o <= 4'h0;`
	`adr_o <= 34'h0;`
	`dat_o <= 32'h0;`
	`state <= BUS_ERROR;`
	`end`
`BYTE_JSR2:`	`BYTE_JSR2:`
`begin`	`begin`
`radr <= {spage[31:8],sp[7:2]};`	`radr <= {spage[31:8],sp[7:2]};`
`wadr <= {spage[31:8],sp[7:2]};`	`wadr <= {spage[31:8],sp[7:2]};`
`radr2LSB <= sp[1:0];`	`radr2LSB <= sp[1:0];`
Line 74...	Line 84...
`else if (write_allocate) begin`	`else if (write_allocate) begin`
`state <= WAIT_DHIT;`	`state <= WAIT_DHIT;`
dmiss <= `TRUE;	dmiss <= `TRUE;
`end`	`end`
`end`	`end`
	`else if (err_i) begin`
	`lock_o <= 1'b0;`
	`cyc_o <= 1'b0;`
	`stb_o <= 1'b0;`
	`we_o <= 1'b0;`
	`sel_o <= 4'h0;`
	`adr_o <= 34'h0;`
	`dat_o <= 32'h0;`
	`state <= BUS_ERROR;`
	`end`

`BYTE_JSR_INDX1:`	`BYTE_JSR_INDX1:`
`if (ack_i) begin`	`if (ack_i) begin`
`state <= BYTE_JSR_INDX2;`	`state <= BYTE_JSR_INDX2;`
`retstate <= BYTE_JSR_INDX2;`	`retstate <= BYTE_JSR_INDX2;`
Line 115...	Line 135...
`sp <= sp_dec;`	`sp <= sp_dec;`
`state <= BYTE_JSR_INDX3;`	`state <= BYTE_JSR_INDX3;`
`end`	`end`
`BYTE_JSR_INDX3:`	`BYTE_JSR_INDX3:`
`if (ack_i) begin`	`if (ack_i) begin`
`state <= BYTE_JMP_IND1;`	load_what <= `PC_70;
`retstate <= BYTE_JMP_IND1;`	`state <= LOAD_MAC1;`
	`retstate <= LOAD_MAC1;`
`cyc_o <= 1'b0;`	`cyc_o <= 1'b0;`
`stb_o <= 1'b0;`	`stb_o <= 1'b0;`
`we_o <= 1'b0;`	`we_o <= 1'b0;`
`sel_o <= 4'h0;`	`sel_o <= 4'h0;`
`adr_o <= 34'd0;`	`adr_o <= 34'd0;`
Line 134...	Line 155...
`else if (write_allocate) begin`	`else if (write_allocate) begin`
`state <= WAIT_DHIT;`	`state <= WAIT_DHIT;`
dmiss <= `TRUE;	dmiss <= `TRUE;
`end`	`end`
`end`	`end`
	`else if (err_i) begin`
	`lock_o <= 1'b0;`
	`cyc_o <= 1'b0;`
	`stb_o <= 1'b0;`
	`we_o <= 1'b0;`
	`sel_o <= 4'h0;`
	`adr_o <= 34'h0;`
	`dat_o <= 32'h0;`
	`state <= BUS_ERROR;`
	`end`

`No newline at end of file`	`No newline at end of file`

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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [byte_jsr.v] - Diff between revs 20 and 21