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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [calc.v] - Diff between revs 20 and 21

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Rev 20 Rev 21
Line 35... Line 35...
//                              `EOR_RR:        res <= a ^ b;
//                              `EOR_RR:        res <= a ^ b;
//                              `MUL_RR:        prod <= a * b;  // slows the whole core down
//                              `MUL_RR:        prod <= a * b;  // slows the whole core down
                        `ASL_RRR:       res <= shlo;
                        `ASL_RRR:       res <= shlo;
                        `LSR_RRR:       res <= shro;
                        `LSR_RRR:       res <= shro;
                        endcase
                        endcase
                `ADD_ZPX,`ADD_IX,`ADD_IY,`ADD_ABS,`ADD_ABSX,`ADD_RIND:  begin res <= a + b;     end
                `ADD_ZPX,`ADD_IX,`ADD_IY,`ADD_ABS,`ADD_ABSX,`ADD_RIND:  begin res <= a + b + {31'b0,df&cf};     end
                `SUB_ZPX,`SUB_IX,`SUB_IY,`SUB_ABS,`SUB_ABSX,`SUB_RIND:  begin res <= a - b;     end // Also CMP
                `SUB_ZPX,`SUB_IX,`SUB_IY,`SUB_ABS,`SUB_ABSX,`SUB_RIND:  begin res <= a - b - {31'b0,df&~cf&|Rt};        end // Also CMP
                `AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_RIND:  begin res <= a & b; end // Also BIT
                `AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_RIND:  begin res <= a & b; end // Also BIT
                `OR_ZPX,`OR_IX,`OR_IY,`OR_ABS,`OR_ABSX,`OR_RIND:                        begin res <= a | b; end // Also LD
                `OR_ZPX,`OR_IX,`OR_IY,`OR_ABS,`OR_ABSX,`OR_RIND:                        begin res <= a | b; end // Also LD
                `EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_RIND:  begin res <= a ^ b; end
                `EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_RIND:  begin res <= a ^ b; end
                `LDX_ZPY,`LDX_ABS,`LDX_ABSY:    begin res <= b; end
                `LDX_ZPY,`LDX_ABS,`LDX_ABSY:    begin res <= b; end
                `LDY_ZPX,`LDY_ABS,`LDY_ABSX:    begin res <= b; end
                `LDY_ZPX,`LDY_ABS,`LDY_ABSX:    begin res <= b; end

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