| Line 30... |
Line 30... |
`define FALSE 1'b0
|
`define FALSE 1'b0
|
|
|
`define RST_VECT 34'h3FFFFFFF8
|
`define RST_VECT 34'h3FFFFFFF8
|
`define NMI_VECT 34'h3FFFFFFF4
|
`define NMI_VECT 34'h3FFFFFFF4
|
`define IRQ_VECT 34'h3FFFFFFF0
|
`define IRQ_VECT 34'h3FFFFFFF0
|
`define BRK_VECT 34'h3FFFFFFEC
|
`define BRK_VECTNO 9'd0
|
`define SLP_VECT 34'h3FFFFFFE8
|
`define SLP_VECTNO 9'd1
|
`define BYTE_NMI_VECT 34'h00000FFFA
|
`define BYTE_NMI_VECT 34'h00000FFFA
|
`define BYTE_IRQ_VECT 34'h00000FFFE
|
`define BYTE_IRQ_VECT 34'h00000FFFE
|
|
|
`define BRK 8'h00
|
`define BRK 8'h00
|
`define RTI 8'h40
|
`define RTI 8'h40
|
| Line 608... |
Line 608... |
assign v = (op ^ s ^ b) & (~op ^ a ^ b);
|
assign v = (op ^ s ^ b) & (~op ^ a ^ b);
|
|
|
endmodule
|
endmodule
|
|
|
|
|
module rtf65002d(rst_i, clk_i, nmi_i, irq_i, bte_o, cti_o, bl_o, lock_o, cyc_o, stb_o, ack_i, we_o, sel_o, adr_o, dat_i, dat_o);
|
module rtf65002d(rst_i, clk_i, nmi_i, irq_i, irq_vect, bte_o, cti_o, bl_o, lock_o, cyc_o, stb_o, ack_i, we_o, sel_o, adr_o, dat_i, dat_o);
|
parameter IDLE = 3'd0;
|
parameter IDLE = 3'd0;
|
parameter LOAD_DCACHE = 3'd1;
|
parameter LOAD_DCACHE = 3'd1;
|
parameter LOAD_ICACHE = 3'd2;
|
parameter LOAD_ICACHE = 3'd2;
|
parameter LOAD_IBUF1 = 3'd3;
|
parameter LOAD_IBUF1 = 3'd3;
|
parameter LOAD_IBUF2 = 3'd4;
|
parameter LOAD_IBUF2 = 3'd4;
|
| Line 721... |
Line 721... |
|
|
input rst_i;
|
input rst_i;
|
input clk_i;
|
input clk_i;
|
input nmi_i;
|
input nmi_i;
|
input irq_i;
|
input irq_i;
|
|
input [8:0] irq_vect;
|
output reg [1:0] bte_o;
|
output reg [1:0] bte_o;
|
output reg [2:0] cti_o;
|
output reg [2:0] cti_o;
|
output reg [5:0] bl_o;
|
output reg [5:0] bl_o;
|
output reg lock_o;
|
output reg lock_o;
|
output reg cyc_o;
|
output reg cyc_o;
|
| Line 753... |
Line 754... |
reg wai;
|
reg wai;
|
reg [31:0] acc;
|
reg [31:0] acc;
|
reg [31:0] x;
|
reg [31:0] x;
|
reg [31:0] y;
|
reg [31:0] y;
|
reg [7:0] sp;
|
reg [7:0] sp;
|
|
reg [31:0] spage; // stack page
|
wire [7:0] acc8 = acc[7:0];
|
wire [7:0] acc8 = acc[7:0];
|
wire [7:0] x8 = x[7:0];
|
wire [7:0] x8 = x[7:0];
|
wire [7:0] y8 = y[7:0];
|
wire [7:0] y8 = y[7:0];
|
reg [31:0] isp; // interrupt stack pointer
|
reg [31:0] isp; // interrupt stack pointer
|
wire [63:0] prod;
|
wire [63:0] prod;
|
| Line 770... |
Line 772... |
wire [31:0] pcp1 = pc + 32'd1;
|
wire [31:0] pcp1 = pc + 32'd1;
|
wire [31:0] pcp2 = pc + 32'd2;
|
wire [31:0] pcp2 = pc + 32'd2;
|
wire [31:0] pcp3 = pc + 32'd3;
|
wire [31:0] pcp3 = pc + 32'd3;
|
wire [31:0] pcp4 = pc + 32'd4;
|
wire [31:0] pcp4 = pc + 32'd4;
|
wire [31:0] pcp8 = pc + 32'd8;
|
wire [31:0] pcp8 = pc + 32'd8;
|
reg [31:0] dp;
|
reg [31:0] dp; // 32 bit mode direct page register
|
|
reg [31:0] dp8; // 8 bit mode direct page register
|
|
reg [31:0] abs8; // 8 bit mode absolute address register
|
|
reg [31:0] vbr; // vector table base register
|
wire bhit=pc==bufadr;
|
wire bhit=pc==bufadr;
|
reg [31:0] regfile [15:0];
|
reg [31:0] regfile [15:0];
|
reg [55:0] ir;
|
reg [55:0] ir;
|
wire [3:0] Ra = ir[11:8];
|
wire [3:0] Ra = ir[11:8];
|
wire [3:0] Rb = ir[15:12];
|
wire [3:0] Rb = ir[15:12];
|
| Line 986... |
Line 991... |
//`BAZ: takb <= acc8==8'h00;
|
//`BAZ: takb <= acc8==8'h00;
|
//`BXZ: takb <= x8==8'h00;
|
//`BXZ: takb <= x8==8'h00;
|
default: takb <= 1'b0;
|
default: takb <= 1'b0;
|
endcase
|
endcase
|
|
|
wire [31:0] zpx_address = dp + ir[15:8] + x8;
|
wire [31:0] zpx_address = dp8 + ir[15:8] + x8;
|
wire [31:0] zpy_address = dp + ir[15:8] + y8;
|
wire [31:0] zpy_address = dp8 + ir[15:8] + y8;
|
wire [31:0] zp_address = dp + ir[15:8];
|
wire [31:0] zp_address = dp8 + ir[15:8];
|
wire [31:0] abs_address = {16'h0,ir[23:8]};
|
wire [31:0] abs_address = abs8 + {16'h0,ir[23:8]};
|
wire [31:0] absx_address = {16'h0,ir[23:8] + {8'h0,x8}};
|
wire [31:0] absx_address = abs8 + {16'h0,ir[23:8] + {8'h0,x8}};
|
wire [31:0] absy_address = {16'h0,ir[23:8] + {8'h0,y8}};
|
wire [31:0] absy_address = abs8 + {16'h0,ir[23:8] + {8'h0,y8}};
|
wire [31:0] zpx32xy_address = dp + ir[23:12] + rfoa;
|
wire [31:0] zpx32xy_address = dp + ir[23:12] + rfoa;
|
wire [31:0] absx32xy_address = ir[47:16] + rfob;
|
wire [31:0] absx32xy_address = ir[47:16] + rfob;
|
wire [31:0] zpx32_address = dp + ir[31:20] + rfob;
|
wire [31:0] zpx32_address = dp + ir[31:20] + rfob;
|
wire [31:0] absx32_address = ir[55:24] + rfob;
|
wire [31:0] absx32_address = ir[55:24] + rfob;
|
|
|
| Line 1048... |
Line 1053... |
nmoi <= 1'b1;
|
nmoi <= 1'b1;
|
state <= RESET1;
|
state <= RESET1;
|
cstate <= IDLE;
|
cstate <= IDLE;
|
vect <= `RST_VECT;
|
vect <= `RST_VECT;
|
pc <= 32'hFFFFFFF0;
|
pc <= 32'hFFFFFFF0;
|
|
spage <= 32'h00000100;
|
bufadr <= 32'd0;
|
bufadr <= 32'd0;
|
dp <= 32'd0;
|
dp <= 32'd0;
|
|
dp8 <= 32'd0;
|
|
abs8 <= 32'd0;
|
clk_en <= 1'b1;
|
clk_en <= 1'b1;
|
isCacheReset <= `TRUE;
|
isCacheReset <= `TRUE;
|
gie <= 1'b0;
|
gie <= 1'b0;
|
tick <= 32'd0;
|
tick <= 32'd0;
|
end
|
end
|
| Line 1084... |
Line 1092... |
if (nmi_edge & !imiss & gie) begin // imiss indicates cache controller is active and this state is in a waiting loop
|
if (nmi_edge & !imiss & gie) begin // imiss indicates cache controller is active and this state is in a waiting loop
|
nmi_edge <= 1'b0;
|
nmi_edge <= 1'b0;
|
wai <= 1'b0;
|
wai <= 1'b0;
|
bf <= 1'b0;
|
bf <= 1'b0;
|
if (em & !nmoi) begin
|
if (em & !nmoi) begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pc[31:24]}};
|
wdat <= {4{pc[31:24]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
| Line 1098... |
Line 1106... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pc[31:24]}};
|
dat_o <= {4{pc[31:24]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
vect <= `BYTE_NMI_VECT;
|
vect <= `BYTE_NMI_VECT;
|
state <= BYTE_IRQ1;
|
state <= BYTE_IRQ1;
|
end
|
end
|
| Line 1142... |
Line 1150... |
end
|
end
|
else begin
|
else begin
|
bf <= 1'b0;
|
bf <= 1'b0;
|
wai <= 1'b0;
|
wai <= 1'b0;
|
if (em & !nmoi) begin
|
if (em & !nmoi) begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pc[31:24]}};
|
wdat <= {4{pc[31:24]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
| Line 1156... |
Line 1164... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pc[31:24]}};
|
dat_o <= {4{pc[31:24]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
vect <= `BYTE_IRQ_VECT;
|
vect <= `BYTE_IRQ_VECT;
|
state <= BYTE_IRQ1;
|
state <= BYTE_IRQ1;
|
end
|
end
|
| Line 1172... |
Line 1180... |
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
sel_o <= 4'hF;
|
sel_o <= 4'hF;
|
adr_o <= {isp_dec,2'b00};
|
adr_o <= {isp_dec,2'b00};
|
dat_o <= pc;
|
dat_o <= pc;
|
vect <= `IRQ_VECT;
|
vect <= {vbr[31:9],irq_vect,2'b00};
|
state <= IRQ1;
|
state <= IRQ1;
|
end
|
end
|
end
|
end
|
end
|
end
|
else if (!wai) begin
|
else if (!wai) begin
|
| Line 1208... |
Line 1216... |
`TAS,`TXS: begin sp <= res8[7:0]; end
|
`TAS,`TXS: begin sp <= res8[7:0]; end
|
`ADC_IMM:
|
`ADC_IMM:
|
begin
|
begin
|
acc[7:0] <= df ? bcaio : res8;
|
acc[7:0] <= df ? bcaio : res8;
|
cf <= df ? bcaico : resc8;
|
cf <= df ? bcaico : resc8;
|
vf <= resv;
|
// vf <= resv8;
|
|
vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);
|
nf <= df ? bcaio[7] : resn8;
|
nf <= df ? bcaio[7] : resn8;
|
zf <= df ? bcaio==8'h00 : resz8;
|
zf <= df ? bcaio==8'h00 : resz8;
|
end
|
end
|
`ADC_ZP,`ADC_ZPX,`ADC_IX,`ADC_IY,`ADC_ABS,`ADC_ABSX,`ADC_ABSY,`ADC_I:
|
`ADC_ZP,`ADC_ZPX,`ADC_IX,`ADC_IY,`ADC_ABS,`ADC_ABSX,`ADC_ABSY,`ADC_I:
|
begin
|
begin
|
acc[7:0] <= df ? bcao : res8;
|
acc[7:0] <= df ? bcao : res8;
|
cf <= df ? bcaco : resc8;
|
cf <= df ? bcaco : resc8;
|
vf <= resv;
|
vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);
|
nf <= df ? bcao[7] : resn8;
|
nf <= df ? bcao[7] : resn8;
|
zf <= df ? bcao==8'h00 : resz8;
|
zf <= df ? bcao==8'h00 : resz8;
|
end
|
end
|
`SBC_IMM:
|
`SBC_IMM:
|
begin
|
begin
|
acc[7:0] <= df ? bcsio : res8;
|
acc[7:0] <= df ? bcsio : res8;
|
cf <= ~(df ? bcsico : resc8);
|
cf <= ~(df ? bcsico : resc8);
|
vf <= resv;
|
vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);
|
nf <= df ? bcsio[7] : resn8;
|
nf <= df ? bcsio[7] : resn8;
|
zf <= df ? bcsio==8'h00 : resz8;
|
zf <= df ? bcsio==8'h00 : resz8;
|
end
|
end
|
`SBC_ZP,`SBC_ZPX,`SBC_IX,`SBC_IY,`SBC_ABS,`SBC_ABSX,`SBC_ABSY,`SBC_I:
|
`SBC_ZP,`SBC_ZPX,`SBC_IX,`SBC_IY,`SBC_ABS,`SBC_ABSX,`SBC_ABSY,`SBC_I:
|
begin
|
begin
|
acc[7:0] <= df ? bcso : res8;
|
acc[7:0] <= df ? bcso : res8;
|
vf <= resv;
|
vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);
|
cf <= ~(df ? bcsco : resc8);
|
cf <= ~(df ? bcsco : resc8);
|
nf <= df ? bcso[7] : resn8;
|
nf <= df ? bcso[7] : resn8;
|
zf <= df ? bcso==8'h00 : resz8;
|
zf <= df ? bcso==8'h00 : resz8;
|
end
|
end
|
`CMP_IMM,`CMP_ZP,`CMP_ZPX,`CMP_IX,`CMP_IY,`CMP_ABS,`CMP_ABSX,`CMP_ABSY,`CMP_I,
|
`CMP_IMM,`CMP_ZP,`CMP_ZPX,`CMP_IX,`CMP_IY,`CMP_ABS,`CMP_ABSX,`CMP_ABSY,`CMP_I,
|
`CPX_IMM,`CPX_ZP,`CPX_ABS,
|
`CPX_IMM,`CPX_ZP,`CPX_ABS,
|
`CPY_IMM,`CPY_ZP,`CPY_ABS:
|
`CPY_IMM,`CPY_ZP,`CPY_ABS:
|
begin cf <= ~resc8; nf <= resn8; zf <= resz8; end
|
begin cf <= ~resc8; nf <= resn8; zf <= resz8; end
|
`BIT_ZP,`BIT_ABS:
|
`BIT_IMM,`BIT_ZP,`BIT_ZPX,`BIT_ABS,`BIT_ABSX:
|
begin nf <= resn8; vf <= res8[6]; zf <= resz8; end
|
begin nf <= b8[7]; vf <= b8[6]; zf <= resz8; end
|
`TRB_ZP,`TRB_ABS,`TSB_ZP,`TSB_ABS:
|
`TRB_ZP,`TRB_ABS,`TSB_ZP,`TSB_ABS:
|
begin zf <= resz8; end
|
begin zf <= resz8; end
|
`LDA_IMM,`LDA_ZP,`LDA_ZPX,`LDA_IX,`LDA_IY,`LDA_ABS,`LDA_ABSX,`LDA_ABSY,`LDA_I,
|
`LDA_IMM,`LDA_ZP,`LDA_ZPX,`LDA_IX,`LDA_IY,`LDA_ABS,`LDA_ABSX,`LDA_ABSY,`LDA_I,
|
`AND_IMM,`AND_ZP,`AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_ABSY,`AND_I,
|
`AND_IMM,`AND_ZP,`AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_ABSY,`AND_I,
|
`ORA_IMM,`ORA_ZP,`ORA_ZPX,`ORA_IX,`ORA_IY,`ORA_ABS,`ORA_ABSX,`ORA_ABSY,`ORA_I,
|
`ORA_IMM,`ORA_ZP,`ORA_ZPX,`ORA_IX,`ORA_IY,`ORA_ABS,`ORA_ABSX,`ORA_ABSY,`ORA_I,
|
| Line 1292... |
Line 1301... |
dcacheOn <= res[1];
|
dcacheOn <= res[1];
|
write_allocate <= res[2];
|
write_allocate <= res[2];
|
end
|
end
|
4'h1: dp <= res;
|
4'h1: dp <= res;
|
4'h5: lfsr <= res;
|
4'h5: lfsr <= res;
|
4'hE: begin sp <= res[7:0]; end
|
4'h6: dp8 <= res;
|
|
4'h7: abs8 <= res;
|
|
4'h8: vbr <= {res[31:9],9'h000};
|
|
4'hE: begin sp <= res[7:0]; spage[31:8] <= res[31:8]; end
|
4'hF: begin isp <= res; gie <= 1'b1; end
|
4'hF: begin isp <= res; gie <= 1'b1; end
|
endcase
|
endcase
|
end
|
end
|
`RR:
|
`RR:
|
case(ir[23:20])
|
case(ir[23:20])
|
| Line 1306... |
Line 1318... |
begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
else
|
else
|
begin vf <= resv32; cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
begin vf <= resv32; cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`AND_RR:
|
`AND_RR:
|
if (Rt==4'h0) // BIT sets overflow
|
if (Rt==4'h0) // BIT sets overflow
|
begin nf <= resn32; vf <= res[30]; zf <= resz32; end
|
begin nf <= b[31]; vf <= b[30]; zf <= resz32; end
|
else
|
else
|
begin nf <= resn32; zf <= resz32; end
|
begin nf <= resn32; zf <= resz32; end
|
`OR_RR: begin nf <= resn32; zf <= resz32; end
|
`OR_RR: begin nf <= resn32; zf <= resz32; end
|
`EOR_RR: begin nf <= resn32; zf <= resz32; end
|
`EOR_RR: begin nf <= resn32; zf <= resz32; end
|
`MUL_RR: begin nf <= resn32; zf <= resz32; end
|
`MUL_RR: begin nf <= resn32; zf <= resz32; end
|
| Line 1330... |
Line 1342... |
begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
else
|
else
|
begin vf <= resv32; cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
begin vf <= resv32; cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`AND_IMM8,`AND_IMM16,`AND_IMM32,`AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_RIND:
|
`AND_IMM8,`AND_IMM16,`AND_IMM32,`AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_RIND:
|
if (Rt==4'h0) // BIT sets overflow
|
if (Rt==4'h0) // BIT sets overflow
|
begin nf <= resn32; vf <= res[30]; zf <= resz32; end
|
begin nf <= b[31]; vf <= b[30]; zf <= resz32; end
|
else
|
else
|
begin nf <= resn32; zf <= resz32; end
|
begin nf <= resn32; zf <= resz32; end
|
`ORB_ZPX,`ORB_ABS,`ORB_ABSX,
|
`ORB_ZPX,`ORB_ABS,`ORB_ABSX,
|
`OR_IMM8,`OR_IMM16,`OR_IMM32,`OR_ZPX,`OR_IX,`OR_IY,`OR_ABS,`OR_ABSX,`OR_RIND,
|
`OR_IMM8,`OR_IMM16,`OR_IMM32,`OR_ZPX,`OR_IX,`OR_IY,`OR_ABS,`OR_ABSX,`OR_RIND,
|
`EOR_IMM8,`EOR_IMM16,`EOR_IMM32,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_RIND:
|
`EOR_IMM8,`EOR_IMM16,`EOR_IMM32,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_RIND:
|
| Line 1418... |
Line 1430... |
end
|
end
|
`AND_IMM,`BIT_IMM:
|
`AND_IMM,`BIT_IMM:
|
begin
|
begin
|
pc <= pc + 32'd2;
|
pc <= pc + 32'd2;
|
res8 <= acc8 & ir[15:8];
|
res8 <= acc8 & ir[15:8];
|
|
b8 <= ir[15:8]; // for bit flags
|
state <= IFETCH;
|
state <= IFETCH;
|
end
|
end
|
`ORA_IMM:
|
`ORA_IMM:
|
begin
|
begin
|
pc <= pc + 32'd2;
|
pc <= pc + 32'd2;
|
| Line 1654... |
Line 1667... |
radr2LSB <= zp_address[1:0];
|
radr2LSB <= zp_address[1:0];
|
state <= BYTE_IX1;
|
state <= BYTE_IX1;
|
end
|
end
|
`BRK:
|
`BRK:
|
begin
|
begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pcp1[31:24]}};
|
wdat <= {4{pcp1[31:24]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
| Line 1668... |
Line 1681... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pcp1[31:24]}};
|
dat_o <= {4{pcp1[31:24]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
vect <= `BYTE_IRQ_VECT;
|
vect <= `BYTE_IRQ_VECT;
|
state <= BYTE_IRQ1;
|
state <= BYTE_IRQ1;
|
bf <= 1'b1;
|
bf <= 1'b1;
|
| Line 1699... |
Line 1712... |
radr2LSB <= absx_address[1:0];
|
radr2LSB <= absx_address[1:0];
|
state <= BYTE_JMP_IND1;
|
state <= BYTE_JMP_IND1;
|
end
|
end
|
`JSR:
|
`JSR:
|
begin
|
begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pcp2[15:8]}};
|
wdat <= {4{pcp2[15:8]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
| Line 1713... |
Line 1726... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pcp2[15:8]}};
|
dat_o <= {4{pcp2[15:8]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= BYTE_JSR1;
|
state <= BYTE_JSR1;
|
end
|
end
|
`JSL:
|
`JSL:
|
begin
|
begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pcp4[31:24]}};
|
wdat <= {4{pcp4[31:24]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
| Line 1734... |
Line 1747... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pcp4[31:24]}};
|
dat_o <= {4{pcp4[31:24]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= BYTE_JSL1;
|
state <= BYTE_JSL1;
|
end
|
end
|
`JSR_INDX:
|
`JSR_INDX:
|
begin
|
begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pcp2[15:8]}};
|
wdat <= {4{pcp2[15:8]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
| Line 1755... |
Line 1768... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pcp2[15:8]}};
|
dat_o <= {4{pcp2[15:8]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= BYTE_JSR_INDX1;
|
state <= BYTE_JSR_INDX1;
|
end
|
end
|
`RTS,`RTL:
|
`RTS,`RTL:
|
begin
|
begin
|
radr <= {24'h1,sp_inc[7:2]};
|
radr <= {spage[31:8],sp_inc[7:2]};
|
radr2LSB <= sp_inc[1:0];
|
radr2LSB <= sp_inc[1:0];
|
sp <= sp_inc;
|
sp <= sp_inc;
|
state <= BYTE_RTS1;
|
state <= BYTE_RTS1;
|
end
|
end
|
`RTI: begin
|
`RTI: begin
|
radr <= {24'h1,sp_inc[7:2]};
|
radr <= {spage[31:8],sp_inc[7:2]};
|
radr2LSB <= sp_inc[1:0];
|
radr2LSB <= sp_inc[1:0];
|
sp <= sp_inc;
|
sp <= sp_inc;
|
state <= BYTE_RTI9;
|
state <= BYTE_RTI9;
|
end
|
end
|
`BEQ,`BNE,`BPL,`BMI,`BCC,`BCS,`BVC,`BVS,`BRA:
|
`BEQ,`BNE,`BPL,`BMI,`BCC,`BCS,`BVC,`BVS,`BRA:
|
| Line 1815... |
Line 1828... |
`PHP:
|
`PHP:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
case(sp[1:0])
|
case(sp[1:0])
|
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{sr8}};
|
dat_o <= {4{sr8}};
|
wdat <= {4{sr8}};
|
wdat <= {4{sr8}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= PHP1;
|
state <= PHP1;
|
end
|
end
|
`PHA:
|
`PHA:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
case(sp[1:0])
|
case(sp[1:0])
|
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{acc8}};
|
dat_o <= {4{acc8}};
|
wdat <= {4{acc8}};
|
wdat <= {4{acc8}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= PHP1;
|
state <= PHP1;
|
end
|
end
|
`PHX:
|
`PHX:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
case(sp[1:0])
|
case(sp[1:0])
|
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{x8}};
|
dat_o <= {4{x8}};
|
wdat <= {4{x8}};
|
wdat <= {4{x8}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= PHP1;
|
state <= PHP1;
|
end
|
end
|
`PHY:
|
`PHY:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
case(sp[1:0])
|
case(sp[1:0])
|
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{y8}};
|
dat_o <= {4{y8}};
|
wdat <= {4{y8}};
|
wdat <= {4{y8}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= PHP1;
|
state <= PHP1;
|
end
|
end
|
`PLP:
|
`PLP:
|
begin
|
begin
|
radr <= {24'h1,sp_inc[7:2]};
|
radr <= {spage[31:8],sp_inc[7:2]};
|
radr2LSB <= sp_inc[1:0];
|
radr2LSB <= sp_inc[1:0];
|
sp <= sp_inc;
|
sp <= sp_inc;
|
state <= BYTE_PLP1;
|
state <= BYTE_PLP1;
|
pc <= pc + 32'd1;
|
pc <= pc + 32'd1;
|
end
|
end
|
`PLA,`PLX,`PLY:
|
`PLA,`PLX,`PLY:
|
begin
|
begin
|
radr <= {24'h1,sp_inc[7:2]};
|
radr <= {spage[31:8],sp_inc[7:2]};
|
radr2LSB <= sp_inc[1:0];
|
radr2LSB <= sp_inc[1:0];
|
sp <= sp_inc;
|
sp <= sp_inc;
|
state <= PLA1;
|
state <= PLA1;
|
pc <= pc + 32'd1;
|
pc <= pc + 32'd1;
|
end
|
end
|
| Line 1949... |
Line 1962... |
4'h1: res <= dp;
|
4'h1: res <= dp;
|
4'h2: res <= prod[31:0];
|
4'h2: res <= prod[31:0];
|
4'h3: res <= prod[63:32];
|
4'h3: res <= prod[63:32];
|
4'h4: res <= tick;
|
4'h4: res <= tick;
|
4'h5: begin res <= lfsr; lfsr <= {lfsr[30:0],lfsr_fb}; end
|
4'h5: begin res <= lfsr; lfsr <= {lfsr[30:0],lfsr_fb}; end
|
4'hE: res <= sp;
|
4'h6: res <= dp8;
|
|
4'h7: res <= abs8;
|
|
4'h8: res <= vbr;
|
|
4'hE: res <= {spage[31:8],sp};
|
4'hF: res <= isp;
|
4'hF: res <= isp;
|
endcase
|
endcase
|
pc <= pc + 32'd2;
|
pc <= pc + 32'd2;
|
end
|
end
|
`ASL_ACC: begin res <= {acc,1'b0}; pc <= pc + 32'd1; end
|
`ASL_ACC: begin res <= {acc,1'b0}; pc <= pc + 32'd1; end
|
| Line 1963... |
Line 1979... |
|
|
`RR:
|
`RR:
|
begin
|
begin
|
state <= IFETCH;
|
state <= IFETCH;
|
case(ir[23:20])
|
case(ir[23:20])
|
`ADD_RR: res <= rfoa + rfob;
|
`ADD_RR: begin res <= rfoa + rfob; a <= rfoa; b <= rfob; end
|
`SUB_RR: res <= rfoa - rfob;
|
`SUB_RR: begin res <= rfoa - rfob; a <= rfoa; b <= rfob; end
|
`AND_RR: res <= rfoa & rfob;
|
`AND_RR: begin res <= rfoa & rfob; a <= rfoa; b <= rfob; end // for bit flags
|
`OR_RR: res <= rfoa | rfob;
|
`OR_RR: begin res <= rfoa | rfob; a <= rfoa; b <= rfob; end
|
`EOR_RR: res <= rfoa ^ rfob;
|
`EOR_RR: begin res <= rfoa ^ rfob; a <= rfoa; b <= rfob; end
|
`MUL_RR: begin state <= MULDIV1; end
|
`MUL_RR: begin state <= MULDIV1; end
|
`MULS_RR: begin state <= MULDIV1; end
|
`MULS_RR: begin state <= MULDIV1; end
|
`DIV_RR: begin state <= MULDIV1; end
|
`DIV_RR: begin state <= MULDIV1; end
|
`DIVS_RR: begin state <= MULDIV1; end
|
`DIVS_RR: begin state <= MULDIV1; end
|
`MOD_RR: begin state <= MULDIV1; end
|
`MOD_RR: begin state <= MULDIV1; end
|
| Line 1986... |
Line 2002... |
`LSR_RR: begin res <= {rfoa[0],1'b0,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`LSR_RR: begin res <= {rfoa[0],1'b0,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`ROR_RR: begin res <= {rfoa[0],cf,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`ROR_RR: begin res <= {rfoa[0],cf,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`DEC_RR: begin res <= rfoa - 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`DEC_RR: begin res <= rfoa - 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`INC_RR: begin res <= rfoa + 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
`INC_RR: begin res <= rfoa + 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
|
|
|
`ADD_IMM8: begin res <= rfoa + {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; end
|
`ADD_IMM8: begin res <= rfoa + {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
|
`SUB_IMM8: begin res <= rfoa - {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; end
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`SUB_IMM8: begin res <= rfoa - {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
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`OR_IMM8: begin res <= rfoa | {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; end
|
`OR_IMM8: begin res <= rfoa | {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
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`AND_IMM8: begin res <= rfoa & {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; end
|
`AND_IMM8: begin res <= rfoa & {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
|
`EOR_IMM8: begin res <= rfoa ^ {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; end
|
`EOR_IMM8: begin res <= rfoa ^ {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
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|
|
`ADD_IMM16: begin res <= rfoa + {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; end
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`ADD_IMM16: begin res <= rfoa + {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`SUB_IMM16: begin res <= rfoa - {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; end
|
`SUB_IMM16: begin res <= rfoa - {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`OR_IMM16: begin res <= rfoa | {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; end
|
`OR_IMM16: begin res <= rfoa | {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`AND_IMM16: begin res <= rfoa & {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; end
|
`AND_IMM16: begin res <= rfoa & {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`EOR_IMM16: begin res <= rfoa ^ {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; end
|
`EOR_IMM16: begin res <= rfoa ^ {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
|
|
|
`ADD_IMM32: begin res <= rfoa + ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; end
|
`ADD_IMM32: begin res <= rfoa + ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
|
`SUB_IMM32: begin res <= rfoa - ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; end
|
`SUB_IMM32: begin res <= rfoa - ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
|
`OR_IMM32: begin res <= rfoa | ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; end
|
`OR_IMM32: begin res <= rfoa | ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
|
`AND_IMM32: begin res <= rfoa & ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; end
|
`AND_IMM32: begin res <= rfoa & ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
|
`EOR_IMM32: begin res <= rfoa ^ ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; end
|
`EOR_IMM32: begin res <= rfoa ^ ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
|
|
|
`LDX_IMM32,`LDY_IMM32,`LDA_IMM32: begin res <= ir[39:8]; pc <= pc + 32'd5; end
|
`LDX_IMM32,`LDY_IMM32,`LDA_IMM32: begin res <= ir[39:8]; pc <= pc + 32'd5; end
|
`LDX_IMM16,`LDA_IMM16: begin res <= {{16{ir[23]}},ir[23:8]}; pc <= pc + 32'd3; end
|
`LDX_IMM16,`LDA_IMM16: begin res <= {{16{ir[23]}},ir[23:8]}; pc <= pc + 32'd3; end
|
`LDX_IMM8,`LDA_IMM8: begin res <= {{24{ir[15]}},ir[15:8]}; pc <= pc + 32'd2; end
|
`LDX_IMM8,`LDA_IMM8: begin res <= {{24{ir[15]}},ir[15:8]}; pc <= pc + 32'd2; end
|
|
|
| Line 2245... |
Line 2261... |
state <= LOAD1;
|
state <= LOAD1;
|
end
|
end
|
`BRK:
|
`BRK:
|
begin
|
begin
|
bf <= 1'b1;
|
bf <= 1'b1;
|
radr <= isp - 32'd1;
|
radr <= isp_dec;
|
wadr <= isp - 32'd1;
|
wadr <= isp_dec;
|
wdat <= pc + 32'd1;
|
wdat <= pc + 32'd1;
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
sel_o <= 4'hF;
|
sel_o <= 4'hF;
|
adr_o <= {isp_dec,2'b00};
|
adr_o <= {isp_dec,2'b00};
|
dat_o <= pc + 32'd1;
|
dat_o <= pc + 32'd1;
|
vect <= `BRK_VECT;
|
vect <= {vbr[31:9],`BRK_VECTNO,2'b00};
|
state <= IRQ1;
|
state <= IRQ1;
|
end
|
end
|
`JMP:
|
`JMP:
|
begin
|
begin
|
pc[15:0] <= ir[23:8];
|
pc[15:0] <= ir[23:8];
|
| Line 2389... |
Line 2405... |
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
sel_o <= 4'hF;
|
sel_o <= 4'hF;
|
adr_o <= {isp_dec,2'b00};
|
adr_o <= {isp_dec,2'b00};
|
dat_o <= pc + 32'd2;
|
dat_o <= pc + 32'd2;
|
vect <= `SLP_VECT;
|
vect <= {vbr[31:9],`SLP_VECTNO,2'b00};
|
state <= IRQ1;
|
state <= IRQ1;
|
end
|
end
|
else if (ir[15:8]==8'h1) begin
|
else if (ir[15:8]==8'h1) begin
|
if (takb)
|
if (takb)
|
pc <= pc + {{16{ir[31]}},ir[31:16]};
|
pc <= pc + {{16{ir[31]}},ir[31:16]};
|
| Line 2446... |
Line 2462... |
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
sel_o <= 4'hF;
|
sel_o <= 4'hF;
|
adr_o <= {isp_dec,2'b00};
|
adr_o <= {isp_dec,2'b00};
|
dat_o <= pc + 32'd3;
|
dat_o <= pc + 32'd3;
|
vect <= `SLP_VECT;
|
vect <= {vbr[31:9],`SLP_VECTNO,2'b00};
|
state <= IRQ1;
|
state <= IRQ1;
|
end
|
end
|
else begin
|
else begin
|
pc <= pc + {{16{ir[23]}},ir[23:8]};
|
pc <= pc + {{16{ir[23]}},ir[23:8]};
|
state <= IFETCH;
|
state <= IFETCH;
|
| Line 2789... |
Line 2805... |
dmiss <= `TRUE;
|
dmiss <= `TRUE;
|
end
|
end
|
end
|
end
|
BYTE_JSR_INDX2:
|
BYTE_JSR_INDX2:
|
begin
|
begin
|
radr <= {24'h1,sp[7:2]};
|
radr <= {spage[31:8],sp[7:2]};
|
wadr <= {24'h1,sp[7:2]};
|
wadr <= {spage[31:8],sp[7:2]};
|
radr2LSB <= sp[1:0];
|
radr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wadr2LSB <= sp[1:0];
|
wdat <= {4{pcp2[7:0]}};
|
wdat <= {4{pcp2[7:0]}};
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
| Line 2803... |
Line 2819... |
2'd0: sel_o <= 4'b0001;
|
2'd0: sel_o <= 4'b0001;
|
2'd1: sel_o <= 4'b0010;
|
2'd1: sel_o <= 4'b0010;
|
2'd2: sel_o <= 4'b0100;
|
2'd2: sel_o <= 4'b0100;
|
2'd3: sel_o <= 4'b1000;
|
2'd3: sel_o <= 4'b1000;
|
endcase
|
endcase
|
adr_o <= {24'h1,sp[7:2],2'b00};
|
adr_o <= {spage[31:8],sp[7:2],2'b00};
|
dat_o <= {4{pcp2[7:0]}};
|
dat_o <= {4{pcp2[7:0]}};
|
sp <= sp_dec;
|
sp <= sp_dec;
|
state <= BYTE_JSR_INDX3;
|
state <= BYTE_JSR_INDX3;
|
end
|
end
|
BYTE_JSR_INDX3:
|
BYTE_JSR_INDX3:
|
