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URL https://opencores.org/ocsvn/rtf65002/rtf65002/trunk

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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [rtf65002d.v] - Diff between revs 13 and 19

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Rev 13 Rev 19
Line 86... Line 86... 
`define MULS_RR                 4'd9
 
`define MULS_RR                 4'd9
 
`define DIV_RR                  4'd10
 
`define DIV_RR                  4'd10
 
`define DIVS_RR                 4'd11
 
`define DIVS_RR                 4'd11
 
`define MOD_RR                  4'd12
 
`define MOD_RR                  4'd12
 
`define MODS_RR                 4'd13
 
`define MODS_RR                 4'd13
 
 
 
`define ASL_RRR                 4'd14
 
 
 
`define LSR_RRR                 4'd15
 
`define LD_RR           8'h7B
 
`define LD_RR           8'h7B
 
 
 
 
 
`define ADD_IMM8        8'h65           // 8 bit operand
 
`define ADD_IMM8        8'h65           // 8 bit operand
 
`define ADD_IMM16       8'h79           // 16 bit operand
 
`define ADD_IMM16       8'h79           // 16 bit operand
 
`define ADD_IMM32       8'h69           // 32 bit operand
 
`define ADD_IMM32       8'h69           // 32 bit operand
Line 130... Line 132... 
`define SBC_ABS         8'hED
 
`define SBC_ABS         8'hED
 
`define SBC_ABSX        8'hFD
 
`define SBC_ABSX        8'hFD
 
`define SBC_ABSY        8'hF9
 
`define SBC_ABSY        8'hF9
 
`define SBC_I           8'hF2
 
`define SBC_I           8'hF2
 
 
 
 
 
 
 
`define CMP_IMM8        8'hC5
 
`define CMP_IMM32       8'hC9
 
`define CMP_IMM32       8'hC9
 
`define CMP_IMM         8'hC9
 
`define CMP_IMM         8'hC9
 
`define CMP_ZP          8'hC5
 
`define CMP_ZP          8'hC5
 
`define CMP_ZPX         8'hD5
 
`define CMP_ZPX         8'hD5
 
`define CMP_IX          8'hC1
 
`define CMP_IX          8'hC1
Line 235... Line 238... 
`define STA_ABS         8'h8D
 
`define STA_ABS         8'h8D
 
`define STA_ABSX        8'h9D
 
`define STA_ABSX        8'h9D
 
`define STA_ABSY        8'h99
 
`define STA_ABSY        8'h99
 
`define STA_I           8'h92
 
`define STA_I           8'h92
 
 
 
 
 
 
 
`define ASL_IMM8        8'h24
 
`define ASL_ACC         8'h0A
 
`define ASL_ACC         8'h0A
 
`define ASL_ZP          8'h06
 
`define ASL_ZP          8'h06
 
`define ASL_RR          8'h06
 
`define ASL_RR          8'h06
 
`define ASL_ZPX         8'h16
 
`define ASL_ZPX         8'h16
 
`define ASL_ABS         8'h0E
 
`define ASL_ABS         8'h0E
Line 249... Line 253... 
`define ROL_RR          8'h26
 
`define ROL_RR          8'h26
 
`define ROL_ZPX         8'h36
 
`define ROL_ZPX         8'h36
 
`define ROL_ABS         8'h2E
 
`define ROL_ABS         8'h2E
 
`define ROL_ABSX        8'h3E
 
`define ROL_ABSX        8'h3E
 
 
 
 
 
 
 
`define LSR_IMM8        8'h34
 
`define LSR_ACC         8'h4A
 
`define LSR_ACC         8'h4A
 
`define LSR_ZP          8'h46
 
`define LSR_ZP          8'h46
 
`define LSR_RR          8'h46
 
`define LSR_RR          8'h46
 
`define LSR_ZPX         8'h56
 
`define LSR_ZPX         8'h56
 
`define LSR_ABS         8'h4E
 
`define LSR_ABS         8'h4E
Line 806... Line 811... 
reg first_ifetch;
 
reg first_ifetch;
 
reg [31:0] lfsr;
 
reg [31:0] lfsr;
 
wire lfsr_fb;
 
wire lfsr_fb;
 
xnor(lfsr_fb,lfsr[0],lfsr[1],lfsr[21],lfsr[31]);
 
xnor(lfsr_fb,lfsr[0],lfsr[1],lfsr[21],lfsr[31]);
 
reg [31:0] a, b;
 
reg [31:0] a, b;
 
 
 
wire [31:0] shlo = a << b[4:0];
 
 
 
wire [31:0] shro = a >> b[4:0];
 
reg [7:0] b8;
 
reg [7:0] b8;
 
reg [32:0] res;
 
reg [32:0] res;
 
reg [8:0] res8;
 
reg [8:0] res8;
 
wire resv8,resv32;
 
wire resv8,resv32;
 
wire resc8 = res8[8];
 
wire resc8 = res8[8];
Line 1284... Line 1291... 
                                4'h2:   x <= res;
 
                                4'h2:   x <= res;
 
                                4'h3:   y <= res;
 
                                4'h3:   y <= res;
 
                                default:        ;
 
                                default:        ;
 
                                endcase
 
                                endcase
 
                                case(ir[7:0])
 
                                case(ir[7:0])
 
//                              `XCE:           begin cf <= em; em <= cf; end
 
 
 
                                `EMM:   em <= 1'b1;
 
                                `EMM:   em <= 1'b1;
 
                                `TAY,`TXY,`DEY,`INY:    begin y <= res; nf <= resn32; zf <= resz32; end
 
                                `TAY,`TXY,`DEY,`INY:    begin y <= res; nf <= resn32; zf <= resz32; end
 
                                `TAX,`TYX,`TSX,`DEX,`INX:       begin x <= res; nf <= resn32; zf <= resz32; end
 
                                `TAX,`TYX,`TSX,`DEX,`INX:       begin x <= res; nf <= resn32; zf <= resz32; end
 
                                `TAS,`TXS:      begin isp <= res; gie <= 1'b1; end
 
                                `TAS,`TXS:      begin isp <= res; gie <= 1'b1; end
 
                                `TSA,`TYA,`TXA,`INA,`DEA:       begin acc <= res; nf <= resn32; zf <= resz32; end
 
                                `TSA,`TYA,`TXA,`INA,`DEA:       begin acc <= res; nf <= resn32; zf <= resz32; end
Line 1303... Line 1309... 
                                                                end
 
                                                                end
 
                                                4'h1:   dp <= res;
 
                                                4'h1:   dp <= res;
 
                                                4'h5:   lfsr <= res;
 
                                                4'h5:   lfsr <= res;
 
                                                4'h6:   dp8 <= res;
 
                                                4'h6:   dp8 <= res;
 
                                                4'h7:   abs8 <= res;
 
                                                4'h7:   abs8 <= res;
 
                                                4'h8:   vbr <= {res[31:9],9'h000};
 
                                                4'h8:   begin vbr <= {res[31:9],9'h000}; nmoi <= res[0]; end
 
                                                4'hE:   begin sp <= res[7:0]; spage[31:8] <= res[31:8]; end
 
                                                4'hE:   begin sp <= res[7:0]; spage[31:8] <= res[31:8]; end
 
                                                4'hF:   begin isp <= res; gie <= 1'b1; end
 
                                                4'hF:   begin isp <= res; gie <= 1'b1; end
 
                                                endcase
 
                                                endcase
 
                                        end
 
                                        end
 
                                `RR:
 
                                `RR:
Line 1329... Line 1335... 
                                        `MULS_RR:       begin nf <= resn32; zf <= resz32; end
 
                                        `MULS_RR:       begin nf <= resn32; zf <= resz32; end
 
                                        `DIV_RR:        begin nf <= resn32; zf <= resz32; end
 
                                        `DIV_RR:        begin nf <= resn32; zf <= resz32; end
 
                                        `DIVS_RR:       begin nf <= resn32; zf <= resz32; end
 
                                        `DIVS_RR:       begin nf <= resn32; zf <= resz32; end
 
                                        `MOD_RR:        begin nf <= resn32; zf <= resz32; end
 
                                        `MOD_RR:        begin nf <= resn32; zf <= resz32; end
 
                                        `MODS_RR:       begin nf <= resn32; zf <= resz32; end
 
                                        `MODS_RR:       begin nf <= resn32; zf <= resz32; end
 
 
 
                                        `ASL_RRR:       begin nf <= resn32; zf <= resz32; end
 
 
 
                                        `LSR_RRR:       begin nf <= resn32; zf <= resz32; end
 
                                        endcase
 
                                        endcase
 
                                `LD_RR: begin zf <= resz32; nf <= resn32; end
 
                                `LD_RR: begin zf <= resz32; nf <= resn32; end
 
                                `DEC_RR,`INC_RR: begin zf <= resz32; nf <= resn32; end
 
                                `DEC_RR,`INC_RR: begin zf <= resz32; nf <= resn32; end
 
                                `ASL_RR,`ROL_RR,`LSR_RR,`ROR_RR: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ASL_RR,`ROL_RR,`LSR_RR,`ROR_RR: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ADD_IMM8,`ADD_IMM16,`ADD_IMM32,`ADD_ZPX,`ADD_IX,`ADD_IY,`ADD_ABS,`ADD_ABSX,`ADD_RIND:
 
                                `ADD_IMM8,`ADD_IMM16,`ADD_IMM32,`ADD_ZPX,`ADD_IX,`ADD_IY,`ADD_ABS,`ADD_ABSX,`ADD_RIND:
Line 1357... Line 1365... 
                                `ROR_ACC:       begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ROR_ACC:       begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ASL_ZPX,`ASL_ABS,`ASL_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ASL_ZPX,`ASL_ABS,`ASL_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ROL_ZPX,`ROL_ABS,`ROL_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ROL_ZPX,`ROL_ABS,`ROL_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `LSR_ZPX,`LSR_ABS,`LSR_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `LSR_ZPX,`LSR_ABS,`LSR_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ROR_ZPX,`ROR_ABS,`ROR_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
                                `ROR_ZPX,`ROR_ABS,`ROR_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
 
 
 
                                `ASL_IMM8: begin nf <= resn32; zf <= resz32; end
 
 
 
                                `LSR_IMM8: begin nf <= resn32; zf <= resz32; end
 
                                `INC_ZPX,`INC_ABS,`INC_ABSX: begin nf <= resn32; zf <= resz32; end
 
                                `INC_ZPX,`INC_ABS,`INC_ABSX: begin nf <= resn32; zf <= resz32; end
 
                                `DEC_ZPX,`DEC_ABS,`DEC_ABSX: begin nf <= resn32; zf <= resz32; end
 
                                `DEC_ZPX,`DEC_ABS,`DEC_ABSX: begin nf <= resn32; zf <= resz32; end
 
                                `PLA:   begin acc <= res; zf <= resz32; nf <= resn32; end
 
                                `PLA:   begin acc <= res; zf <= resz32; nf <= resn32; end
 
                                `PLX:   begin x <= res; zf <= resz32; nf <= resn32; end
 
                                `PLX:   begin x <= res; zf <= resz32; nf <= resn32; end
 
                                `PLY:   begin y <= res; zf <= resz32; nf <= resn32; end
 
                                `PLY:   begin y <= res; zf <= resz32; nf <= resn32; end
 
                                `LDX_IMM32,`LDX_IMM16,`LDX_IMM8,`LDX_ZPY,`LDX_ABS,`LDX_ABSY:    begin x <= res; nf <= resn32; zf <= resz32; end
 
                                `LDX_IMM32,`LDX_IMM16,`LDX_IMM8,`LDX_ZPY,`LDX_ABS,`LDX_ABSY:    begin x <= res; nf <= resn32; zf <= resz32; end
 
                                `LDY_IMM32,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: begin y <= res; nf <= resn32; zf <= resz32; end
 
                                `LDY_IMM32,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: begin y <= res; nf <= resn32; zf <= resz32; end
 
                                `CPX_IMM32,`CPX_ZPX,`CPX_ABS:   begin cf <= ~resc; nf <= resn32; zf <= resz32; end
 
                                `CPX_IMM32,`CPX_ZPX,`CPX_ABS:   begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
 
                                `CPY_IMM32,`CPY_ZPX,`CPY_ABS:   begin cf <= ~resc; nf <= resn32; zf <= resz32; end
 
                                `CPY_IMM32,`CPY_ZPX,`CPY_ABS:   begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
 
 
 
                                `CMP_IMM8: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
 
                                `LDA_IMM32,`LDA_IMM16,`LDA_IMM8:        begin acc <= res; nf <= resn32; zf <= resz32; end
 
                                `LDA_IMM32,`LDA_IMM16,`LDA_IMM8:        begin acc <= res; nf <= resn32; zf <= resz32; end
 
                                endcase
 
                                endcase
 
                        end
 
                        end
 
                end
 
                end
 
        end
 
        end
Line 1598... Line 1609... 
                                pc <= pc + 32'd3;
 
                                pc <= pc + 32'd3;
 
                                wadr <= abs_address[31:2];
 
                                wadr <= abs_address[31:2];
 
                                wadr2LSB <= abs_address[1:0];
 
                                wadr2LSB <= abs_address[1:0];
 
                                wdat <= {4{x8}};
 
                                wdat <= {4{x8}};
 
                                state <= STORE1;
 
                                state <= STORE1;
 
                        end             // Handle abs,x
 
                        end
 
                `STY_ABS:
 
                `STY_ABS:
 
                        begin
 
                        begin
 
                                pc <= pc + 32'd3;
 
                                pc <= pc + 32'd3;
 
                                wadr <= abs_address[31:2];
 
                                wadr <= abs_address[31:2];
 
                                wadr2LSB <= abs_address[1:0];
 
                                wadr2LSB <= abs_address[1:0];
Line 1615... Line 1626... 
                                wadr <= abs_address[31:2];
 
                                wadr <= abs_address[31:2];
 
                                wadr2LSB <= abs_address[1:0];
 
                                wadr2LSB <= abs_address[1:0];
 
                                wdat <= {4{8'h00}};
 
                                wdat <= {4{8'h00}};
 
                                state <= STORE1;
 
                                state <= STORE1;
 
                        end
 
                        end
 
 
 
                // Handle abs,x
 
                `ADC_ABSX,`SBC_ABSX,`AND_ABSX,`ORA_ABSX,`EOR_ABSX,`CMP_ABSX,`LDA_ABSX,
 
                `ADC_ABSX,`SBC_ABSX,`AND_ABSX,`ORA_ABSX,`EOR_ABSX,`CMP_ABSX,`LDA_ABSX,
 
                `ASL_ABSX,`ROL_ABSX,`LSR_ABSX,`ROR_ABSX,`INC_ABSX,`DEC_ABSX,`BIT_ABSX,
 
                `ASL_ABSX,`ROL_ABSX,`LSR_ABSX,`ROR_ABSX,`INC_ABSX,`DEC_ABSX,`BIT_ABSX,
 
                `LDY_ABSX:
 
                `LDY_ABSX:
 
                        begin
 
                        begin
 
                                pc <= pc + 32'd3;
 
                                pc <= pc + 32'd3;
Line 1964... Line 1976... 
                                                4'h3:   res <= prod[63:32];
 
                                                4'h3:   res <= prod[63:32];
 
                                                4'h4:   res <= tick;
 
                                                4'h4:   res <= tick;
 
                                                4'h5:   begin res <= lfsr; lfsr <= {lfsr[30:0],lfsr_fb}; end
 
                                                4'h5:   begin res <= lfsr; lfsr <= {lfsr[30:0],lfsr_fb}; end
 
                                                4'h6:   res <= dp8;
 
                                                4'h6:   res <= dp8;
 
                                                4'h7:   res <= abs8;
 
                                                4'h7:   res <= abs8;
 
                                                4'h8:   res <= vbr;
 
                                                4'h8:   res <= {vbr[31:1],nmoi};
 
                                                4'hE:   res <= {spage[31:8],sp};
 
                                                4'hE:   res <= {spage[31:8],sp};
 
                                                4'hF:   res <= isp;
 
                                                4'hF:   res <= isp;
 
                                                endcase
 
                                                endcase
 
                                                pc <= pc + 32'd2;
 
                                                pc <= pc + 32'd2;
 
                                        end
 
                                        end
Line 1990... Line 2002... 
                                `MULS_RR:       begin state <= MULDIV1; end
 
                                `MULS_RR:       begin state <= MULDIV1; end
 
                                `DIV_RR:        begin state <= MULDIV1; end
 
                                `DIV_RR:        begin state <= MULDIV1; end
 
                                `DIVS_RR:       begin state <= MULDIV1; end
 
                                `DIVS_RR:       begin state <= MULDIV1; end
 
                                `MOD_RR:        begin state <= MULDIV1; end
 
                                `MOD_RR:        begin state <= MULDIV1; end
 
                                `MODS_RR:       begin state <= MULDIV1; end
 
                                `MODS_RR:       begin state <= MULDIV1; end
 
 
 
                                `ASL_RRR:       begin a <= rfoa; b <= rfob; state <= CALC; end
 
 
 
                                `LSR_RRR:       begin a <= rfoa; b <= rfob; state <= CALC; end
 
                                endcase
 
                                endcase
 
                                Rt <= ir[19:16];
 
                                Rt <= ir[19:16];
 
                                pc <= pc + 32'd3;
 
                                pc <= pc + 32'd3;
 
                        end
 
                        end
 
                `LD_RR:         begin res <= rfoa; Rt <= ir[15:12]; pc <= pc + 32'd2; end
 
                `LD_RR:         begin res <= rfoa; Rt <= ir[15:12]; pc <= pc + 32'd2; end
Line 2002... Line 2016... 
                `LSR_RR:        begin res <= {rfoa[0],1'b0,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `LSR_RR:        begin res <= {rfoa[0],1'b0,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `ROR_RR:        begin res <= {rfoa[0],cf,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `ROR_RR:        begin res <= {rfoa[0],cf,rfoa[31:1]}; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `DEC_RR:        begin res <= rfoa - 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `DEC_RR:        begin res <= rfoa - 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `INC_RR:        begin res <= rfoa + 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
                `INC_RR:        begin res <= rfoa + 32'd1; pc <= pc + 32'd2; Rt <= ir[15:12]; end
 
 
 
 
 
                `ADD_IMM8:      begin res <= rfoa + {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `ADD_IMM8:      begin res <= rfoa + {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; a <= rfoa; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `SUB_IMM8:      begin res <= rfoa - {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `SUB_IMM8:      begin res <= rfoa - {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; a <= rfoa; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `OR_IMM8:       begin res <= rfoa | {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `OR_IMM8:       begin res <= rfoa | {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `AND_IMM8:      begin res <= rfoa & {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `AND_IMM8:      begin res <= rfoa & {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `EOR_IMM8:      begin res <= rfoa ^ {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
                `EOR_IMM8:      begin res <= rfoa ^ {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pc + 32'd3; b <= {{24{ir[23]}},ir[23:16]}; end
 
 
 
                `CMP_IMM8:      begin res <= acc - {{24{ir[15]}},ir[15:8]}; Rt <= 4'h0; pc <= pc + 32'd2; b <= {{24{ir[15]}},ir[15:8]}; end
 
 
 
                `ASL_IMM8:      begin a <= rfoa; b <= ir[20:16]; Rt <= ir[15:12]; pc <= pc + 32'd3; state <= CALC; end
 
 
 
                `LSR_IMM8:      begin a <= rfoa; b <= ir[20:16]; Rt <= ir[15:12]; pc <= pc + 32'd3; state <= CALC; end
 
 
 
 
 
                `ADD_IMM16:     begin res <= rfoa + {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `ADD_IMM16:     begin res <= rfoa + {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; a <= rfoa; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `SUB_IMM16:     begin res <= rfoa - {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `SUB_IMM16:     begin res <= rfoa - {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; a <= rfoa; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `OR_IMM16:      begin res <= rfoa | {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `OR_IMM16:      begin res <= rfoa | {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `AND_IMM16:     begin res <= rfoa & {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `AND_IMM16:     begin res <= rfoa & {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `EOR_IMM16:     begin res <= rfoa ^ {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
                `EOR_IMM16:     begin res <= rfoa ^ {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pc + 32'd4; b <= {{16{ir[31]}},ir[31:16]}; end
 
 
 
 
 
                `ADD_IMM32:     begin res <= rfoa + ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `ADD_IMM32:     begin res <= rfoa + ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; a <= rfoa; b <= ir[47:16]; end
 
                `SUB_IMM32:     begin res <= rfoa - ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `SUB_IMM32:     begin res <= rfoa - ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; a <= rfoa; b <= ir[47:16]; end
 
                `OR_IMM32:      begin res <= rfoa | ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `OR_IMM32:      begin res <= rfoa | ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `AND_IMM32:     begin res <= rfoa & ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `AND_IMM32:     begin res <= rfoa & ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `EOR_IMM32:     begin res <= rfoa ^ ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
                `EOR_IMM32:     begin res <= rfoa ^ ir[47:16]; Rt <= ir[15:12]; pc <= pc + 32'd6; b <= ir[47:16]; end
 
 
 
 
 
                `LDX_IMM32,`LDY_IMM32,`LDA_IMM32:       begin res <= ir[39:8]; pc <= pc + 32'd5; end
 
                `LDX_IMM32,`LDY_IMM32,`LDA_IMM32:       begin res <= ir[39:8]; pc <= pc + 32'd5; end

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