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[/] [rtf65002/] [trunk/] [software/] [asm/] [bootrom.asm] - Diff between revs 31 and 34

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Rev 31	Rev 34
Line 1...	Line 1...

`; ============================================================================`	`; ============================================================================`
`; __`	`; __`
`; \\__/ o\ (C) 2013 Robert Finch, Stratford`	`; \\__/ o\ (C) 2013 Robert Finch, Stratford`
`; \ __ / All rights reserved.`	`; \ __ / All rights reserved.`
`; \/_// robfinch@opencores.org`	`; \/_// robfinch@opencores.org`
Line 77...	Line 78...
`FCB_DE_EXT =0x1C`	`FCB_DE_EXT =0x1C`
`FCB_DE_ATTR =0x20`	`FCB_DE_ATTR =0x20`
`FCB_DE_DATETIME =0x28`	`FCB_DE_DATETIME =0x28`
`FCB_DE_CLUSTER =0x30 ; starting cluster of file`	`FCB_DE_CLUSTER =0x30 ; starting cluster of file`
`FCB_DE_SIZE =0x34 ; 6 byte file size`	`FCB_DE_SIZE =0x34 ; 6 byte file size`

`FCB_DIR_SECTOR =0x40 ; LBA directory sector this is from`	`FCB_DIR_SECTOR =0x40 ; LBA directory sector this is from`
`FCB_DIR_ENT =0x44 ; offset in sector for dir entry`	`FCB_DIR_ENT =0x44 ; offset in sector for dir entry`
`FCB_LDRV =0x48 ; logical drive this is on`	`FCB_LDRV =0x48 ; logical drive this is on`
`FCB_MODE =0x49 ; 0 read, 1=modify`	`FCB_MODE =0x49 ; 0 read, 1=modify`
`FCB_NUSERS =0x4A ; number of users of this file`	`FCB_NUSERS =0x4A ; number of users of this file`
Line 201...	Line 203...
`rxfull EQU 0x01`	`rxfull EQU 0x01`

`CONFIGREC EQU 0xFFDCFFF0`	`CONFIGREC EQU 0xFFDCFFF0`
`CR_CLOCK EQU 0xFFDCFFF4`	`CR_CLOCK EQU 0xFFDCFFF4`
`GACCEL EQU 0xFFDAE000`	`GACCEL EQU 0xFFDAE000`
	`GA_X0 EQU 0xFFDAE002`
	`GA_Y0 EQU 0xFFDAE003`
	`GA_PEN EQU 0xFFDAE000`
	`GA_X1 EQU 0xFFDAE004`
	`GA_Y1 EQU 0xFFDAE005`
	`GA_STATE EQU 0xFFDAE00E`
	`GA_CMD EQU 0xFFDAE00F`

`AC97 EQU 0xFFDC1000`	`AC97 EQU 0xFFDC1000`
`PSG EQU 0xFFD50000`	`PSG EQU 0xFFD50000`
`PSGFREQ0 EQU 0xFFD50000`	`PSGFREQ0 EQU 0xFFD50000`
`PSGPW0 EQU 0xFFD50001`	`PSGPW0 EQU 0xFFD50001`
`PSGCTRL0 EQU 0xFFD50002`	`PSGCTRL0 EQU 0xFFD50002`
Line 231...	Line 241...
`ETH_MAC_ADDR1 EQU 0x11`	`ETH_MAC_ADDR1 EQU 0x11`
`ETH_HASH0_ADDR EQU 0x12`	`ETH_HASH0_ADDR EQU 0x12`
`ETH_HASH1_ADDR EQU 0x13`	`ETH_HASH1_ADDR EQU 0x13`
`ETH_TXCTRL EQU 0x14`	`ETH_TXCTRL EQU 0x14`

	`ETH_WCTRLDATA EQU 4`
	`ETH_MIICOMMAND_RSTAT EQU 2`
	`ETH_MIISTATUS_BUSY EQU 2`
	`ETH_MIIMODER_RST EQU $200`
	`ETH_MODER_RST EQU $800`
	`ETH_MII_BMCR EQU 0 ; basic mode control register`
	`ETH_MII_ADVERTISE EQU 4`
	`ETH_MII_EXPANSION =6`
	`ETH_MII_CTRL1000 =9`
	`ETH_ADVERTISE_ALL EQU $1E0`
	`ETH_ADVERTISE_1000FULL =0x0200 ; Advertise 1000BASE-T full duplex`
	`ETH_ADVERTISE_1000HALF =0x0100 ; Advertise 1000BASE-T half duplex`
	`ETH_ESTATUS_1000_TFULL =0x2000 ; Can do 1000BT Full`
	`ETH_ESTATUS_1000_THALF =0x1000 ; Can do 1000BT Half`
	`ETH_BMCR_ANRESTART = 0x0200 ; Auto negotiation restart`
	`ETH_BMCR_ISOLATE = 0x0400 ; Disconnect DP83840 from MII`
	`ETH_BMCR_PDOWN = 0x0800 ; Powerdown the DP83840`
	`ETH_BMCR_ANENABLE = 0x1000 ; Enable auto negotiation`

	`ETH_PHY =7`

	`MMU EQU 0xFFDC4000`
	`MMU_KVMMU EQU 0xFFDC4800`
	`MMU_FUSE EQU 0xFFDC4811`
	`MMU_AKEY EQU 0xFFDC4812`
	`MMU_OKEY EQU 0xFFDC4813`
	`MMU_MAPEN EQU 0xFFDC4814`

	`DATETIME EQU 0xFFDC0400`
	`DATETIME_TIME EQU 0xFFDC0400`
	`DATETIME_DATE EQU 0xFFDC0401`
	`DATETIME_ALMTIME EQU 0xFFDC0402`
	`DATETIME_ALMDATE EQU 0xFFDC0403`
	`DATETIME_CTRL EQU 0xFFDC0404`
	`DATETIME_SNAPSHOT EQU 0xFFDC0405`

`SPRITEREGS EQU 0xFFDAD000`	`SPRITEREGS EQU 0xFFDAD000`
`SPRRAM EQU 0xFFD80000`	`SPRRAM EQU 0xFFD80000`

`THRD_AREA EQU 0x04000000 ; threading area 0x04000000-0x40FFFFF`	`THRD_AREA EQU 0x04000000 ; threading area 0x04000000-0x40FFFFF`
`BITMAPSCR EQU 0x04100000`	`BITMAPSCR EQU 0x04100000`
Line 291...	Line 337...
`TCB_iof_next EQU 0x05FBD600`	`TCB_iof_next EQU 0x05FBD600`
`TCB_iof_prev EQU 0x05FBD700`	`TCB_iof_prev EQU 0x05FBD700`
`TCB_SP8Save EQU 0x05FBD800 ; TCB_SP8Save area`	`TCB_SP8Save EQU 0x05FBD800 ; TCB_SP8Save area`
`TCB_SPSave EQU 0x05FBD900 ; TCB_SPSave area`	`TCB_SPSave EQU 0x05FBD900 ; TCB_SPSave area`
`TCB_ABS8Save EQU 0x05FBDA00`	`TCB_ABS8Save EQU 0x05FBDA00`
	`TCB_mmu_map EQU 0x05FBDB00`

`KeybdHead EQU 0x05FBEA00`	`KeybdHead EQU 0x05FBEA00`
`KeybdTail EQU 0x05FBEB00`	`KeybdTail EQU 0x05FBEB00`
`KeybdEcho EQU 0x05FBEC00`	`KeybdEcho EQU 0x05FBEC00`
`KeybdBad EQU 0x05FBED00`	`KeybdBad EQU 0x05FBED00`
`KeybdAck EQU 0x05FBEE00`	`KeybdAck EQU 0x05FBEE00`
`KeybdLocks EQU 0x05FBEF00`	`KeybdLocks EQU 0x05FBEF00`
`KeybdBuffer EQU 0x05FBF000 ; buffer is 16 chars`	`KeybdBuffer EQU 0x05FBF000 ; buffer is 16 chars`

`HeapStart EQU 0x04200000`	`HeapStart EQU 0x04200000`
`HeapEnd EQU 0x05AFFFFF`	`HeapEnd EQU 0x043FFFFF`

`; Bitmap of tasks requesting the I/O focus`	`; Bitmap of tasks requesting the I/O focus`
`;`	`;`
`IOFocusTbl EQU 0x05FBD000`	`IOFocusTbl EQU 0x05FBD000`

Line 316...	Line 363...

`; BIOS vars at the top of the 8kB scratch memory`	`; BIOS vars at the top of the 8kB scratch memory`
`;`	`;`
`; TinyBasic AREA = 0xF00 to 0xF7F`	`; TinyBasic AREA = 0xF00 to 0xF7F`

`HeadRdy0 EQU 0xF80`	`QNdx0 EQU 0xF80`
`HeadRdy1 EQU HeadRdy0+1`	`QNdx1 EQU QNdx0+1`
`HeadRdy2 EQU HeadRdy1+1`	`QNdx2 EQU QNdx1+1`
`HeadRdy3 EQU HeadRdy2+1`	`QNdx3 EQU QNdx2+1`
`HeadRdy4 EQU HeadRdy3+1`	`QNdx4 EQU QNdx3+1`
`TailRdy0 EQU HeadRdy4+1`	`FreeTCB EQU QNdx4+1`
`TailRdy1 EQU TailRdy0+1`
`TailRdy2 EQU TailRdy1+1`
`TailRdy3 EQU TailRdy2+1`
`TailRdy4 EQU TailRdy3+1`
`FreeTCB EQU TailRdy4+1`
`TimeoutList EQU FreeTCB+1`	`TimeoutList EQU FreeTCB+1`
`RunningTCB EQU TimeoutList+1`	`RunningTCB EQU TimeoutList+1`
`FreeMbx EQU RunningTCB + 1`	`FreeMbx EQU RunningTCB + 1`
`nMailbox EQU FreeMbx + 1`	`nMailbox EQU FreeMbx + 1`
`FreeMsg EQU nMailbox + 1`	`FreeMsg EQU nMailbox + 1`
Line 371...	Line 413...
`IRQFlag EQU 0xFC6`	`IRQFlag EQU 0xFC6`
`RdyQueTick EQU 0xFC7`	`RdyQueTick EQU 0xFC7`
`eth_unique_id EQU 0xFC8`	`eth_unique_id EQU 0xFC8`
`LineColor EQU 0xFC9`	`LineColor EQU 0xFC9`
`QIndex EQU 0xFCA`	`QIndex EQU 0xFCA`
	`ROMcs EQU 0xFCB`
	`mmu_present EQU 0xFCC`
	`TestTask EQU 0xFCD`
	`KeybdIsSetup EQU 0xFCE`

`Uart_rxfifo EQU 0x05FBC000`	`Uart_rxfifo EQU 0x05FBC000`
`Uart_rxhead EQU 0xFD0`	`Uart_rxhead EQU 0xFD0`
`Uart_rxtail EQU 0xFD1`	`Uart_rxtail EQU 0xFD1`
`Uart_ms EQU 0xFD2`	`Uart_ms EQU 0xFD2`
Line 396...	Line 442...
`code`	`code`

`message "jump table"`	`message "jump table"`
`; jump table of popular BIOS routines`	`; jump table of popular BIOS routines`
`org $FFFF8000`	`org $FFFF8000`
	`ROMStart:`
`dw DisplayChar`	`dw DisplayChar`
`dw KeybdCheckForKeyDirect`	`dw KeybdCheckForKeyDirect`
`dw KeybdGetCharDirect`	`dw KeybdGetCharDirect`
`dw KeybdGetChar`	`dw KeybdGetChar`
`dw KeybdCheckForKey`	`dw KeybdCheckForKey`
Line 422...	Line 469...
`lda #1`	`lda #1`
`sta LEDS`	`sta LEDS`
`ldx #BIOS_STACKS+0x03FF ; setup stack pointer top of memory`	`ldx #BIOS_STACKS+0x03FF ; setup stack pointer top of memory`
`txs`	`txs`
`trs r0,abs8 ; set 8 bit mode absolute address offset`	`trs r0,abs8 ; set 8 bit mode absolute address offset`
	`lda #3`
	`trs r1,cc ; enable dcache and icache`
	`jsr ROMChecksum`
	`sta ROMcs`
	`stz mmu_present ; assume no mmu`
	`lda CONFIGREC`
	`bit #4096`
	`beq st_nommu`
	`jsr InitMMU ; setup the maps and enable the mmu`
	`lda #1`
	`sta mmu_present`
	`st_nommu:`
`jsr MemInit ; Initialize the heap`	`jsr MemInit ; Initialize the heap`

`lda #2`	`lda #2`
`sta LEDS`	`sta LEDS`

`; setup interrupt vectors`	`; setup interrupt vectors`
`ldx #$05FB0001 ; interrupt vector table from $5FB0000 to $5FB01FF`	`ldx #$05FB0001 ; interrupt vector table from $5FB0000 to $5FB01FF`
`; also sets nmoi policy (native mode on interrupt)`	`; also sets nmoi policy (native mode on interrupt)`
`trs r2,vbr`	`trs r2,vbr`
`dex`	`dex`
	`phx`
	`txy ; y = pointer to vector table`
	`lda #511 ; 512 vectors to setup`
	`ldx #brk_rout ; point vector to brk routine`
	`stos`

	`plx`
`lda #brk_rout`	`lda #brk_rout`
`sta (x)`	`sta (x)`
`lda #slp_rout`	`lda #slp_rout`
`sta 1,x`	`sta 1,x`
	`lda #reschedule`
	`sta 2,x`
`lda #KeybdRST`	`lda #KeybdRST`
`sta 448+1,x`	`sta 448+1,x`
`lda #p1000Hz`	`lda #p1000Hz`
`sta 448+2,x`	`sta 448+2,x`
`lda #p100Hz`	`lda #p100Hz`
Line 466...	Line 533...
`stz IrqBase ; support for EhBASIC's interrupt mechanism`	`stz IrqBase ; support for EhBASIC's interrupt mechanism`
`stz NmiBase`	`stz NmiBase`

`lda #-1`	`lda #-1`
`sta TimeoutList ; no entries in timeout list`	`sta TimeoutList ; no entries in timeout list`
`sta HeadRdy0 ; task zero (the BIOS task) is always present`	`sta QNdx0`
`sta HeadRdy1`	`sta QNdx1`
`sta HeadRdy2`	`sta QNdx2`
`sta HeadRdy3`	`sta QNdx3`
`sta HeadRdy4`	`sta QNdx4`
`sta TailRdy0`
`sta TailRdy1`
`sta TailRdy2`
`sta TailRdy3`
`sta TailRdy4`


`; Initialize IO Focus List`	`; Initialize IO Focus List`
`;`	`;`
`ldx #1`	`lda #7`
`st5:`	`ldx #0`
`stz IOFocusTbl,x`	`ldy #IOFocusTbl`
`inx`	`stos`
`cpx #8`
`bne st5`

`ldx #1`	`lda #255`
`lda #-1`	`ldx #-1`
`st9:`	`ldy #TCB_iof_next`
`sta TCB_iof_next,x`	`stos`
`sta TCB_iof_prev,x`	`lda #255`
`inx`	`ldx #-1`
`cpx #256`	`ldy #TCB_iof_prev`
`bne st9`	`stos`

`; Initialize free message list`	`; Initialize free message list`
`lda #8192`	`lda #8192`
`sta nMsgBlk`	`sta nMsgBlk`
`stz FreeMsg`	`stz FreeMsg`
Line 544...	Line 604...
`sta TCB_NxtTCB+255`	`sta TCB_NxtTCB+255`
`lda #4`	`lda #4`
`sta LEDS`	`sta LEDS`

`; Manually setup the BIOS task`	`; Manually setup the BIOS task`
`lda #-1`
`stz RunningTCB ; BIOS is task #0`	`stz RunningTCB ; BIOS is task #0`
`sta TCB_NxtRdy ; manually build the ready list`	`stz TCB_NxtRdy ; manually build the ready list`
`sta TCB_PrvRdy`	`stz TCB_PrvRdy`
`stz HeadRdy0 ; insert at priority 4`	`stz QNdx0 ; insert at priority 0`
`stz TailRdy0`
`stz TCB_iof_next ; manually build the IO focus list`	`stz TCB_iof_next ; manually build the IO focus list`
`stz TCB_iof_prev`	`stz TCB_iof_prev`
`stz IOFocusNdx ; task #0 has the focus`	`stz IOFocusNdx ; task #0 has the focus`
`lda #1`	`lda #1`
`sta IOFocusTbl ; set the task#0 request bit`	`sta IOFocusTbl ; set the task#0 request bit`
`lda #0`	`lda #0`
`sta TCB_Priority`	`sta TCB_Priority`
	`stz TCB_Timeout`
`lda #TS_RUNNING\|TS_READY`	`lda #TS_RUNNING\|TS_READY`
`sta TCB_Status`	`sta TCB_Status`
`stz TCB_CursorRow`	`stz TCB_CursorRow`
`stz TCB_CursorCol`	`stz TCB_CursorCol`

Line 574...	Line 633...
`sta ScreenColor`	`sta ScreenColor`
`sta CharColor`	`sta CharColor`
`sta CursorFlash`	`sta CursorFlash`
`jsr ClearScreen`	`jsr ClearScreen`
`jsr ClearBmpScreen`	`jsr ClearBmpScreen`
	`jsr PICInit`
	`; Enable interrupts`
	`; This will likely cause an interrupt right away because the timer`
	`; pulses run since power-up.`
	`cli`
`lda #4`	`lda #4`
`ldx #0`	`ldx #0`
`ldy #IdleTask`	`ldy #IdleTask`
`jsr StartTask`	`jsr StartTask`
`jsr PICInit`
`lda CONFIGREC ; do we have a serial port ?`	`lda CONFIGREC ; do we have a serial port ?`
`bit #32`	`bit #32`
`beq st7`	`beq st7`
`; 19200 * 16`	`; 19200 * 16`
`;-------------`	`;-------------`
Line 616...	Line 679...
`sta LEDS`	`sta LEDS`
`jsr HomeCursor`	`jsr HomeCursor`
`lda #msgStart`	`lda #msgStart`
`jsr DisplayStringB`	`jsr DisplayStringB`
`jsr ReportMemFree`	`jsr ReportMemFree`
	`lda #msgChecksum`
	`jsr DisplayStringB`
	`lda ROMcs`
	`jsr DisplayWord`
	`jsr CRLF`
`lda #10`	`lda #10`
`sta LEDS`	`sta LEDS`

`; The AC97 setup uses the millisecond counter and the`	`; The AC97 setup uses the millisecond counter and the`
`; keyboard.`	`; keyboard.`
`lda CONFIGREC ; do we have a sound generator ?`	`lda CONFIGREC ; do we have a sound generator ?`
`bit #4`	`bit #4`
`beq st6`	`beq st6`
`jsr SetupAC97`	`jsr SetupAC97`
`lda #2`	`lda #4`
`ldx #0`	`ldx #0`
`ldy #Beep`	`ldy #Beep`
`jsr StartTask`	`; jsr StartTask`
`st6:`	`st6:`
`lda #11`	`lda #11`
`sta LEDS`	`sta LEDS`
`jmp Monitor`	`jmp Monitor`
`st1`	`st1`
Line 642...	Line 710...
`bra start`	`bra start`

`msgStart`	`msgStart`
`db "RTF65002 system starting.",$0d,$0a,00`	`db "RTF65002 system starting.",$0d,$0a,00`

	`;------------------------------------------------------------------------------`
	`; InitMMU`
	`;`
	`; Initialize the 64 maps of the MMU.`
	`; Initially all the maps are set the same:`
	`; Virtual Page Physical Page`
	`; 000-255 000-255`
	`; 256-511 1792-2047`
	`; Note that there are only 512 virtual pages per map, and 2048 real`
	`; physical pages of memory. This limits maps to 32MB.`
	`; This range includes the BIOS assigned stacks for the tasks and tasks`
	`; virtual video buffers. It also includes the bitmap screen buffer.`
	`; Note that physical pages 256 to 1791 are not mapped, but do exist.`
	`; If changing the maps the last 128 pages (8MB) of the map should always point`
	`; to the BIOS area. Don't change map entries 384-511 or the system may`
	`; crash.`
	`; If the rts at the end of this routine works, then memory was mapped`
	`; successfully.`
	`;------------------------------------------------------------------------------`
	`InitMMU:`
	`lda #1`
	`sta MMU_KVMMU+1`
	`dea`
	`sta MMU_KVMMU`
	`immu1:`
	`sta MMU_AKEY ; set access key for map`
	`ldy #0 ;`
	`ldx #0`
	`immu2:`
	`; set the first 256 pages to physical page 0-255`
	`; set the last 256 pages to physical page 1792-2047`
	`ld r4,r3`
	`bit r3,#$0100`
	`beq immu3`
	`add r4,r4,#1536`
	`immu3:`
	`st r4,MMU,x`
	`iny`
	`inx`
	`cpx #512`
	`bne immu2`
	`ina`
	`cmp #64 ; 64 MMU maps`
	`bne immu1`
	`stz MMU_OKEY ; set operating key to map #0`
	`lda #2`
	`sta MMU_FUSE ; set fuse to 2 clocks before mapping starts`
	`nop`
	`nop`

	`EnableMMUMapping:`
	`pha`
	`lda #1`
	`sta MMU_MAPEN`
	`pla`
	`rts`
	`DisableMMUMapping:`
	`stz MMU_MAPEN`
	`rts`

	`;------------------------------------------------------------------------------`
	`; The ROM contents are summed up to ensure the ROM is okay.`
	`;------------------------------------------------------------------------------`
	`ROMChecksum:`
	`lda #0`
	`ldx #ROMStart>>2`
	`idc1:`
	`add (x)`
	`inx`
	`cpx #$100000000>>2`
	`bne idc1`
	`cmp #0 ; The sum of all the words in the`
	`; ROM should be zero.`
	`rts`

	`msgChecksum:`
	`db CR,LF,"ROM checksum: ",0`

`;----------------------------------------------------------`	`;----------------------------------------------------------`
`; Initialize programmable interrupt controller (PIC)`	`; Initialize programmable interrupt controller (PIC)`
`; 0 = nmi (parity error)`	`; 0 = nmi (parity error)`
`; 1 = keyboard reset`	`; 1 = keyboard reset`
`; 2 = 1000Hz pulse`	`; 2 = 1000Hz pulse`
Line 678...	Line 824...
`jsr DisplayStringB`	`jsr DisplayStringB`
`ldy #0`	`ldy #0`
`php`	`php`
`sei`	`sei`
`dtl2:`	`dtl2:`
`lda HeadRdy0,y`	`lda QNdx0,y`
`ld r4,r1`	`ld r4,r1`
`bmi dtl1`	`bmi dtl1`
`dtl3:`	`dtl3:`
`ldx #3`	`ldx #3`
`tya`	`tya`
Line 713...	Line 859...
`jsr DisplayChar`	`jsr DisplayChar`
`lda TCB_Timeout,r4`	`lda TCB_Timeout,r4`
`jsr DisplayWord`	`jsr DisplayWord`
`jsr CRLF`	`jsr CRLF`
`ld r4,TCB_NxtRdy,r4`	`ld r4,TCB_NxtRdy,r4`
`bpl dtl3`	`cmp r4,QNdx0,y`
	`bne dtl3`
`dtl1:`	`dtl1:`
`iny`	`iny`
`cpy #5`	`cpy #5`
`bne dtl2`	`bne dtl2`
`plp`	`plp`
Line 730...	Line 877...
`msgTaskList:`	`msgTaskList:`
`db CR,LF,"Pri Task Stat Prv Nxt Timeout",CR,LF,0`	`db CR,LF,"Pri Task Stat Prv Nxt Timeout",CR,LF,0`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`message "DumpTimeoutList"`
	`DumpTimeoutList:`
	`pha`
	`phx`
	`phy`
	`push r4`
	`lda #msgTimeoutList`
	`jsr DisplayStringB`
	`php`
	`sei`
	`dtol2:`
	`lda TimeoutList`
	`ld r4,r1`
	`bmi dtol1`
	`dtol3:`
	`ld r1,r4`
	`ldx #3`
	`jsr PRTNUM`
	`lda #' '`
	`jsr DisplayChar`
	`jsr DisplayChar`
	`jsr DisplayChar`
	`ld r1,r4`
	`ldx #3`
	`lda TCB_PrvRdy,r4`
	`jsr PRTNUM`
	`lda #' '`
	`jsr DisplayChar`
	`ldx #3`
	`lda TCB_NxtRdy,r4`
	`jsr PRTNUM`
	`lda #' '`
	`jsr DisplayChar`
	`lda TCB_Timeout,r4`
	`jsr DisplayWord`
	`jsr CRLF`
	`ld r4,TCB_NxtRdy,r4`
	`bpl dtol3`
	`dtol1:`
	`plp`
	`pop r4`
	`ply`
	`plx`
	`pla`
	`rts`

	`msgTimeoutList:`
	`db CR,LF,"Task Prv Nxt Timeout",CR,LF,0`

	`;------------------------------------------------------------------------------`
	`;------------------------------------------------------------------------------`
`message "DumpIOFocusList"`	`message "DumpIOFocusList"`
`DumpIOFocusList:`	`DumpIOFocusList:`
`pha`	`pha`
`phx`	`phx`
`phy`	`phy`
Line 771...	Line 969...

`msgIOFocusList:`	`msgIOFocusList:`
`db CR,LF,"Task Prv Nxt",CR,LF,0`	`db CR,LF,"Task Prv Nxt",CR,LF,0`

`RunningTCBErr:`	`RunningTCBErr:`
`lda #$FF`	`; lda #$FF`
`sta LEDS`	`; sta LEDS`
`lda #msgRunningTCB`	`lda #msgRunningTCB`
`jsr DisplayStringB`	`jsr DisplayStringB`
`rtcberr1:`	`rtcberr1:`
`jsr KeybdGetChar`	`jsr KeybdGetChar`
`cmp #-1`	`cmp #-1`
Line 785...	Line 983...

`msgRunningTCB:`	`msgRunningTCB:`
`db CR,LF,"RunningTCB is bad.",CR,LF,0`	`db CR,LF,"RunningTCB is bad.",CR,LF,0`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; IdleTask`
	`;`
`; IdleTask is a low priority task that is always running. It runs when there`	`; IdleTask is a low priority task that is always running. It runs when there`
`; is nothing else to run.`	`; is nothing else to run.`
	`; This task check for tasks that are stuck in infinite loops and kills them.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`IdleTask:`	`IdleTask:`
`inc TEXTSCR+167 ; increment IDLE active flag`	`stz TestTask`
	`it2:`
	`inc TEXTSCR+111 ; increment IDLE active flag`
	`ldx TestTask`
	`and r2,r2,#$FF`
	`beq it1`
	`lda TCB_Status,x`
	`cmp #TS_SLEEP`
	`bne it1`
	`txa`
	`jsr KillTask`
	`it1:`
	`inc TestTask`
`cli ; enable interrupts`	`cli ; enable interrupts`
`wai ; wait for one to happen`	`wai ; wait for one to happen`
`bra IdleTask`	`bra it2`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; StartTask`
	`;`
	`; Startup a task. The task is automatically allocated a 1kW stack from the BIOS`
	`; stacks area. The scheduler is invoked after the task is added to the ready`
	`; list.`
	`;`
	`; Parameters:`
`; r1 = task priority`	`; r1 = task priority`
`; r2 = start flags`	`; r2 = start flags`
`; r3 = start address`	`; r3 = start address`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`message "StartTask"`	`message "StartTask"`
Line 809...	Line 1029...
`push r4`	`push r4`
`push r5`	`push r5`
`push r6`	`push r6`
`push r7`	`push r7`
`push r8`	`push r8`
`tsr sp,r4 ; save off current stack pointer`
`ld r6,r1 ; r6 = task priority`	`ld r6,r1 ; r6 = task priority`
`ld r8,r2`	`ld r8,r2 ; r8 = flag register value on startup`

`; get a free TCB`	`; get a free TCB`
`;`	`;`
`php`	`php`
`sei`	`sei`
Line 823...	Line 1042...
`bmi stask1`	`bmi stask1`
`tax`	`tax`
`lda TCB_NxtTCB,x`	`lda TCB_NxtTCB,x`
`sta FreeTCB ; update the FreeTCB list pointer`	`sta FreeTCB ; update the FreeTCB list pointer`
`plp`	`plp`
`txa`	`txa ; acc = TCB index (task number)`

`; setup the stack for the task`	`; setup the stack for the task`
	`; Zap the stack memory.`
`ld r7,r2`	`ld r7,r2`
`asl r2,r2,#10 ; 1kW stack per task`	`asl r2,r2,#10 ; 1kW stack per task`
`add r2,r2,#BIOS_STACKS+0x3ff ; add in stack base`	`add r2,r2,#BIOS_STACKS ;+0x3ff ; add in stack base`
	`pha`
	`phx`
	`phy`
	`txy ; y = target address`
	`ldx #ExitTask ; x = fill value`
	`lda #$3FF ; acc = # words to fill -1`
	`stos`
	`ply`
	`plx`
	`pla`

	`add r2,r2,#$3FF ; Move pointer to top of stack`
	`php`
	`tsr sp,r4 ; save off current stack pointer`
	`sei`
`txs`	`txs`
`ldx #$FF`	`ldx #$1FF`
`stx TCB_SP8Save,r7`	`stx TCB_SP8Save,r7`
`st r6,TCB_Priority,r7`	`st r6,TCB_Priority,r7`
`stz TCB_Status,r7`	`stz TCB_Status,r7`
`stz TCB_Timeout,r7`	`stz TCB_Timeout,r7`
`; setup virtual video for the task`	`; setup virtual video for the task`
`stz TCB_CursorRow,r7`	`stz TCB_CursorRow,r7`
`stz TCB_CursorCol,r7`	`stz TCB_CursorCol,r7`
	`stz TCB_mmu_map,r7 ; use mmu map #0`
	`stz TCB_ABS8Save,r7`

`; setup the initial stack image for the task`	`; setup the initial stack image for the task`
`; Cause a return to the ExitTask routine when the task does a`	`; Cause a return to the ExitTask routine when the task does a`
`; final rts.`	`; final rts.`
`; fake an IRQ call by stacking the return address and processor`	`; fake an IRQ call by stacking the return address and processor`
Line 860...	Line 1097...
`; now restore the current stack pointer`	`; now restore the current stack pointer`
`trs r4,sp`	`trs r4,sp`

`; Insert the task into the ready list`	`; Insert the task into the ready list`
`jsr AddTaskToReadyList`	`jsr AddTaskToReadyList`
	`plp`
	`int #2 ; invoke the scheduler`
`stask2:`	`stask2:`
`pop r8`	`pop r8`
`pop r7`	`pop r7`
`pop r6`	`pop r6`
`pop r5`	`pop r5`
Line 880...	Line 1119...

`msgNoTCBs:`	`msgNoTCBs:`
`db "No more task control blocks available.",CR,LF,0`	`db "No more task control blocks available.",CR,LF,0`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; ExitTask`
	`;`
`; This routine is called when the task exits with an rts instruction. OR`	`; This routine is called when the task exits with an rts instruction. OR`
`; it may be invoked with a JMP ExitTask. In either case the task must be`	`; it may be invoked with a JMP ExitTask. In either case the task must be`
`; running so it can't be on the timeout list.`	`; running so it can't be on the timeout list. The scheduler is invoked`
	`; after the task is removed from the ready list.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`message "ExitTask"`	`message "ExitTask"`
`ExitTask:`	`ExitTask:`
`sei`	`sei`
`; release any aquired resources`	`; release any aquired resources`
`; - mailboxes`	`; - mailboxes`
`; - messages`	`; - messages`
	`hoff`
`lda RunningTCB`	`lda RunningTCB`
`bmi RunningTCBErr`	`cmp #MAX_TASKNO`
	`bhi xtsk1`
`jsr RemoveTaskFromReadyList`	`jsr RemoveTaskFromReadyList`
	`jsr RemoveFromTimeoutList`
`stz TCB_Status,r1 ; set task status to TS_NONE`	`stz TCB_Status,r1 ; set task status to TS_NONE`
`jsr ReleaseIOFocus`	`jsr ReleaseIOFocus`
	`ldx #86`
	`stx LEDS`
`ldx FreeTCB ; add the task control block to the free list`	`ldx FreeTCB ; add the task control block to the free list`
`stx TCB_NxtTCB,r1`	`stx TCB_NxtTCB,r1`
`sta FreeTCB`	`sta FreeTCB`
	`xtsk1:`
`jmp SelectTaskToRun`	`jmp SelectTaskToRun`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; r1 = task number`
	`; r2 = new priority`
	`;------------------------------------------------------------------------------`
	`SetTaskPriority:`
	`cmp #MAX_TASKNO ; make sure task number is reasonable`
	`bhi stp1`
	`cpx #5 ; make sure priority is okay`
	`bhs stp1`
	`phy`
	`php`
	`sei`
	`ldy TCB_Status,r1 ; if the task is on the ready list`
	`bit r3,#TS_READY\|TS_RUNNING ; then remove it and re-add it.`
	`beq stp2 ; Otherwise just go set the priority field`
	`jsr RemoveTaskFromReadyList`
	`stx TCB_Priority,r1`
	`jsr AddTaskToReadyList`
	`plp`
	`ply`
	`stp1:`
	`rts`
	`stp2:`
	`stx TCB_Priority,r1`
	`plp`
	`ply`
	`rts`

	`;------------------------------------------------------------------------------`
`; AddTaskToReadyList`	`; AddTaskToReadyList`
`; This subroutine is called from the timer ISR so it must be relatively`	`;`
`; fast.`	`; The ready list is a group of five ready lists, one for each priority`
	`; level. Each ready list is organized as a doubly linked list to allow fast`
	`; insertions and removals. The list is organized as a ring (or bubble) with`
	`; the last entry pointing back to the first. This allows a fast task switch`
	`; to the next task. Which task is at the head of the list is maintained`
	`; in the variable QNdx for the priority level.`
	`;`
	`; Registers Affected: none`
`; Parameters:`	`; Parameters:`
`; r1 = task number`	`; r1 = task number`
`; Returns:`	`; Returns:`
`; none`	`; none`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`;`
`message "AddTaskToReadyList"`	`message "AddTaskToReadyList"`
`AddTaskToReadyList:`	`AddTaskToReadyList:`
`php`	`php`
`pha`
`phx`	`phx`
`phy`	`phy`
`sei`	`sei`
`ldy TCB_Priority,r1`	`ldx #TS_READY`
`ldx TCB_Status,r1 ; set the task status to ready`
`or r2,r2,#TS_READY`
`stx TCB_Status,r1`	`stx TCB_Status,r1`
`ldx TailRdy0,y ; insert the task at the list tail`	`ldy TCB_Priority,r1`
`bmi arl1 ; if no tail, then either the list is screwed up, or no tasks are on it.`	`ldx QNdx0,y`
`sta TCB_NxtRdy,x ; add as next ready on tail`	`bmi arl5`
`arl4:`	`ldy TCB_PrvRdy,x`
`stx TCB_PrvRdy,r1 ; the old tail is the previous task on the list now.`	`sta TCB_NxtRdy,y`
`sta TailRdy0,y ; update with new tail`	`sty TCB_PrvRdy,r1`
`ldx #-1`	`sta TCB_PrvRdy,x`
`stx TCB_NxtRdy,r1 ; There is no next ready task to the tail.`	`stx TCB_NxtRdy,r1`
`ldx HeadRdy0,y ; check if the head of the ready list needs to be updated`
`bpl arl3`
`sta HeadRdy0,y ; Update the head of the ready list.`
`ldx #-1 ; There is no previous task at the head.`
`stx TCB_PrvRdy,r1`
`arl3:`	`arl3:`
`ply`	`ply`
`plx`	`plx`
`pla`
`plp`	`plp`
`rts`	`rts`
`; Here the tail of the ready list needed to be updated. Flag no prior task.`
`arl1:`	`; Here the ready list was empty, so add at head`
`ldx #-1`	`arl5:`
`bra arl4`	`sta QNdx0,y`
	`sta TCB_NxtRdy,r1`
	`sta TCB_PrvRdy,r1`
	`ply`
	`plx`
	`plp`
	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; RemoveTaskFromReadyList`	`; RemoveTaskFromReadyList`
	`;`
`; This subroutine removes a task from the ready list.`	`; This subroutine removes a task from the ready list.`
`; This can be called from within an ISR.`
`;`	`;`
	`; Registers Affected: none`
	`; Parameters:`
	`; r1 = task number`
	`; Returns:`
`; r1 = task number`	`; r1 = task number`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`

`message "RemoveTaskFromReadyList"`	`message "RemoveTaskFromReadyList"`
`RemoveTaskFromReadyList:`	`RemoveTaskFromReadyList:`
`php ; save off interrupt mask state`	`php ; save off interrupt mask state`
`pha`
`phx`	`phx`
`phy`	`phy`
`push r4`	`push r4`
`push r5`	`push r5`

`sei`	`sei`
	`ldy TCB_Status,r1 ; is the task on the ready list ?`
	`bit r3,#TS_READY\|TS_RUNNING`
	`beq rfr2`
	`stz TCB_Status,r1 ; task status = TS_NONE`
`ld r4,TCB_NxtRdy,r1 ; Get previous and next fields.`	`ld r4,TCB_NxtRdy,r1 ; Get previous and next fields.`
`ld r5,TCB_PrvRdy,r1 ; if there is no previous task, then this is`	`ld r5,TCB_PrvRdy,r1`
`bmi rfr1 ; the head of the list. Update.`
`st r4,TCB_NxtRdy,r5`	`st r4,TCB_NxtRdy,r5`
`cmp r4,#0 ; is there a next task to update ?`
`bmi rfr4`
`st r5,TCB_PrvRdy,r4`	`st r5,TCB_PrvRdy,r4`
`bra rfr4`

`; Update the head of the list`
`rfr1:`
`ldy TCB_Priority,r1`	`ldy TCB_Priority,r1`
`st r4,HeadRdy0,y`	`cmp r1,QNdx0,y ; Are we removing the QNdx task ?`
`cmp r4,#0 ; did we empty the list ?`	`bne rfr2`
`bmi rfr3`	`st r4,QNdx0,y`
`ld r5,#-1 ; flag no previous task for head of list`	`; Now we test for the case where the task being removed was the only one`
`st r5,TCB_PrvRdy,r4`	`; on the ready list of that priority level. We can tell because the`
`rfr4:`	`; NxtRdy would point to the task itself.`
`stz TCB_NxtRdy,r1 ; Task is removed from ready list so the`	`cmp r4,r1`
`stz TCB_PrvRdy,r1 ; contents of these fields shouldn't matter.`	`bne rfr2`
`; They are set to zero (the BIOS task) in case`	`ldx #-1 ; Make QNdx negative`
`; there is a list problem.`	`stx QNdx0,y`
	`stx TCB_NxtRdy,r1`
`ldx TCB_Status,r1 ; set the task status to no longer ready.`	`stx TCB_PrvRdy,r1`
`and r2,r2,#~TS_READY`
`stx TCB_Status,r1`
`rfr2:`	`rfr2:`
`pop r5`	`pop r5`
`pop r4`	`pop r4`
`ply`	`ply`
`plx`	`plx`
`pla`
`plp`	`plp`
`rfr9:`
`rts`	`rts`
`rfr3:`
`st r4,TailRdy0,y ;`
`bra rfr4`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; AddToTimeoutList`	`; AddToTimeoutList`
`; AddToTimeoutList adds a task to the timeout list. The task is placed in the`	`; AddToTimeoutList adds a task to the timeout list. The task is placed in the`
`; list depending on it's timeout value.`	`; list depending on it's timeout value.`
`;`	`;`
	`; Registers Affected: none`
`; Parameters:`	`; Parameters:`
`; r1 = task`	`; r1 = task`
`; r2 = timeout value`	`; r2 = timeout value`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`message "AddToTimeoutList"`	`message "AddToTimeoutList"`
`AddToTimeoutList:`	`AddToTimeoutList:`
`cmp #0 ; quickly validate the task number`	`php`
`bmi RunningTCBErr ; must be between 0 and 255`
`cmp #MAX_TASKNO`
`bpl RunningTCBErr`

`phx`	`phx`
`push r4`	`push r4`
`push r5`	`push r5`
`php`
`sei`	`sei`

`ld r5,#-1`	`ld r5,#-1`
`ld r4,TimeoutList ; are there any tasks on the timeout list ?`	`ld r4,TimeoutList ; are there any tasks on the timeout list ?`
`bmi attl1`	`cmp r4,#MAX_TASKNO`
	`bhi attl1`
`attl_check_next:`	`attl_check_next:`
`sub r2,r2,TCB_Timeout,r4 ; is this timeout > next`	`sub r2,r2,TCB_Timeout,r4 ; is this timeout > next`
`bmi attl_insert_before`	`bmi attl_insert_before`
`ld r5,r4`	`ld r5,r4`
`ld r4,TCB_NxtRdy,r4`	`ld r4,TCB_NxtRdy,r4`
`bpl attl_check_next`	`cmp r4,#MAX_TASKNO`
	`bls attl_check_next`

`; Here we scanned until the end of the timeout list and didn't find a`	`; Here we scanned until the end of the timeout list and didn't find a`
`; timeout of a greater value. So we add the task to the end of the list.`	`; timeout of a greater value. So we add the task to the end of the list.`
`attl_add_at_end:`	`attl_add_at_end:`
`st r4,TCB_NxtRdy,r1 ; r4 was = -1`	`st r4,TCB_NxtRdy,r1 ; r4 was = -1`
Line 1042...	Line 1315...
`st r5,TCB_PrvRdy,r1`	`st r5,TCB_PrvRdy,r1`
`st r2,TCB_Timeout,r1`	`st r2,TCB_Timeout,r1`
`bra attl_exit`	`bra attl_exit`

`attl_insert_before:`	`attl_insert_before:`
`cmp r5,#-1`	`cmp r5,#MAX_TASKNO`
`beq attl2`	`bhi attl2`
`st r4,TCB_NxtRdy,r1 ; next on list goes after this task`	`st r4,TCB_NxtRdy,r1 ; next on list goes after this task`
`st r5,TCB_PrvRdy,r1 ; set previous link`	`st r5,TCB_PrvRdy,r1 ; set previous link`
`st r1,TCB_NxtRdy,r5`	`st r1,TCB_NxtRdy,r5`
`st r1,TCB_PrvRdy,r4`	`st r1,TCB_PrvRdy,r4`
`bra attl3`	`bra attl3`
Line 1074...	Line 1347...
`stx TCB_Timeout,r1`	`stx TCB_Timeout,r1`
`ldx #-1 ; flag no more entries in timeout list`	`ldx #-1 ; flag no more entries in timeout list`
`stx TCB_NxtRdy,r1 ; no next entries`	`stx TCB_NxtRdy,r1 ; no next entries`
`stx TCB_PrvRdy,r1 ; and no prev entries`	`stx TCB_PrvRdy,r1 ; and no prev entries`
`attl_exit:`	`attl_exit:`
`ldx TCB_Status,r1 ; set the task's status as timing out`	`ldx #TS_TIMEOUT ; set the task's status as timing out`
`or r2,r2,#TS_TIMEOUT`
`stx TCB_Status,r1`	`stx TCB_Status,r1`
`plp`
`pop r5`	`pop r5`
`pop r4`	`pop r4`
`plx`	`plx`
`attl4:`	`plp`
`rts`	`rts`
	`msgTimeout1:`
	`db CR,LF,"Adding to timeout list:",CR,LF,0`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; RemoveFromTimeoutList`
	`;`
`; This subroutine is called from within the timer ISR when the task's`	`; This subroutine is called from within the timer ISR when the task's`
`; timeout expires.`	`; timeout expires. It may also be called when a task is killed.`
`;`	`;`
	`; Registers Affected: none`
	`; Parameters:`
`; r1 = task number`	`; r1 = task number`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`message "RemoveFromTimeoutList"`	`message "RemoveFromTimeoutList"`
`RemoveFromTimeoutList:`	`RemoveFromTimeoutList:`
`cmp #0 ; quickly validate the task number`	`php`
`bmi RunningTCBErr ; must be between 0 and 255`
`cmp #MAX_TASKNO`
`bpl RunningTCBErr`

`pha`
`phx`	`phx`
`push r4`	`push r4`
`push r5`	`push r5`
`php`
`sei`	`sei`

	`ld r4,TCB_Status,r1 ; Is the task even on the timeout list ?`
	`bit #TS_TIMEOUT`
	`beq rftl5`
	`cmp TimeoutList ; Are we removing the head of the list ?`
	`beq rftl2`
`ld r4,TCB_PrvRdy,r1 ; adjust the links of the next and previous`	`ld r4,TCB_PrvRdy,r1 ; adjust the links of the next and previous`
`bmi rftl2`	`bmi rftl3 ; no previous link - list corrupt?`
`ld r5,TCB_NxtRdy,r1 ; tasks on the list to point around the task`	`ld r5,TCB_NxtRdy,r1 ; tasks on the list to point around the task`
`st r5,TCB_NxtRdy,r4`	`st r5,TCB_NxtRdy,r4`
`bmi rftl1`	`bmi rftl3`
`st r4,TCB_PrvRdy,r5`	`st r4,TCB_PrvRdy,r5`
`ldx TCB_Timeout,r1 ; update the timeout of the next on list`	`ldx TCB_Timeout,r1 ; update the timeout of the next on list`
`add r2,r2,TCB_Timeout,r5 ; with any remaining timeout in the task`	`add r2,r2,TCB_Timeout,r5 ; with any remaining timeout in the task`
`stx TCB_Timeout,r5 ; removed from the list`	`stx TCB_Timeout,r5 ; removed from the list`

`; Here there is no next item on the list`
`rftl1:`
`bra rftl3`	`bra rftl3`

`; Here there is no previous item on the list, so update the head of`	`; Update the head of the list.`
`; the list.`
`rftl2:`	`rftl2:`
`ld r5,TCB_NxtRdy,r1`	`ld r5,TCB_NxtRdy,r1`
`st r5,TimeoutList ; store next field into list head`	`st r5,TimeoutList ; store next field into list head`
`bmi rftl3`	`bmi rftl3`
`ld r4,TCB_Timeout,r1 ; add any remaining timeout to the timeout`	`ld r4,TCB_Timeout,r1 ; add any remaining timeout to the timeout`
Line 1133...	Line 1405...
`sta TCB_PrvRdy,r5`	`sta TCB_PrvRdy,r5`

`; Here there is no previous or next items in the list, so the list`	`; Here there is no previous or next items in the list, so the list`
`; will be empty once this task is removed from it.`	`; will be empty once this task is removed from it.`
`rftl3:`	`rftl3:`
`ldx TCB_Status,r1 ; set the task status to not timing out`	`stz TCB_Status,r1 ; set the task status to TS_NONE`
`and r2,r2,#~TS_TIMEOUT`	`ldx #-1 ; make sure the next and prev fields indicate`
`stx TCB_Status,r1`	`stx TCB_NxtRdy,r1 ; the task is not on a list.`
`plp`	`stx TCB_PrvRdy,r1`
	`rftl5:`
`pop r5`	`pop r5`
`pop r4`	`pop r4`
`plx`	`plx`
`pla`	`plp`
`rft4:`
`rts`	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; Sleep`
	`;`
	`; Put the currently running task to sleep for a specified time.`
	`;`
	`; Registers Affected: none`
`; Parameters:`	`; Parameters:`
`; r1 = time duration in centi-seconds (1/100 second).`	`; r1 = time duration in centi-seconds (1/100 second).`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`Sleep:`	`Sleep:`
	`php`
	`pha`
	`phx`
`tax`	`tax`
`sei`	`sei`
`lda RunningTCB`	`lda RunningTCB`
`jsr RemoveTaskFromReadyList`	`jsr RemoveTaskFromReadyList`
`jsr AddToTimeoutList`	`jsr AddToTimeoutList ; The scheduler will be returning to this`
`ldx #SleepRet ; The scheduler will be returning to this`	`int #2 ; task eventually, once the timeout expires,`
`jmp PushRegsAndRunTask ; task eventually, once the timeout expires,`
`; so fake an interrupt call`
`SleepRet:`	`SleepRet:`
`cli`	`plx`
	`pla`
	`plp`
	`rts`

	`;------------------------------------------------------------------------------`
	`; KillTask`
	`;`
	`; "Kills" a task, removing it from all system lists. If the task has the`
	`; IO focus, the IO focus is switched. Task #0 is immortal and cannot be`
	`; killed.`
	`;`
	`; Registers Affected: none`
	`; Parameters:`
	`; r1 = task number`
	`;------------------------------------------------------------------------------`
	`;`
	`KillTask:`
	`php`
	`phx`
	`cmp #1 ; BIOS task and IDLE task are immortal`
	`bls kt1`
	`cmp #MAX_TASKNO`
	`bhi kt1`
	`sei`
	`jsr ForceReleaseIOFocus`
	`jsr RemoveTaskFromReadyList`
	`jsr RemoveFromTimeoutList`
	`stz TCB_Status,r1 ; set task status to TS_NONE`
	`ldx FreeTCB ; add the task control block to the free list`
	`stx TCB_NxtTCB,r1`
	`sta FreeTCB`
	`int #2 ; invoke scheduler to reschedule tasks`
	`kt1:`
	`plx`
	`plp`
`rts`	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Allocate a mailbox`	`; Allocate a mailbox`
`; r1 = pointer to place to store handle`	`; r1 = pointer to place to store handle`
Line 1314...	Line 1627...
`dtfm5:`	`dtfm5:`
`ld r4,#-1`	`ld r4,#-1`
`st r4,TCB_mbq_next,r5`	`st r4,TCB_mbq_next,r5`
`st r4,TCB_mbq_prev,r5`	`st r4,TCB_mbq_prev,r5`
`stz TCB_hWaitMbx,r5`	`stz TCB_hWaitMbx,r5`
`lda TCB_Status,r5`	`stz TCB_Status,r5 ; set task status = TS_NONE`
`and #~TS_WAITMSG`
`sta TCB_Status,r5`
`pop r5`	`pop r5`
`pop r4`	`pop r4`
`plp`	`plp`
`lda #E_Ok`	`lda #E_Ok`
`rts`	`rts`
Line 1333...	Line 1644...
`; r2 = message D1`	`; r2 = message D1`
`; r3 = message D2`	`; r3 = message D2`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`message "SendMsg"`	`message "SendMsg"`
`SendMsg:`	`SendMsg:`
`cmp #0 ; check the mailbox number to make sure`	`cmp #2047 ; check the mailbox number to make sure`
`bmi smsg1 ; that it's sensible`	`bhi smsg1 ; that it's sensible`
`cmp #2047`
`bpl smsg1`
`push r4`	`push r4`
`push r5`	`push r5`
`push r6`	`push r6`
`php`	`php`
`sei`	`sei`
Line 1380...	Line 1689...
`ld r5,TCB_MSGPTR_D2,r6`	`ld r5,TCB_MSGPTR_D2,r6`
`beq smsg7`	`beq smsg7`
`sty (r5)`	`sty (r5)`
`smsg7:`	`smsg7:`
`ld r5,TCB_Status,r6`	`ld r5,TCB_Status,r6`
`and r5,r5,#TS_TIMEOUT`	`bit r5,#TS_TIMEOUT`
`beq smsg8`	`beq smsg8`
`ld r1,r6`	`ld r1,r6`
`jsr RemoveFromTimeoutList`	`jsr RemoveFromTimeoutList`
`smsg8:`	`smsg8:`
`ld r1,r6`	`ld r1,r6`
`jsr AddTaskToReadyList`	`jsr AddTaskToReadyList`
	`int #2 ; invoke the scheduler`
`smsg5:`	`smsg5:`
`plp`	`plp`
`pop r6`	`pop r6`
`pop r5`	`pop r5`
`pop r4`	`pop r4`
Line 1429...	Line 1739...
`; r1=E_Ok if everything is ok`	`; r1=E_Ok if everything is ok`
`; r1=E_BadMbx for a bad mailbox number`	`; r1=E_BadMbx for a bad mailbox number`
`; r1=E_NotAlloc for a mailbox that isn't allocated`	`; r1=E_NotAlloc for a mailbox that isn't allocated`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`WaitMsg:`	`WaitMsg:`
`cmp #0 ; check the mailbox number to make sure`	`cmp #2047 ; check the mailbox number to make sure`
`bmi wmsg1 ; that it's sensible`	`bhi wmsg1 ; that it's sensible`
`cmp #2047`
`bpl wmsg1`
`phx`	`phx`
`phy`	`phy`
`push r4`	`push r4`
`push r5`	`push r5`
`push r6`	`push r6`
`push r7`	`push r7`
`ld r6,r1`	`ld r6,r1`
`php`	`php`
`sei`	`sei`
`ld r5,MBX_OWNER,r1`	`ld r5,MBX_OWNER,r1`
`bmi wmsg2 ; error: no owner`	`cmp r5,#MAX_TASKNO`
	`bhi wmsg2 ; error: no owner`
`jsr DequeueMsgFromMbx`	`jsr DequeueMsgFromMbx`
`cmp #0`	`cmp #0`
`bpl wmsg3`	`bpl wmsg3`

`; Here there was no message available, remove the task from`	`; Here there was no message available, remove the task from`
`; the ready list, and optionally add it to the timeout list.`	`; the ready list, and optionally add it to the timeout list.`
`; Queue the task at the mailbox.`	`; Queue the task at the mailbox.`
`lda RunningTCB ; remove the task from the ready list`	`lda RunningTCB ; remove the task from the ready list`
`bmi wmsg8`
`jsr RemoveTaskFromReadyList`	`jsr RemoveTaskFromReadyList`
`ld r7,TCB_Status,r1 ; set task status to waiting`	`ld r7,#TS_WAITMSG ; set task status to waiting`
`or r7,r7,#TS_WAITMSG`
`st r7,TCB_Status,r1`	`st r7,TCB_Status,r1`
`st r6,TCB_hWaitMbx,r1 ; set which mailbox is waited for`	`st r6,TCB_hWaitMbx,r1 ; set which mailbox is waited for`
`ld r7,#-1`	`ld r7,#-1`
`st r7,TCB_mbq_next,r1 ; adding at tail, so there is no next`	`st r7,TCB_mbq_next,r1 ; adding at tail, so there is no next`
`stx TCB_MSGPTR_D1,r1 ; save off the message pointers`	`stx TCB_MSGPTR_D1,r1 ; save off the message pointers`
Line 1475...	Line 1782...
`cmp r4,#0 ; check for a timeout`	`cmp r4,#0 ; check for a timeout`
`beq wmsg10`	`beq wmsg10`
`ld r2,r4`	`ld r2,r4`
`jsr AddToTimeoutList`	`jsr AddToTimeoutList`
`wmsg10:`	`wmsg10:`
`ld r2,#wmsg8 ; save the return address`	`int #2 ; invoke the scheduler`
`PushRegsAndRunTask:`
`phx`
`php ; save status register`
`pha ; and save the register set`
`phx`
`phy`
`push r4`
`push r5`
`push r6`
`push r7`
`push r8`
`push r9`
`push r10`
`push r11`
`push r12`
`push r13`
`push r14`
`push r15`
`jmp SelectTaskToRun`

`; Here there were no prior tasks queued at the mailbox`	`; Here there were no prior tasks queued at the mailbox`
`wmsg6:`	`wmsg6:`
`ld r7,#-1`	`ld r7,#-1`
`st r7,TCB_mbq_prev,r1 ; no previous tasks`	`st r7,TCB_mbq_prev,r1 ; no previous tasks`
Line 1565...	Line 1853...
`; r1=E_NoMsg if no message is available`	`; r1=E_NoMsg if no message is available`
`; r1=E_BadMbx for a bad mailbox number`	`; r1=E_BadMbx for a bad mailbox number`
`; r1=E_NotAlloc for a mailbox that isn't allocated`	`; r1=E_NotAlloc for a mailbox that isn't allocated`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`CheckMsg:`	`CheckMsg:`
`cmp #0 ; check the mailbox number to make sure`	`cmp #2047 ; check the mailbox number to make sure`
`bmi cmsg1 ; that it's sensible`	`bhi cmsg1 ; that it's sensible`
`cmp #2047`
`bpl cmsg1`
`phx`	`phx`
`phy`	`phy`
`push r4`	`push r4`
`push r5`	`push r5`
`php`	`php`
Line 1632...	Line 1918...
`lda #E_NoMsg`	`lda #E_NoMsg`
`rts`	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`comment ~`
`SetIOFocusBit:`	`SetIOFocusBit:`
`and r2,r2,#$FF`	`and r2,r2,#$FF`
`and r1,r2,#$1F ; get bit index 0 to 31`	`and r1,r2,#$1F ; get bit index 0 to 31`
`ldy #1`	`ldy #1`
`asl r3,r3,r1 ; shift bit to proper place`	`asl r3,r3,r1 ; shift bit to proper place`
`lsr r2,r2,#5 ; get word index /32 bits per word`	`lsr r2,r2,#5 ; get word index /32 bits per word`
`lda IOFocusTbl,x`	`lda IOFocusTbl,x`
`or r1,r1,r3`	`or r1,r1,r3`
`sta IOFocusTbl,x`	`sta IOFocusTbl,x`
`rts`	`rts`
	`~`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; The I/O focus list is an array indicating which tasks are requesting the`	`; The I/O focus list is an array indicating which tasks are requesting the`
`; I/O focus. The I/O focus is user controlled by pressing ALT-TAB on the`	`; I/O focus. The I/O focus is user controlled by pressing ALT-TAB on the`
`; keyboard.`	`; keyboard.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
Line 1656...	Line 1943...
`phx`	`phx`
`phy`	`phy`
`php`	`php`
`sei`	`sei`
`ldx RunningTCB`	`ldx RunningTCB`
	`cpx #MAX_TASKNO`
	`bhi riof1`
`ldy IOFocusNdx ; Is the focus list empty ?`	`ldy IOFocusNdx ; Is the focus list empty ?`
`bmi riof2`	`bmi riof2`
`riof4:`	`riof4:`
`lda TCB_iof_next,x ; is the task already in the IO focus list ?`	`lda TCB_iof_next,x ; is the task already in the IO focus list ?`
`bpl riof3`	`bpl riof3`
Line 1668...	Line 1957...
`stx TCB_iof_prev,r1`	`stx TCB_iof_prev,r1`
`sta TCB_iof_next,x`	`sta TCB_iof_next,x`
`sty TCB_iof_prev,x`	`sty TCB_iof_prev,x`
`stx TCB_iof_next,y`	`stx TCB_iof_next,y`
`riof3:`	`riof3:`
`jsr SetIOFocusBit`	`txa`
	`bms IOFocusTbl`
	`; jsr SetIOFocusBit`
	`riof1:`
`plp`	`plp`
`ply`	`ply`
`plx`	`plx`
`pla`	`pla`
`rts`	`rts`
Line 1686...	Line 1978...
`bra riof3`	`bra riof3`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Releasing the I/O focus causes the focus to switch if the running task`	`; Releasing the I/O focus causes the focus to switch if the running task`
`; had the I/O focus.`	`; had the I/O focus.`
	`; ForceReleaseIOFocus forces the release of the IO focus for a task`
	`; different than the one currently running.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`;`
	`message "ForceReleaseIOFocus"`
	`ForceReleaseIOFocus:`
	`php`
	`pha`
	`phx`
	`phy`
	`sei`
	`tax`
	`jmp rliof4`
`message "ReleaseIOFocus"`	`message "ReleaseIOFocus"`
`ReleaseIOFocus:`	`ReleaseIOFocus:`
	`php`
`pha`	`pha`
`phx`	`phx`
`phy`	`phy`
`php`
`sei`	`sei`
`ldx RunningTCB`	`ldx RunningTCB`
`phx`	`rliof4:`
	`cpx #MAX_TASKNO`
	`bhi rliof3`
	`; phx`
`ldy #1`	`ldy #1`
	`txa`
	`bmt IOFocusTbl`
	`beq rliof3`
	`bmc IOFocusTbl`
	`comment ~`
`and r1,r2,#$1F ; get bit index 0 to 31`	`and r1,r2,#$1F ; get bit index 0 to 31`
`asl r3,r3,r1 ; shift bit to proper place`	`asl r3,r3,r1 ; shift bit to proper place`
`eor r3,r3,#-1 ; invert bit mask`	`eor r3,r3,#-1 ; invert bit mask`
`lsr r2,r2,#5 ; get word index /32 bits per word`	`lsr r2,r2,#5 ; get word index /32 bits per word`
`lda IOFocusTbl,x`	`lda IOFocusTbl,x`
`and r1,r1,r3`	`and r1,r1,r3`
`sta IOFocusTbl,x`	`sta IOFocusTbl,x`
`plx`	`~`
	`; plx`
`cpx IOFocusNdx ; Does the running task have the I/O focus ?`	`cpx IOFocusNdx ; Does the running task have the I/O focus ?`
`bne rliof1`	`bne rliof1`
`jsr SwitchIOFocus ; If so, then switch the focus.`	`jsr SwitchIOFocus ; If so, then switch the focus.`
`rliof1:`	`rliof1:`
`lda TCB_iof_next,x ; get next and previous fields.`	`lda TCB_iof_next,x ; get next and previous fields.`
Line 1725...	Line 2038...
`rliof2:`	`rliof2:`
`lda #-1 ; Update the next and prev fields to indicate`	`lda #-1 ; Update the next and prev fields to indicate`
`sta TCB_iof_next,x ; the task is no longer on the list.`	`sta TCB_iof_next,x ; the task is no longer on the list.`
`sta TCB_iof_prev,x`	`sta TCB_iof_prev,x`
`rliof3:`	`rliof3:`
`plp`
`ply`	`ply`
`plx`	`plx`
`pla`	`pla`
	`plp`
`rts`	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Get the location of the screen and screen attribute memory. The location`	`; Get the location of the screen and screen attribute memory. The location`
`; depends on whether or not the task has the output focus.`	`; depends on whether or not the task has the output focus.`
Line 1859...	Line 2172...
`message "ClearScreen"`	`message "ClearScreen"`
`ClearScreen:`	`ClearScreen:`
`pha ; holds a space character`	`pha ; holds a space character`
`phx ; loop counter`	`phx ; loop counter`
`phy ; memory addressing`	`phy ; memory addressing`
`push r4 ; holds the screen color`
`push r5`
`lda TEXTREG+TEXT_COLS ; calc number to clear`	`lda TEXTREG+TEXT_COLS ; calc number to clear`
`ldx TEXTREG+TEXT_ROWS`	`ldx TEXTREG+TEXT_ROWS`
`mul r2,r1,r2 ; r2 = # chars to clear`	`mul r1,r1,r2 ; r1 = # chars to clear`
	`pha`
`jsr GetScreenLocation`	`jsr GetScreenLocation`
`tay`	`tay ; y = target address`
`jsr GetColorCodeLocation`
`ld r5,r1`
`lda #' ' ; space char`	`lda #' ' ; space char`
`ld r4,ScreenColor`
`jsr AsciiToScreen`	`jsr AsciiToScreen`
`csj4:`	`tax ; x is value to store`
`sta (y)`	`pla ; a is count`
`iny`	`pha`
`st r4,(r5)`	`stos ; clear the memory`
`inc r5`	`ld r2,ScreenColor ; x = value to use`
`dex`	`jsr GetColorCodeLocation`
`bne csj4`	`tay ; y = targte address`
`pop r5`	`pla ; a = count`
`pop r4`	`stos`
`ply`	`ply`
`plx`	`plx`
`pla`	`pla`
`rts`	`rts`

Line 2094...	Line 2403...
`dccr:`	`dccr:`
`cmp #$91 ; cursor right ?`	`cmp #$91 ; cursor right ?`
`bne dcx6`	`bne dcx6`
`pha`	`pha`
`lda TCB_CursorCol,r4`	`lda TCB_CursorCol,r4`
`cmp #83`	`cmp #55`
`bcs dcx7`	`bcs dcx7`
`ina`	`ina`
`sta TCB_CursorCol,r4`	`sta TCB_CursorCol,r4`
`dcx7:`	`dcx7:`
`jsr UpdateCursorPos`	`jsr UpdateCursorPos`
Line 2344...	Line 2653...
`lda #1 ; setup semaphore`	`lda #1 ; setup semaphore`
`sta KEYBD_SEMA`	`sta KEYBD_SEMA`
`lda #32`	`lda #32`
`sta LEDS`	`sta LEDS`
`ldx #0`	`ldx #0`
`kbdi1:`
`stz KeybdHead,x ; setup keyboard buffer`	`lda #MAX_TASKNO`
`stz KeybdTail,x`	`ldx #0`
`lda #1 ; turn on keyboard echo`	`ldy #KeybdHead`
`sta KeybdEcho,x`	`stos`
`stz KeybdBad,x`	`lda #MAX_TASKNO`
`inx`	`ldy #KeybdTail`
`cpx #MAX_TASKNO+1`	`stos`
`bne kbdi1`	`lda #MAX_TASKNO`
	`ldy #KeybdBad`
	`stos`
	`lda #MAX_TASKNO`
	`ldx #1 ; turn on keyboard echo`
	`ldy #KeybdEcho`
	`stos`

`lda PIC_IE`	`lda PIC_IE`
`or r1,r1,#$8000 ; enable kbd_irq`	`or r1,r1,#$8000 ; enable kbd_irq`
`sta PIC_IE`	`sta PIC_IE`

Line 2464...	Line 2779...
`stz KeybdAck,x`	`stz KeybdAck,x`
`plx`	`plx`
`rts`	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
	`; KeybdIRQ`
	`;`
`; Normal keyboard interrupt, the lowest priority interrupt in the system.`	`; Normal keyboard interrupt, the lowest priority interrupt in the system.`
`; Grab the character from the keyboard device and store it in a buffer.`	`; Grab the character from the keyboard device and store it in a buffer.`
`; The buffer of the task with the input focus is updated.`	`; The buffer of the task with the input focus is updated.`
	`; This IRQ has to check for the ALT-tab character and take care of`
	`; switching the IO focus if detected. It can't be done in the KeybdGetChar`
	`; because the app with the IO focus may not call that routine. We know for`
	`; sure the interrupt routine will be called when a key is pressed.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`;`	`;`
`message "KeybdIRQ"`	`message "KeybdIRQ"`
`KeybdIRQ:`	`KeybdIRQ:`
`cld`	`cld`
Line 2492...	Line 2813...
`ld r4,IOFocusNdx ; get the task with the input focus`	`ld r4,IOFocusNdx ; get the task with the input focus`

`ldx KEYBD ; get keyboard character`	`ldx KEYBD ; get keyboard character`
`ld r0,KEYBD+1 ; clear keyboard strobe (turns off the IRQ)`	`ld r0,KEYBD+1 ; clear keyboard strobe (turns off the IRQ)`
`txy ; check for a keyboard ACK code`	`txy ; check for a keyboard ACK code`

	`bit r3,#$800 ; test bit #11`
	`bne KeybdIRQc ; ignore keyup messages for now`
	`bit r3,#$200 ; check for ALT-tab`
	`beq KeybdIrq3`
	`and r3,r3,#$FF`
	`cmp r3,#TAB ; if we find an ALT-tab`
	`bne KeybdIrq3`
	`jsr SwitchIOFocus`
	`bra KeybdIRQc ; don't store off the ALT-tab character`
	`KeybdIrq3:`
`and r3,r3,#$ff`	`and r3,r3,#$ff`
`cmp r3,#$FA`	`cmp r3,#$FA`
`bne KeybdIrq1`	`bne KeybdIrq1`
`sty KeybdAck,r4`	`sty KeybdAck,r4`
`bra KeybdIRQc`	`bra KeybdIRQc`
Line 2534...	Line 2866...
`ldx RunningTCB`	`ldx RunningTCB`
`sta KeybdEcho,x`	`sta KeybdEcho,x`
`plx`	`plx`
`rts`	`rts`

	`comment ~`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Get a bit from the I/O focus table.`	`; Get a bit from the I/O focus table.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`GetIOFocusBit:`	`GetIOFocusBit:`
`phx`	`phx`
Line 2549...	Line 2882...
`lsr r3,r3,r1 ; extract bit`	`lsr r3,r3,r1 ; extract bit`
`and r1,r3,#1`	`and r1,r3,#1`
`ply`	`ply`
`plx`	`plx`
`rts`	`rts`
	`~`
	`;------------------------------------------------------------------------------`
	`; ForceIOFocus`
	`;`
	`; Force the IO focus to a specific task.`
	`;------------------------------------------------------------------------------`
	`;`
	`ForceIOFocus:`
	`php`
	`pha`
	`phy`
	`ldy IOFocusNdx`
	`cmp r1,r3`
	`beq fif1`
	`jsr CopyScreenToVirtualScreen`
	`sta IOFocusNdx`
	`jsr CopyVirtualScreenToScreen`
	`fif1:`
	`ply`
	`pla`
	`plp`
	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; SwitchIOFocus`	`; SwitchIOFocus`
`;`	`;`
`; Switches the IO focus to the next task requesting the I/O focus. This`	`; Switches the IO focus to the next task requesting the I/O focus. This`
Line 2593...	Line 2948...
`; characters available.`	`; characters available.`
`; Also check for ALT-TAB and switch the I/O focus.`	`; Also check for ALT-TAB and switch the I/O focus.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`message "KeybdGetChar"`	`message "KeybdGetChar"`
`KeybdGetChar:`	`KeybdGetChar:`
	`php`
`phx`	`phx`
`push r4`	`push r4`
`php`
`sei`	`sei`
`ld r4,RunningTCB`	`ld r4,RunningTCB`
`bmi RunningTCBErr`	`cmp r4,#MAX_TASKNO`
`cmp #MAX_TASKNO`	`bhi nochar`
`bpl RunningTCBErr`
`ldx KeybdTail,r4 ; if keybdTail==keybdHead then there are no`	`ldx KeybdTail,r4 ; if keybdTail==keybdHead then there are no`
`lda KeybdHead,r4 ; characters in the keyboard buffer`	`lda KeybdHead,r4 ; characters in the keyboard buffer`
`cmp r1,r2`	`cmp r1,r2`
`beq nochar`	`beq nochar`
`asl r4,r4,#4 ; * 16`	`asl r4,r4,#4 ; * 16`
`phx`	`phx`
`add r2,r2,r4`	`add r2,r2,r4`
`lda KeybdBuffer,x`	`lda KeybdBuffer,x`
`plx`	`plx`
`bit #$200 ; check for ALT-tab`
`beq kgc4`
`and #$FF`
`cmp #TAB ; if we find an ALT-tab`
`bne kgc4`
`jsr SwitchIOFocus`
`; Now eat up the ALT-TAB character`
`; Flush the keyboard buffer`
`lsr r4,r4,#4`
`stz KeybdTail,r4`
`stz KeybdHead,r4`
`bra nochar`
`kgc4:`
`and r1,r1,#$ff ; mask off control bits`	`and r1,r1,#$ff ; mask off control bits`
`inx ; increment index`	`inx ; increment index`
`and r2,r2,#$0f`	`and r2,r2,#$0f`
`lsr r4,r4,#4 ; / 16`	`lsr r4,r4,#4 ; / 16`
`stx KeybdTail,r4`	`stx KeybdTail,r4`
Line 2640...	Line 2981...
`jsr DisplayChar`	`jsr DisplayChar`
`bra kgc3`	`bra kgc3`
`nochar:`	`nochar:`
`lda #-1`	`lda #-1`
`kgc3:`	`kgc3:`
`plp`
`pop r4`	`pop r4`
`plx`	`plx`
	`plp`
`rts`	`rts`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Check if there is a keyboard character available in the keyboard buffer.`	`; Check if there is a keyboard character available in the keyboard buffer.`
`; Returns`	`; Returns`
Line 2702...	Line 3043...
`bit #$8000`	`bit #$8000`
`beq kgc1`	`beq kgc1`
`ld r0,KEYBD+1 ; clear keyboard strobe`	`ld r0,KEYBD+1 ; clear keyboard strobe`
`bit #$800 ; is it a keydown event ?`	`bit #$800 ; is it a keydown event ?`
`bne kgc1`	`bne kgc1`
`bit #$200 ; check for ALT-tab`	`; bit #$200 ; check for ALT-tab`
`bne kgc2`	`; bne kgc2`
`and r2,r1,#$7f`	`; and r2,r1,#$7f`
`cmp r2,#TAB ; if we find an ALT-tab`	`; cmp r2,#TAB ; if we find an ALT-tab`
`bne kgc2`	`; bne kgc2`
`jsr SwitchIOFocus`	`; jsr SwitchIOFocus`
`bra kgc1`	`; bra kgc1`
`kgc2:`	`;kgc2:`
`and #$ff ; remove strobe bit`	`and #$ff ; remove strobe bit`
`ldx KeybdEcho ; is keyboard echo on ?`	`ldx KeybdEcho ; is keyboard echo on ?`
`beq gk1`	`beq gk1`
`cmp #CR`	`cmp #CR`
`bne gk2 ; convert CR keystroke into CRLF`	`bne gk2 ; convert CR keystroke into CRLF`
Line 3153...	Line 3494...
`;`	`;`
`Prompt1:`	`Prompt1:`
`lda #80`	`lda #80`
`sta LEDS`	`sta LEDS`
`ldx RunningTCB`	`ldx RunningTCB`
`bmi RunningTCBErr`
`cpx #MAX_TASKNO`	`cpx #MAX_TASKNO`
`bpl RunningTCBErr`	`bhi Prompt3`
`lda #81`	`lda #81`
`sta LEDS`	`sta LEDS`
`stz TCB_CursorCol,x ; go back to the start of the line`	`stz TCB_CursorCol,x ; go back to the start of the line`
`jsr CalcScreenLoc ; r1 = screen memory location`	`jsr CalcScreenLoc ; r1 = screen memory location`
`tay`	`tay`
`lda #82`	`lda #82`
`sta LEDS`	`sta LEDS`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'$'`	`cmp #'$'`
`bne Prompt2 ; skip over '$' prompt character`	`bne Prompt2 ; skip over '$' prompt character`
`lda #83`	`lda #83`
`sta LEDS`	`sta LEDS`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`

`; Dispatch based on command character`	`; Dispatch based on command character`
`;`	`;`
`Prompt2:`	`Prompt2:`
`cmp #':'`	`cmp #':'`
`beq EditMem`	`beq EditMem`
`cmp #'D'`	`cmp #'D'`
`bne Prompt8`	`bne Prompt8`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'R'`	`cmp #'R'`
`beq DumpReg`	`beq DumpReg`
`cmp #'I'`	`cmp #'I'`
`beq DoDir`	`beq DoDir`
`dey`	`dey`
`bra DumpMem`	`bra DumpMem`
`Prompt8:`	`Prompt8:`
`cmp #'F'`	`cmp #'F'`
`bne Prompt7`	`bne Prompt7`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'L'`	`cmp #'L'`
`bne Prompt8a`	`bne Prompt8a`
`jsr DumpIOFocusList`	`jsr DumpIOFocusList`
`jmp Monitor`	`jmp Monitor`
`Prompt8a:`	`Prompt8a:`
	`cmp #'I'`
	`beq DoFig`
`cmp #'M'`	`cmp #'M'`
`beq DoFmt`	`beq DoFmt`
`dey`	`dey`
`bra FillMem`	`bra FillMem`
`Prompt7:`	`Prompt7:`
Line 3219...	Line 3553...
`Prompt4:`	`Prompt4:`
`cmp #'b'`	`cmp #'b'`
`bne Prompt5`	`bne Prompt5`
`lda #3 ; priority level 3`	`lda #3 ; priority level 3`
`ldy #$C000 ; start address $C000`	`ldy #$C000 ; start address $C000`
`ldx #$20000000 ; flags: emmulation mode set`	`ldx #$00000000 ; flags:`
`jsr StartTask`	`jsr StartTask`
`bra Monitor`	`bra Monitor`
`emm`	`emm`
`cpu W65C02`	`cpu W65C02`
`jml $0C000`	`jml $0C000`
Line 3247...	Line 3581...
`cmp #'r'`	`cmp #'r'`
`bne Prompt12`	`bne Prompt12`
`lda #4 ; priority level 4`	`lda #4 ; priority level 4`
`ldx #0 ; zero all flags at startup`	`ldx #0 ; zero all flags at startup`
`ldy #RandomLines ; task address`	`ldy #RandomLines ; task address`
`jsr (y)`	`; jsr (y)`
`; jsr StartTask`	`jsr StartTask`
`jmp Monitor`	`jmp Monitor`
`; jmp RandomLinesCall`	`; jmp RandomLinesCall`
`Prompt12:`	`Prompt12:`
`Prompt13:`	`Prompt13:`
`cmp #'P'`	`cmp #'P'`
Line 3260...	Line 3594...
`lda #2`	`lda #2`
`ldx #0`	`ldx #0`
`ldy #Piano`	`ldy #Piano`
`jsr StartTask`	`jsr StartTask`
`jmp Monitor`	`jmp Monitor`

`Prompt14:`	`Prompt14:`
`cmp #'T'`	`cmp #'T'`
`bne Prompt15`	`bne Prompt15`
	`jsr MonGetch`
	`cmp #'O'`
	`bne Prompt14a`
	`jsr DumpTimeoutList`
	`jmp Monitor`
	`Prompt14a:`
	`cmp #'I'`
	`bne Prompt14b`
	`jsr DisplayDatetime`
	`jmp Monitor`
	`Prompt14b:`
	`cmp #'E'`
	`bne Prompt14c`
	`jsr ReadTemp`
	`jmp Monitor`
	`Prompt14c:`
	`dey`
`jsr DumpTaskList`	`jsr DumpTaskList`
`jmp Monitor`	`jmp Monitor`

`Prompt15:`	`Prompt15:`
`cmp #'S'`	`cmp #'S'`
`bne Prompt16`	`bne Prompt16`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'P'`	`cmp #'P'`
`bne Prompt18`	`bne Prompt18`
`jsr ignBlanks`	`jsr ignBlanks`
`jsr GetHexNumber`	`jsr GetHexNumber`
`sta SPSave`	`sta SPSave`
Line 3293...	Line 3644...
`jsr loadBootFile`	`jsr loadBootFile`
`jmp Monitor`	`jmp Monitor`
`Prompt16:`	`Prompt16:`
`cmp #'e'`	`cmp #'e'`
`bne Prompt17`	`bne Prompt17`
`jsr eth_main`	`lda #1`
	`ldx #0`
	`ldy #eth_main`
	`jsr StartTask`
	`; jsr eth_main`
	`jmp Monitor`
`Prompt17:`	`Prompt17:`
`cmp #'R'`	`cmp #'R'`
`bne Monitor`	`bne Prompt19`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'S'`	`cmp #'S'`
`beq LoadSector`	`beq LoadSector`
`dey`	`dey`
`bra SetRegValue`	`bra SetRegValue`
`jmp Monitor`	`jmp Monitor`
	`Prompt19:`
	`cmp #'K'`
	`bne Monitor`
	`Prompt19a:`
	`jsr MonGetch`
	`cmp #' '`
	`bne Prompt19a`
	`jsr ignBlanks`
	`jsr GetDecNumber`
	`jsr KillTask`
	`jmp Monitor`

`message "Prompt16"`	`message "Prompt16"`
`RandomLinesCall:`	`RandomLinesCall:`
`; jsr RandomLines`	`; jsr RandomLines`
`jmp Monitor`	`jmp Monitor`

	`MonGetch:`
	`lda (y)`
	`iny`
	`jsr ScreenToAscii`
	`rts`

`DoDir:`	`DoDir:`
`jsr do_dir`	`jsr do_dir`
`jmp Monitor`	`jmp Monitor`
`DoFmt:`	`DoFmt:`
`jsr do_fmt`	`jsr do_fmt`
`jmp Monitor`	`jmp Monitor`
	`DoFig:`
	`lda #3 ; priority level 3`
	`ldy #$A000 ; start address $A000`
	`ldx #$20000000 ; flags: emmulation mode set`
	`jsr StartTask`
	`bra Monitor`

`TestCLS:`	`TestCLS:`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'L'`	`cmp #'L'`
`bne Monitor`	`bne Monitor`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #'S'`	`cmp #'S'`
`bne Monitor`	`bne Monitor`
`jsr ClearScreen`	`jsr ClearScreen`
`ldx RunningTCB`	`ldx RunningTCB`
`stz TCB_CursorCol,x`	`stz TCB_CursorCol,x`
Line 3346...	Line 3720...
`db "W = Write sector",CR,LF`	`db "W = Write sector",CR,LF`
`db "DR = Dump registers",CR,LF`	`db "DR = Dump registers",CR,LF`
`db "D = Dump memory",CR,LF`	`db "D = Dump memory",CR,LF`
`db "F = Fill memory",CR,LF`	`db "F = Fill memory",CR,LF`
`db "FL = Dump I/O Focus List",CR,LF`	`db "FL = Dump I/O Focus List",CR,LF`
	`; db "FIG = start FIG Forth",CR,LF`
	`db "KILL n = kill task #n",CR,LF`
`db "B = start tiny basic",CR,LF`	`db "B = start tiny basic",CR,LF`
`db "b = start EhBasic 6502",CR,LF`	`db "b = start EhBasic 6502",CR,LF`
`db "J = Jump to code",CR,LF`	`db "J = Jump to code",CR,LF`
`db "R[n] = Set register value",CR,LF`	`db "R[n] = Set register value",CR,LF`
`db "r = random lines - test bitmap",CR,LF`	`db "r = random lines - test bitmap",CR,LF`
`db "e = ethernet test",CR,LF`	`db "e = ethernet test",CR,LF`
`db "T = Dump task list",CR,LF`	`db "T = Dump task list",CR,LF`
	`db "TO = Dump timeout list",CR,LF`
	`db "TI = display date/time",CR,LF`
	`db "TEMP = display temperature",CR,LF`
`db "P = Piano",CR,LF,0`	`db "P = Piano",CR,LF,0`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Ignore blanks in the input`	`; Ignore blanks in the input`
`; r3 = text pointer`	`; r3 = text pointer`
`; r1 destroyed`	`; r1 destroyed`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`;`	`;`
`ignBlanks:`	`ignBlanks:`
`ignBlanks1:`	`ignBlanks1:`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`cmp #' '`	`cmp #' '`
`beq ignBlanks1`	`beq ignBlanks1`
`dey`	`dey`
`rts`	`rts`

Line 3573...	Line 3950...
`phx`	`phx`
`push r4`	`push r4`
`ldx #0`	`ldx #0`
`ld r4,#8`	`ld r4,#8`
`gthxn2:`	`gthxn2:`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`jsr AsciiToHexNybble`	`jsr AsciiToHexNybble`
`cmp #-1`	`cmp #-1`
`beq gthxn1`	`beq gthxn1`
`asl r2,r2,#4`	`asl r2,r2,#4`
`and #$0f`	`and #$0f`
Line 3598...	Line 3973...
`push r5`	`push r5`
`ldx #0`	`ldx #0`
`ld r4,#10`	`ld r4,#10`
`ld r5,#10`	`ld r5,#10`
`gtdcn2:`	`gtdcn2:`
`lda (y)`	`jsr MonGetch`
`iny`
`jsr ScreenToAscii`
`jsr AsciiToDecNybble`	`jsr AsciiToDecNybble`
`cmp #-1`	`cmp #-1`
`beq gtdcn1`	`beq gtdcn1`
`mul r2,r2,r5`	`mul r2,r2,r5`
`add r2,r2,r1`	`add r2,r2,r1`
Line 3665...	Line 4038...
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`ClearBmpScreen:`	`ClearBmpScreen:`
`pha`	`pha`
`phx`	`phx`
`phy`	`phy`
`ldx #(1364*768)>>2 ; x = # words to clear`	`lda #(1364*768)>>2 ; a = # words to clear`
`lda #0x29292929 ; acc = color for four pixels`	`ldx #0x29292929 ; acc = color for four pixels`
`ldy #BITMAPSCR ; y = screen address`	`ldy #BITMAPSCR ; y = screen address`
`cbsj4`	`stos`
`sta (y) ; store pixel data`	`;cbsj4`
`iny ; advance screen address`	`; sta (y) ; store pixel data`
`dex ; decrement pixel count and loop back`	`; iny ; advance screen address`
`bne cbsj4`	`; dex ; decrement pixel count and loop back`
	`; bne cbsj4`
`ply`	`ply`
`plx`	`plx`
`pla`	`pla`
`rts`	`rts`

Line 3698...	Line 4072...
`stz AC97+0x26 ; trigger a read of register 26 (status reg)`	`stz AC97+0x26 ; trigger a read of register 26 (status reg)`
`sac971: ; wait for status to register 0xF (all ready)`	`sac971: ; wait for status to register 0xF (all ready)`
`ld r3,Milliseconds`	`ld r3,Milliseconds`
`sub r3,r3,r4`	`sub r3,r3,r4`
`cmp r3,#1000`	`cmp r3,#1000`
`bpl sac97Abort`	`bhi sac97Abort`
`jsr KeybdGetChar ; see if we needed to CTRL-C`	`jsr KeybdGetChar ; see if we needed to CTRL-C`
`cmp #CTRLC`	`cmp #CTRLC`
`beq sac973`	`beq sac973`
`lda AC97+0x68 ; wait for dirty bit to clear`	`lda AC97+0x68 ; wait for dirty bit to clear`
`bne sac971`	`bne sac971`
Line 3720...	Line 4094...
`ld r4,Milliseconds`	`ld r4,Milliseconds`
`sac972:`	`sac972:`
`ld r3,Milliseconds`	`ld r3,Milliseconds`
`sub r3,r3,r4`	`sub r3,r3,r4`
`cmp r3,#1000`	`cmp r3,#1000`
`bpl sac97Abort`	`bhi sac97Abort`
`jsr KeybdGetChar`	`jsr KeybdGetChar`
`cmp #CTRLC`	`cmp #CTRLC`
`beq sac975`	`beq sac975`
`lda AC97+0x68 ; wait for dirty bits to clear`	`lda AC97+0x68 ; wait for dirty bits to clear`
`bne sac972 ; wait a while for the settings to take effect`	`bne sac972 ; wait a while for the settings to take effect`
Line 3749...	Line 4123...
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`; Sound a 800 Hz beep`	`; Sound a 800 Hz beep`
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`;`	`;`
`Beep:`	`Beep:`
`pha`
`lda #15 ; master volume to max`	`lda #15 ; master volume to max`
`sta PSG+128`	`sta PSG+64`
`lda #13422 ; 800Hz`	`lda #13422 ; 800Hz`
`sta PSGFREQ0`	`sta PSGFREQ0`
`; decay (16.384 ms)2`	`; decay (16.384 ms)2`
`; attack (8.192 ms)1`	`; attack (8.192 ms)1`
`; release (1.024 s)A`	`; release (1.024 s)A`
Line 3768...	Line 4141...
`jsr Sleep`	`jsr Sleep`
`lda #0x0104 ; gate off, output enable, triangle waveform`	`lda #0x0104 ; gate off, output enable, triangle waveform`
`sta PSGCTRL0`	`sta PSGCTRL0`
`lda #100 ; delay about 1s`	`lda #100 ; delay about 1s`
`jsr Sleep`	`jsr Sleep`
	`lda #83`
	`sta LEDS`
`lda #0x0000 ; gate off, output enable off, no waveform`	`lda #0x0000 ; gate off, output enable off, no waveform`
`sta PSGCTRL0`	`sta PSGCTRL0`
`pla`
`rts`	`rts`

`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`;`	`;`
`Piano:`	`Piano:`
`jsr RequestIOFocus`	`jsr RequestIOFocus`
`lda #15 ; master volume to max`	`lda #15 ; master volume to max`
`sta PSG+128`	`sta PSG+64`
`playnt:`	`playnt:`
`jsr KeybdGetChar`	`jsr KeybdGetChar`
`cmp #CTRLC`	`cmp #CTRLC`
`beq PianoX`	`beq PianoX`
`cmp #'a'`	`cmp #'a'`
Line 4468...	Line 4842...
`my_MAC3 EQU 0xEE`	`my_MAC3 EQU 0xEE`
`my_MAC4 EQU 0xF0`	`my_MAC4 EQU 0xF0`
`my_MAC5 EQU 0xDA`	`my_MAC5 EQU 0xDA`
`my_MAC6 EQU 0x42`	`my_MAC6 EQU 0x42`

	`; r1 = PHY`
	`; r2 = regnum`
	`; r3 = data`
	`;`
	`eth_mii_write:`
	`pha`
	`phx`
	`push r4`
	`ld r4,#ETHMAC`
	`asl r2,r2,#8`
	`or r1,r1,r2`
	`sta ETH_MIIADDRESS,r4`
	`sty ETH_MIITX_DATA,r4`
	`lda #ETH_WCTRLDATA`
	`sta ETH_MIICOMMAND,r4`
	`stz ETH_MIICOMMAND,r4`
	`emiw1:`
	`lda ETH_MIISTATUS,r4`
	`bit #ETH_MIISTATUS_BUSY`
	`bne emiw1`
	`pop r4`
	`plx`
	`pla`
	`rts`

	`; r1 = PHY`
	`; r2 = reg`

	`eth_mii_read:`
	`phx`
	`phy`
	`ldy #ETHMAC`
	`asl r2,r2,#8`
	`or r1,r1,r2`
	`sta ETH_MIIADDRESS,y`
	`lda #ETH_MIICOMMAND_RSTAT`
	`sta ETH_MIICOMMAND,y`
	`stz ETH_MIICOMMAND,y`
	`emir1:`
	`lda ETH_MIISTATUS,y`
	`bit #ETH_MIISTATUS_BUSY`
	`bne emir1`
	`lda ETH_MIIRX_DATA,y`
	`ply`
	`plx`
	`rts`

	`ethmac_setup:`
	`ld r4,#ETHMAC`
	`lda #ETH_MIIMODER_RST`
	`sta ETH_MIIMODER,r4`
	`lda ETH_MIIMODER,r4`
	`and #~ETH_MIIMODER_RST`
	`sta ETH_MIIMODER,r4`
	`lda #$10 ; /16=1.25MHz`
	`sta ETH_MIIMODER,r4 ; Clock divider for MII Management interface`
	`lda #ETH_MODER_RST`
	`sta ETH_MODER,r4`
	`lda ETH_MODER,r4`
	`and #~ETH_MODER_RST`
	`sta ETH_MODER,r4`

	`stz ETH_MIITX_DATA,r4`
	`stz ETH_MIIADDRESS,r4`
	`stz ETH_MIICOMMAND,r4`

	`lda #0xEEF0DA42`
	`sta ETH_MAC_ADDR0,r4 ; MAC0`
	`lda #0x00FF`
	`sta ETH_MAC_ADDR1,r4 ; MAC1`

	`lda #-1`
	`sta ETH_INT_SOURCE,r4`

	`; Advertise support for 10/100 FD/HD`
	`lda #ETH_PHY`
	`ldx #ETH_MII_ADVERTISE`
	`jsr eth_mii_read`
	`or r3,r1,#ETH_ADVERTISE_ALL`
	`lda #ETH_PHY`
	`ldx #ETH_MII_ADVERTISE`
	`jsr eth_mii_write`

	`; Do NOT advertise support for 1000BT`
	`lda #ETH_PHY`
	`ldx #ETH_MII_CTRL1000`
	`jsr eth_mii_read`
	`and r3,r1,#~(ETH_ADVERTISE_1000FULL\|ETH_ADVERTISE_1000HALF)`
	`lda #ETH_PHY`
	`ldx #ETH_MII_CTRL1000`
	`jsr eth_mii_write`

	`; Disable 1000BT`
	`lda #ETH_PHY`
	`ldx #ETH_MII_EXPANSION`
	`jsr eth_mii_read`
	`and r3,r1,#~(ETH_ESTATUS_1000_THALF\|ETH_ESTATUS_1000_TFULL)`
	`ldx #ETH_MII_EXPANSION`
	`jsr eth_mii_write`

	`; Restart autonegotiation`
	`lda #0`
	`ldx #ETH_MII_BMCR`
	`jsr eth_mii_read`
	`and r3,r1,#~(ETH_BMCR_ANRESTART\|ETH_BMCR_ANENABLE)`
	`lda #7`
	`jsr eth_mii_write`

	`; Enable BOTH the transmiter and receiver`
	`lda #$A003`
	`sta ETH_MODER,r4`
	`rts`

`; Initialize the ethmac controller.`	`; Initialize the ethmac controller.`
`; Supply a MAC address, set MD clock`	`; Supply a MAC address, set MD clock`
`;`	`;`
`message "eth_init"`	`message "eth_init"`
`eth_init:`	`eth_init:`
`pha`	`pha`
`phy`	`phy`
`ldy #ETHMAC`	`ldy #ETHMAC`
`lda #0x64 ; 100`	`lda #$A003`
`sta ETH_MIIMODER,y`	`sta ETH_MODER,y`
`lda #7 ; PHY address`	`; lda #0x64 ; 100`
`sta ETH_MIIADDRESS,y`	`; sta ETH_MIIMODER,y`
	`; lda #7 ; PHY address`
	`; sta ETH_MIIADDRESS,y`
`lda #0xEEF0DA42`	`lda #0xEEF0DA42`
`sta ETH_MAC_ADDR0,y ; MAC0`	`sta ETH_MAC_ADDR0,y ; MAC0`
`lda #0x00FF`	`lda #0x00FF`
`sta ETH_MAC_ADDR1,y ; MAC1`	`sta ETH_MAC_ADDR1,y ; MAC1`
`ply`	`ply`
Line 4506...	Line 4995...
`ldx #0xe000 ; enable interrupt`	`ldx #0xe000 ; enable interrupt`
`stx 0x180,y`	`stx 0x180,y`
`eth1:`	`eth1:`
`nop`	`nop`
`ldx ETH_INT_SOURCE,y`	`ldx ETH_INT_SOURCE,y`
`and r2,r2,#4 ; get bit #2`	`bit r2,#4 ; get bit #2`
`beq eth1`	`beq eth1`
`ldx 0x180,y ; get from descriptor`	`ldx 0x180,y ; get from descriptor`
`lsr r2,r2,#16`	`lsr r2,r2,#16`
`ldy #0`	`ldy #0`
`ld r4,#TEXTSCR+3780 ; second last line of screen`	`pha`
	`jsr GetScreenLocation`
	`add r4,r1,3780 ; second last line of screen`
	`pla`
`eth20:`	`eth20:`
`add r5,r1,r3`	`add r5,r1,r3`
`ldx (r5) ; get byte`	`lb r2,0,r5 ; get byte`
`add r5,r4,r3`	`add r5,r4,r3`
`stx (r5) ; store to screen`	`stx (r5) ; store to screen`
`iny`	`iny`
`cpy #83`	`cpy #83`
`bne eth20`	`bne eth20`
Line 4582...	Line 5074...
`push r4`	`push r4`
`ldy #ETHMAC`	`ldy #ETHMAC`
`; wait for tx buffer to be clear`	`; wait for tx buffer to be clear`
`eth8:`	`eth8:`
`ld r4,0x100,y`	`ld r4,0x100,y`
`and r4,r4,#$8000`	`bit r4,#$8000`
`bne eth8`	`bne eth8`
`ld r4,#1 ; clear tx interrupt`	`ld r4,#1 ; clear tx interrupt`
`st r4,ETH_INT_SOURCE,y`	`st r4,ETH_INT_SOURCE,y`
`; set address`	`; set address`
`sta 0x101,y`	`sta 0x101,y`
Line 4768...	Line 5260...
`cmp #$C0A8012A ; 192.168.1.42`	`cmp #$C0A8012A ; 192.168.1.42`
`beq eth12`	`beq eth12`
`eor r1,r1,r1`	`eor r1,r1,r1`
`bra eth13`	`bra eth13`

	`msgEthTest`
	`db CR,LF,"Ethernet test - press CTRL-C to exit.",CR,LF,0`

`message "eth_main"`	`message "eth_main"`
`eth_main:`	`eth_main:`
`jsr eth_init`	`jsr RequestIOFocus`
	`jsr ClearScreen`
	`jsr HomeCursor`
	`lda #msgEthTest`
	`jsr DisplayStringB`
	`; jsr eth_init`
	`jsr ethmac_setup`
`eth_loop:`	`eth_loop:`
`jsr KeybdGetChar`	`jsr KeybdGetChar`
`cmp #-1`	`cmp #-1`
`beq eth17`	`beq eth17`
`cmp #CTRLC`	`cmp #CTRLC`
`bne eth17`	`bne eth17`
	`lda #$A000 ; tunr off transmit/recieve`
	`sta ETH_MODER+ETHMAC`
	`jsr ReleaseIOFocus`
`rts`	`rts`
`eth17`	`eth17`
`lda #eth_rx_buffer<<2 ; memory address zero`	`lda #eth_rx_buffer<<2 ; memory address zero`
`jsr eth_request_packet`	`jsr eth_request_packet`
`jsr eth_interpret_packet ; r1 = packet type`	`jsr eth_interpret_packet ; r1 = packet type`
Line 4952...	Line 5456...
`jmp eth_loop`	`jmp eth_loop`

`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`; Initialize sprite image caches with random data.`	`; Initialize sprite image caches with random data.`
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
	`message "RandomizeSprram"`
`RandomizeSprram:`	`RandomizeSprram:`
`ldx #SPRRAM`	`ldx #SPRRAM`
`ld r4,#14336 ; number of chars to initialize`	`ld r4,#14336 ; number of chars to initialize`
`rsr1:`	`rsr1:`
`tsr LFSR,r1`	`tsr LFSR,r1`
Line 4967...	Line 5472...

`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`; Draw random lines on the bitmap screen.`	`; Draw random lines on the bitmap screen.`
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`;`	`;`
	`message "RandomLines"`
`RandomLines:`	`RandomLines:`
`pha`	`pha`
`phx`	`phx`
`phy`	`phy`
`push r4`	`push r4`
`push r5`	`push r5`
`jsr RequestIOFocus`	`jsr RequestIOFocus`
	`jsr ClearScreen`
	`jsr HomeCursor`
	`lda #msgRandomLines`
	`jsr DisplayStringB`
`rl5:`	`rl5:`
`tsr LFSR,r1`	`tsr LFSR,r1`
`tsr LFSR,r2`	`tsr LFSR,r2`
	`tsr LFSR,r3`
	`mod r1,r1,#1364`
	`mod r2,r2,#768`
`jsr DrawPixel`	`jsr DrawPixel`
`tsr LFSR,r1`	`tsr LFSR,r1`
`sta LineColor ; select a random color`	`sta LineColor ; select a random color`
`rl1: ; random X0`	`rl1: ; random X0`
`tsr LFSR,r1`	`tsr LFSR,r1`
`ld r5,#1364`	`mod r1,r1,#1364`
`mod r1,r1,r5`
`rl2: ; random X1`	`rl2: ; random X1`
`tsr LFSR,r3`	`tsr LFSR,r3`
`mod r3,r3,r5`	`mod r3,r3,#1364`
`rl3: ; random Y0`	`rl3: ; random Y0`
`tsr LFSR,r2`	`tsr LFSR,r2`
`ld r5,#768`	`mod r2,r2,#768`
`mod r2,r2,r5`
`rl4: ; random Y1`	`rl4: ; random Y1`
`tsr LFSR,r4`	`tsr LFSR,r4`
`ld r5,#768`	`mod r4,r4,#768`
`mod r4,r4,r5`
`rl8:`	`rl8:`
	`ld r5,GA_STATE ; make sure state is IDLE`
	`bne rl8`
`jsr DrawLine`	`jsr DrawLine`
`jsr KeybdGetChar`	`jsr KeybdGetChar`
`cmp #CTRLC`	`cmp #CTRLC`
`beq rl7`	`beq rl7`
`bra rl5`	`bra rl5`
Line 5010...	Line 5522...
`ply`	`ply`
`plx`	`plx`
`pla`	`pla`
`rts`	`rts`

	`msgRandomLines:`
	`db CR,LF,"Random lines running - press CTRL-C to exit.",CR,LF,0`

`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`; Draw a pixel on the bitmap screen.`	`; Draw a pixel on the bitmap screen.`
`; r1 = x coordinate`	`; r1 = x coordinate`
`; r2 = y coordinate`	`; r2 = y coordinate`
`; r3 = color`	`; r3 = color`
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
	`message "DrawPixel"`
`DrawPixel:`	`DrawPixel:`
`pha`	`pha`
	`sta GA_X0`
	`stx GA_Y0`
	`sty GA_PEN`
	`lda #1`
	`sta GA_CMD`
	`pla`
	`rts`

	`comment ~`
	`pha`
`phx`	`phx`
`push r4`	`push r4`
`ld r4,#768`	`mod r2,r2,#768`
`mod r2,r2,r4`	`mod r1,r1,#1364`
`ld r4,#1364`	`mul r2,r2,#1364 ; y * 1364`
`mod r1,r1,r4`
`mul r2,r2,r4 ; y * 1364`
`add r1,r1,r2 ; + x`	`add r1,r1,r2 ; + x`
`sb r3,BITMAPSCR<<2,r1`	`sb r3,BITMAPSCR<<2,r1`
`pop r4`	`pop r4`
`plx`	`plx`
`pla`	`pla`
`rts`	`rts`
	`~`

`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`; Draw a line on the bitmap screen.`	`; Draw a line on the bitmap screen.`
`;--------------------------------------------------------------------------`	`;--------------------------------------------------------------------------`
`;50 REM DRAWLINE`	`;50 REM DRAWLINE`
Line 5054...	Line 5579...
`;250 er = er + dx`	`;250 er = er + dx`
`;260 ya = ya + sy`	`;260 ya = ya + sy`
`;270 GOTO 150`	`;270 GOTO 150`
`;300 RETURN`	`;300 RETURN`

	`message "DrawLine"`
`DrawLine:`	`DrawLine:`
`pha`	`pha`
	`sta GA_X0`
	`stx GA_Y0`
	`sty GA_X1`
	`st r4,GA_Y1`
	`lda LineColor`
	`sta GA_PEN`
	`lda #2`
	`sta GA_CMD`
	`pla`
	`rts`

	`comment ~`
	`pha`
`phx`	`phx`
`phy`	`phy`
`push r4`	`push r4`
`push r5`	`push r5`
`push r6`	`push r6`
Line 5132...	Line 5671...
`pop r4`	`pop r4`
`ply`	`ply`
`plx`	`plx`
`pla`	`pla`
`rts`	`rts`
	`~`

`;include "float.asm"`	`;include "float.asm"`

	`;--------------------------------------------------------------------------`
	`; RTF65002 code to display the date and time from the date/time device.`
	`;--------------------------------------------------------------------------`
	`DisplayDatetime`
	`pha`
	`phx`
	`lda #' '`
	`jsr DisplayChar`
	`stz DATETIME_SNAPSHOT ; take a snapshot of the running date/time`
	`lda DATETIME_DATE`
	`tax`
	`lsr r1,r1,#16`
	`jsr DisplayHalf ; display the year`
	`lda #'/'`
	`jsr DisplayChar`
	`txa`
	`lsr r1,r1,#8`
	`and #$FF`
	`jsr DisplayByte ; display the month`
	`lda #'/'`
	`jsr DisplayChar`
	`txa`
	`and #$FF`
	`jsr DisplayByte ; display the day`
	`lda #' '`
	`jsr DisplayChar`
	`lda #' '`
	`jsr DisplayChar`
	`lda DATETIME_TIME`
	`tax`
	`lsr r1,r1,#24`
	`jsr DisplayByte ; display hours`
	`lda #':'`
	`jsr DisplayChar`
	`txa`
	`lsr r1,r1,#16`
	`jsr DisplayByte ; display minutes`
	`lda #':'`
	`jsr DisplayChar`
	`txa`
	`lsr r1,r1,#8`
	`jsr DisplayByte ; display seconds`
	`lda #'.'`
	`jsr DisplayChar`
	`txa`
	`jsr DisplayByte ; display 100ths seconds`
	`jsr CRLF`
	`plx`
	`pla`
	`rts`

	`;--------------------------------------------------------------------------`
	`; ReadTemp`
	`; Read and display the temperature from a DS1626 temperature sensor`
	`; device. RTF65002 source code.`
	`;--------------------------------------------------------------------------`
	`DS1626_CMD =$FFDC0300`
	`DS1626_DAT =$FFDC0301`
	`; Commands`
	`START_CNV = $51;`
	`STOP_CNV = $22;`
	`READ_TEMP = $AA;`
	`READ_CONFIG = $AC;`
	`READ_TH = $A1;`
	`READ_TL = $A2;`
	`WRITE_TH = $01;`
	`WRITE_TL = $02;`
	`WRITE_CONFIG = $0C;`
	`POR = $54;`

	`ReadTemp:`
	`lda CONFIGREC ; Do we even have a temperature sensor ?`
	`bit #$10`
	`beq rdtmp3 ; If not, output '0.000'`
	`rdtmp1:`
	`; On power up the DS1626 interface circuit sends a power on reset (POR)`
	`; command to the DS1626. Waiting here makes sure this command has been`
	`; completed.`
	`jsr rdt_busy_wait`
	`lda #$0F ; 12 bits resolution, cpu mode, one-shot mode`
	`sta DS1626_DAT`
	`lda #WRITE_CONFIG ; write the desired config to the device`
	`sta DS1626_CMD`
	`jsr rdt_busy_wait`
	`lda #10`
	`jsr tSleep`
	`lda #0`
	`sta DS1626_DAT`
	`lda #START_CNV ; issue a start conversion command`
	`sta DS1626_CMD`
	`jsr rdt_busy_wait`
	`lda #10`
	`jsr tSleep`
	`; Now poll the config register to determine when the conversion has completed.`
	`rdtmp2:`
	`lda #READ_CONFIG ; issue the READ_CONFIG command`
	`sta DS1626_CMD`
	`jsr rdt_busy_wait`
	`pha`
	`lda #10 ; Wait a bit before checking again. The conversion`
	`jsr tSleep ; can take up to 1s to complete.`
	`pla`
	`bit #$80 ; test done bit`
	`beq rdtmp2 ; loop back if not done conversion`
	`lda #0`
	`sta DS1626_DAT ; issue a stop conversion command`
	`lda #STOP_CNV`
	`sta DS1626_CMD`
	`jsr rdt_busy_wait`
	`lda #10`
	`jsr tSleep`
	`lda #READ_TEMP ; issue the READ_TEMP command`
	`sta DS1626_CMD`
	`jsr rdt_busy_wait`
	`pha`
	`lda #10`
	`jsr tSleep`
	`pla`
	`rdtmp4:`
	`jsr CRLF`
	`and #$FFF`
	`bit #$800 ; check for negative temperature`
	`beq rdtmp7`
	`sub r1,r0,r1 ; negate the number`
	`and #$FFF`
	`pha`
	`lda #'-' ; output a minus sign`
	`jsr DisplayChar`
	`pla`
	`rdtmp7:`
	`pha ; save off value`
	`lsr r1,r1,#4 ; get rid of fractional portion`
	`and #$7F ; strip off sign bit`
	`ldx #3 ; output the whole number part`
	`jsr PRTNUM`
	`lda #'.' ; followed by a decimal point`
	`jsr DisplayChar`
	`pla ; get back temp value`
	`and #$0F`
	`mul r1,r1,#625 ; 1/16th's per degree`
	`pha ; save off fraction bits`
	`div r1,r1,#100 ; calculate the first digit`
	`add #'0'`
	`jsr DisplayChar ; output digit`
	`pla ; get back fractions bits`
	`pha ; and save again`
	`div r1,r1,#10 ; shift over to second digit`
	`mod r1,r1,#10 ; ignore high order bits`
	`add #'0'`
	`jsr DisplayChar ; display the digit`
	`pla ; get back fraction`
	`mod r1,r1,#10 ; compute low order digit`
	`add #'0'`
	`jsr DisplayChar ; display low order digit`
	`jsr CRLF`
	`rts`
	`rdtmp3:`
	`lda #0`
	`bra rdtmp4`

	`; Returns:`
	`; acc = value from data register`
	`;`
	`rdt_busy_wait:`
	`jsr KeybdGetChar`
	`cmp #CTRLC`
	`beq Monitor`
	`lda DS1626_DAT`
	`bit #$8000`
	`bne rdt_busy_wait`
	`rts`

	`tSleep:`
	`ldx Milliseconds`
	`txa`
	`tSleep1:`
	`ldx Milliseconds`
	`sub r2,r2,r1`
	`cpx #100`
	`blo tSleep1`
	`rts`

`;==============================================================================`	`;==============================================================================`
`; Memory Management routines follow.`	`; Memory Management routines follow.`
`;==============================================================================`	`;==============================================================================`
`MemInit:`	`MemInit:`
Line 5282...	Line 6003...
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`;`	`;`
`message "bus_err_rout"`	`message "bus_err_rout"`
`bus_err_rout:`	`bus_err_rout:`
`cld`	`cld`
	`ldx #87`
	`stx LEDS`
`pla ; get rid of the stacked flags`	`pla ; get rid of the stacked flags`
`ply ; get the error PC`	`ply ; get the error PC`
`ldx #$05FFFFF8 ; setup stack pointer top of memory`	`ldx #$05FFFFF8 ; setup stack pointer top of memory`
`txs`	`txs`
	`ldx #88`
	`stx LEDS`
`jsr CRLF`	`jsr CRLF`
	`stz RunningTCB`
	`stz IOFocusNdx`
`lda #msgBusErr`	`lda #msgBusErr`
`jsr DisplayStringB`	`jsr DisplayStringB`
`tya`	`tya`
`jsr DisplayWord ; display the originating PC address`	`jsr DisplayWord ; display the originating PC address`
`lda #msgDataAddr`	`lda #msgDataAddr`
`jsr DisplayStringB`	`jsr DisplayStringB`
`tsr #9,r1`	`tsr #9,r1`
`jsr DisplayWord`	`jsr DisplayWord`
`cli ; enable interrupts so we can get a char`	`ldx #89`
	`stx LEDS`
	`ldx #128`
	`ber2:`
	`lda #' '`
	`jsr DisplayChar`
	`tsr hist,r1`
	`jsr DisplayWord`
	`dex`
	`bne ber2`
	`jsr CRLF`
	`ber3:`
	`nop`
	`jmp ber3`
	`;cli ; enable interrupts so we can get a char`
`ber1:`	`ber1:`
`jsr KeybdGetChar`	`jsr KeybdGetCharDirect ; Don't use the keyboard buffer`
`cmp #-1`	`cmp #-1`
`beq ber1`	`beq ber1`
`jmp ber1`	`lda RunningTCB`
	`jsr KillTask`
	`jmp SelectTaskToRun`

`msgBusErr:`	`msgBusErr:`
`db "Bus error at: ",0`	`db "Bus error at: ",0`
`msgDataAddr:`	`msgDataAddr:`
`db " data address: ",0`	`db " data address: ",0`


	`;------------------------------------------------------------------------------`
	`; Reschedule tasks to run without affecting the timeout list timing.`
	`;------------------------------------------------------------------------------`
	`;`
	`reschedule:`
	`cld ; clear extended precision mode`

	`pusha ; save off regs on the stack`

	`ldx RunningTCB`
	`tsa ; save off the stack pointer`
	`sta TCB_SPSave,x`
	`tsr sp8,r1 ; and the eight bit mode stack pointer`
	`sta TCB_SP8Save,x`
	`tsr abs8,r1`
	`sta TCB_ABS8Save,x ; 8 bit emulation base register`
	`jmp SelectTaskToRun`

`strStartQue:`	`strStartQue:`
`db 1,0,0,0,2,0,0,0,3,1,0,0,4,0,0,0`	`db 1,0,0,0,2,0,0,0,3,0,1,0,4,0,0,0`
`; db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0`	`; db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; 100 Hz interrupt`	`; 100 Hz interrupt`
`; - takes care of "flashing" the cursor`	`; - takes care of "flashing" the cursor`
	`; - decrements timeouts for tasks on timeout list`
`; - switching tasks`	`; - switching tasks`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`;`	`;`
`p100Hz:`	`p100Hz:`
`; Handle every other interrupt because 100Hz interrupts may be too fast.`	`; Handle every other interrupt because 100Hz interrupts may be too fast.`
`pha`	`pha`
`lda #3 ; reset the edge sense circuit`	`lda #3 ; reset the edge sense circuit`
`sta PIC_RSTE`	`sta PIC_RSTE`
`; inc TEXTSCR+83 ; update IRQ live indicator on screen`
`lda IRQFlag`	`lda IRQFlag`
`ina`	`ina`
`sta IRQFlag`	`sta IRQFlag`
`ror`	`ror`
`bcc p100Hz11`
`pla`	`pla`
	`bcc p100Hz11`
`rti`	`rti`

`p100Hz11:`	`p100Hz11:`

`cld ; clear extended precision mode`	`cld ; clear extended precision mode`

`; save off regs on the stack`	`pusha ; save off regs on the stack`
`phx`
`phy`
`push r4`
`push r5`
`push r6`
`push r7`
`push r8`
`push r9`
`push r10`
`push r11`
`push r12`
`push r13`
`push r14`
`push r15`
`ldx RunningTCB`	`ldx RunningTCB`
`tsa ; save off the stack pointer`	`tsa ; save off the stack pointer`
`sta TCB_SPSave,x`	`sta TCB_SPSave,x`
`tsr sp8,r1 ; and the eight bit mode stack pointer`	`tsr sp8,r1 ; and the eight bit mode stack pointer`
`sta TCB_SP8Save,x`	`sta TCB_SP8Save,x`
`tsr abs8,r1`	`tsr abs8,r1`
`sta TCB_ABS8Save,x ; 8 bit emulation base register`	`sta TCB_ABS8Save,x ; 8 bit emulation base register`
`lda TCB_Status,x ; set the task status to PREEMPT`	`lda #TS_READY`
`and r1,r1,#~TS_RUNNING`
`or r1,r1,#TS_PREEMPT`
`sta TCB_Status,x`	`sta TCB_Status,x`
`p100Hz4:`	`p100Hz4:`

`; support EhBASIC's IRQ functionality`	`; support EhBASIC's IRQ functionality`
`; code derived from minimon.asm`	`; code derived from minimon.asm`
Line 5373...	Line 6120...
`lsr r4,r1`	`lsr r4,r1`
`or r1,r1,r4`	`or r1,r1,r4`
`and #$E0`	`and #$E0`
`sb r1,IrqBase`	`sb r1,IrqBase`

`inc TEXTSCR+83 ; update IRQ live indicator on screen`	`inc TEXTSCR+55 ; update IRQ live indicator on screen`

`; flash the cursor`	`; flash the cursor`
`cpx IOFocusNdx ; only flash the cursor for the task with the IO focus.`	`cpx IOFocusNdx ; only bother to flash the cursor for the task with the IO focus.`
`bne p100Hz1a`	`bne p100Hz1a`
`lda CursorFlash ; test if we want a flashing cursor`	`lda CursorFlash ; test if we want a flashing cursor`
`beq p100Hz1a`	`beq p100Hz1a`
`jsr CalcScreenLoc ; compute cursor location in memory`	`jsr CalcScreenLoc ; compute cursor location in memory`
`tay`	`tay`
Line 5403...	Line 6150...
`bne p100Hz14 ; has this entry timed out ?`	`bne p100Hz14 ; has this entry timed out ?`
`txa`	`txa`
`jsr RemoveFromTimeoutList`	`jsr RemoveFromTimeoutList`
`jsr AddTaskToReadyList`	`jsr AddTaskToReadyList`
`bra p100Hz15 ; go back and see if there's another task to be removed`	`bra p100Hz15 ; go back and see if there's another task to be removed`
	`; there could be a string of tasks to make ready.`
`p100Hz14:`	`p100Hz14:`
`dea ; decrement the entry's timeout`	`dea ; decrement the entry's timeout`
`sta TCB_Timeout,x`	`sta TCB_Timeout,x`

`p100Hz12:`	`p100Hz12:`
`SelectTaskToRun:`	`; Falls through into selecting a task to run`

	`;------------------------------------------------------------------------------`
`; Search the ready queues for a ready task.`	`; Search the ready queues for a ready task.`
`; The search is occasionally started at a lower priority queue in order`	`; The search is occasionally started at a lower priority queue in order`
`; to prevent starvation of lower priority tasks. This is managed by`	`; to prevent starvation of lower priority tasks. This is managed by`
`; using a tick count as an index to a string containing the start que.`	`; using a tick count as an index to a string containing the start que.`
	`;------------------------------------------------------------------------------`
	`;`
	`SelectTaskToRun:`
`ld r6,#5 ; number of queues to search`	`ld r6,#5 ; number of queues to search`
`ldy IRQFlag ; use the IRQFlag as a buffer index`	`ldy IRQFlag ; use the IRQFlag as a buffer index`
`lsr r3,r3,#1 ; the LSB is always the same`	`lsr r3,r3,#1 ; the LSB is always the same`
`and r3,r3,#$0F ; counts from 0 to 15`	`and r3,r3,#$0F ; counts from 0 to 15`
`lb r3,strStartQue,y ; get the queue to start search at`	`lb r3,strStartQue,y ; get the queue to start search at`
`p100Hz2:`	`sttr2:`
`lda HeadRdy0,y`	`lda QNdx0,y`
`bmi p100Hz1`	`bmi sttr1`
`; Move the head of the ready queue to the tail`	`lda TCB_NxtRdy,r1 ; Advance the queue index`
`jsr RemoveTaskFromReadyList ; remove task`	`sta QNdx0,y`
`jsr AddTaskToReadyList ; add it back (automatically goes to tail spot)`	`; This is the only place the RunningTCB is set (except for initialization).`
`ldx TCB_Status,r1 ; the task is no longer running`
`and r2,r2,#~TS_RUNNING`
`stx TCB_Status,r1`
`lda HeadRdy0,y`
`sta RunningTCB`	`sta RunningTCB`
`ldx TCB_Status,r1 ; flag the task as the running task`	`ldx #TS_RUNNING ; flag the task as the running task`
`or r2,r2,#TS_RUNNING ; task is now running and not preempt`
`and r2,r2,#~TS_PREEMPT`
`stx TCB_Status,r1`	`stx TCB_Status,r1`
`bra p100Hz3`	`; The mmu map better have the task control block area mapped`
`p100Hz1:`	`; properly.`
`iny`	`tax`
`cpy #5`	`lda CONFIGREC`
`bne p100Hz5`	`bit #4096`
`ldy #0`	`beq sttr4`
`p100Hz5`	`lda TCB_mmu_map,x`
`dec r6`	`sta MMU_OKEY ; select the mmu map for the task`
`bne p100Hz2`	`lda #2`
	`sta MMU_FUSE ; set fuse to 2 clocks before mapping starts`
`; here there were no tasks ready`	`sttr4:`
`; this might happen if the interrupt is called before tasks`
`; are setup. Otherwise the IDLE task should at least be running.`
`bra p100Hz6`
`p100Hz3:`
`p100Hz10`
`ldx RunningTCB`
`lda TCB_ABS8Save,x ; 8 bit emulation base register`	`lda TCB_ABS8Save,x ; 8 bit emulation base register`
`trs r1,abs8`	`trs r0,abs8`
`lda TCB_SP8Save,x ; get back eight bit stack pointer`	`lda TCB_SP8Save,x ; get back eight bit stack pointer`
`trs r1,sp8`	`trs r1,sp8`
`ldx TCB_SPSave,x ; get back stack pointer`	`ldx TCB_SPSave,x ; get back stack pointer`
`txs`	`txs`
`; restore registers`	`popa ; restore registers`
`p100Hz6:`
`pop r15`
`pop r14`
`pop r13`
`pop r12`
`pop r11`
`pop r10`
`pop r9`
`pop r8`
`pop r7`
`pop r6`
`pop r5`
`pop r4`
`ply`
`plx`
`pla`
`rti`	`rti`

	`; Set index to check the next ready list for a task to run`
	`sttr1:`
	`iny`
	`cpy #5`
	`bne sttr5`
	`ldy #0`
	`sttr5`
	`dec r6`
	`bne sttr2`

	`; Here there were no tasks ready`
	`; This should not be able to happen, so hang the machine.`
	`sttr3:`
	`ldx #94`
	`stx LEDS`
	`bra sttr3`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; 1000 Hz interrupt`	`; 1000 Hz interrupt`
`; This IRQ must be fast.`	`; This IRQ must be fast.`
`; Increments the millisecond counter`	`; Increments the millisecond counter`
Line 5489...	Line 6228...
`p1000Hz:`	`p1000Hz:`
`pha`	`pha`
`lda #2 ; reset edge sense circuit`	`lda #2 ; reset edge sense circuit`
`sta PIC_RSTE`	`sta PIC_RSTE`
`inc Milliseconds ; increment milliseconds count`	`inc Milliseconds ; increment milliseconds count`
`inc TEXTSCR+82 ; update IRQ live indicator on screen`
`pla`	`pla`
`rti`	`rti`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`; Sleep interrupt`	`; Sleep interrupt`
`; This interrupt just selects another task to run. The current task is`	`; This interrupt just selects another task to run. The current task is`
`; stuck in an infinite loop.`	`; stuck in an infinite loop.`
`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
`slp_rout:`	`slp_rout:`
`cld ; clear extended precision mode`	`cld ; clear extended precision mode`
`pha`	`pusha`
`phx`	`lda RunningTCB`
`phy`	`cmp #MAX_TASKNO`
`push r4`	`bhi slp1`
`push r5`	`jsr RemoveTaskFromReadyList`
`push r6`	`tax`
`push r7`
`push r8`
`push r9`
`push r10`
`push r11`
`push r12`
`push r13`
`push r14`
`push r15`
`ldx RunningTCB`
`bmi RunningTCBErr`
`and r2,r2,#$FF`
`tsa ; save off the stack pointer`	`tsa ; save off the stack pointer`
`sta TCB_SPSave,x`	`sta TCB_SPSave,x`
`tsr sp8,r1 ; and the eight bit mode stack pointer`	`tsr sp8,r1 ; and the eight bit mode stack pointer`
`sta TCB_SP8Save,x`	`sta TCB_SP8Save,x`
`lda TCB_Status,x ; set the task status to SLEEP`	`tsr abs8,r1`
`and r1,r1,#~TS_RUNNING`	`sta TCB_ABS8Save,x`
`or r1,r1,#TS_SLEEP`	`lda #TS_SLEEP ; set the task status to SLEEP`
`sta TCB_Status,x`	`sta TCB_Status,x`
`slp1:`	`slp1:`
`jmp SelectTaskToRun`	`jmp SelectTaskToRun`

`;------------------------------------------------------------------------------`	`;------------------------------------------------------------------------------`
Line 5555...	Line 6281...
`jsr CRLF`	`jsr CRLF`
`ina`	`ina`
`sta 4,x ; save incremented return address back to stack`	`sta 4,x ; save incremented return address back to stack`
`ldx #64`	`ldx #64`
`ioi1:`	`ioi1:`
`tsr abs8,r1`	`tsr hist,r1`
`jsr DisplayWord`	`jsr DisplayWord`
`lda #' '`	`lda #' '`
`jsr DisplayChar`	`jsr DisplayChar`
`dex`	`dex`
`bne ioi1`	`bne ioi1`

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[/] [rtf65002/] [trunk/] [software/] [asm/] [bootrom.asm] - Diff between revs 31 and 34