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[/] [s1_core/] [trunk/] [docs/] [other/] [ACCESSES.txt] - Diff between revs 14 and 17

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	`Simply RISC S1 Core - Boot Code`
	`===============================`

	`This is the disassembled boot code; the original source code can be`
	`found inside the official OpenSPARC T1 tarball, in the file:`
	`$T1_ROOT/verif/diag/assembly/include/hred_reset_handler.s`


`Fetches from SSI OpenBoot PROM (section RED_SEC)`	`Fetches from SSI OpenBoot PROM (section RED_SEC)`
`================================================`	`================================================`

`fff0000020: 03 00 00 00 sethi %hi(0), %g1`	`fff0000020: 03 00 00 00 sethi %hi(0), %g1`
`fff0000024: 05 00 01 00 sethi %hi(0x40000), %g2`	`fff0000024: 05 00 01 00 sethi %hi(0x40000), %g2`