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[/] [s1_core/] [trunk/] [hdl/] [rtl/] [s1_top/] [s1_defs.h] - Diff between revs 4 and 44

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Rev 4 Rev 44
Line 18... Line 18...
 */
 */
 
 
`include "t1_defs.h"
`include "t1_defs.h"
`timescale 1ns/100ps
`timescale 1ns/100ps
 
 
 
`define FPGA_SYN
 
`define FPGA_SYN_1THREAD
 
`define FPGA_SYN_NO_SPU
 
 
// Size of the buses
// Size of the buses
`define WB_ADDR_WIDTH 64
`define WB_ADDR_WIDTH 64
`define WB_DATA_WIDTH 64
`define WB_DATA_WIDTH 64
 
 
// States of the FSM of the bridge
// States of the FSM of the bridge

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