OpenCores
URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] [hdl/] [rtl/] [s1_top/] [s1_top.v] - Diff between revs 4 and 98

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 4 Rev 98
Line 84... Line 84...
 
 
  // cpx interface
  // cpx interface
  wire [4:0] pcx_spc_grant_px; // pcx to processor grant info  
  wire [4:0] pcx_spc_grant_px; // pcx to processor grant info  
  wire       cpx_spc_data_rdy_cx2; // cpx data inflight to sparc  
  wire       cpx_spc_data_rdy_cx2; // cpx data inflight to sparc  
  wire [`CPX_WIDTH-1:0] cpx_spc_data_cx2;     // cpx to sparc data packet
  wire [`CPX_WIDTH-1:0] cpx_spc_data_cx2;     // cpx to sparc data packet
  wire wbm_spc_stallreq;              // Stall request
  wire wbm_spc_stall;               // Stall requests
 
  wire wbm_spc_resume;              // Resume requests
 
 
  wire [3:0]  const_cpuid;
  wire [3:0]  const_cpuid;
  wire [7:0]  const_maskid;           // To ifu of sparc_ifu.v
  wire [7:0]  const_maskid;           // To ifu of sparc_ifu.v
 
 
  // sscan
  // sscan
Line 157... Line 158...
 
 
    // Wires connected to SPARC Core inputs
    // Wires connected to SPARC Core inputs
    .pcx_spc_grant_px(pcx_spc_grant_px),
    .pcx_spc_grant_px(pcx_spc_grant_px),
    .cpx_spc_data_rdy_cx2(cpx_spc_data_rdy_cx2),
    .cpx_spc_data_rdy_cx2(cpx_spc_data_rdy_cx2),
    .cpx_spc_data_cx2(cpx_spc_data_cx2),
    .cpx_spc_data_cx2(cpx_spc_data_cx2),
    .wbm_spc_stallreq(wbm_spc_stallreq),
    .wbm_spc_stall(wbm_spc_stall),
 
    .wbm_spc_resume(wbm_spc_resume),
    .const_cpuid(const_cpuid),
    .const_cpuid(const_cpuid),
    .const_maskid(const_maskid),
    .const_maskid(const_maskid),
    .ctu_tck(ctu_tck),
    .ctu_tck(ctu_tck),
    .ctu_sscan_se(ctu_sscan_se),
    .ctu_sscan_se(ctu_sscan_se),
    .ctu_sscan_snap(ctu_sscan_snap),
    .ctu_sscan_snap(ctu_sscan_snap),
Line 210... Line 212...
 
 
    // Bridge outputs connected to SPARC Core inputs
    // Bridge outputs connected to SPARC Core inputs
    .spc_grant_o(pcx_spc_grant_px),
    .spc_grant_o(pcx_spc_grant_px),
    .spc_ready_o(cpx_spc_data_rdy_cx2),
    .spc_ready_o(cpx_spc_data_rdy_cx2),
    .spc_packetin_o(cpx_spc_data_cx2),
    .spc_packetin_o(cpx_spc_data_cx2),
    .spc_stallreq_o(wbm_spc_stallreq),
    .spc_stall_o(wbm_spc_stall),
 
    .spc_resume_o(wbm_spc_resume),
 
 
    // Top-level Wishbone Interconnect inputs
    // Top-level Wishbone Interconnect inputs
    .wbm_ack_i(wbm_ack_i),
    .wbm_ack_i(wbm_ack_i),
    .wbm_data_i(wbm_data_i),
    .wbm_data_i(wbm_data_i),
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.