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[/] [s1_core/] [trunk/] [hdl/] [rtl/] [sparc_core/] [tlu.v] - Diff between revs 105 and 113

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Rev 105 Rev 113
Line 30... Line 30...
//
//
*/
*/
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
// Global header file includes
// Global header file includes
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
// system level definition file which contains the /*
`include        "sys.h" // system level definition file which contains the 
/* ========== Copyright Header Begin ==========================================
 
*
 
* OpenSPARC T1 Processor File: sys.h
 
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
 
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
 
*
 
* The above named program is free software; you can redistribute it and/or
 
* modify it under the terms of the GNU General Public
 
* License version 2 as published by the Free Software Foundation.
 
*
 
* The above named program is distributed in the hope that it will be
 
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
 
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 
* General Public License for more details.
 
*
 
* You should have received a copy of the GNU General Public
 
* License along with this work; if not, write to the Free Software
 
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
 
*
 
* ========== Copyright Header End ============================================
 
*/
 
// -*- verilog -*-
 
////////////////////////////////////////////////////////////////////////
 
/*
 
//
 
// Description:         Global header file that contain definitions that
 
//                      are common/shared at the systme level
 
*/
 
////////////////////////////////////////////////////////////////////////
 
//
 
// Setting the time scale
 
// If the timescale changes, JP_TIMESCALE may also have to change.
 
`timescale      1ps/1ps
 
 
 
//
 
// JBUS clock
 
// =========
 
//
 
 
 
 
 
 
 
// Afara Link Defines
 
// ==================
 
 
 
// Reliable Link
 
 
 
 
 
 
 
 
 
// Afara Link Objects
 
 
 
 
 
// Afara Link Object Format - Reliable Link
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// Afara Link Object Format - Congestion
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// Afara Link Object Format - Acknowledge
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// Afara Link Object Format - Request
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// Afara Link Object Format - Message
 
 
 
 
 
 
 
// Acknowledge Types
 
 
 
 
 
 
 
 
 
// Request Types
 
 
 
 
 
 
 
 
 
 
 
// Afara Link Frame
 
 
 
 
 
 
 
//
 
// UCB Packet Type
 
// ===============
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// UCB Data Packet Format
 
// ======================
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// Size encoding for the UCB_SIZE_HI/LO field
 
// 000 - byte
 
// 001 - half-word
 
// 010 - word
 
// 011 - double-word
 
// 111 - quad-word
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// UCB Interrupt Packet Format
 
// ===========================
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//`define UCB_THR_HI             9      // (6) cpu/thread ID shared with
 
//`define UCB_THR_LO             4             data packet format
 
//`define UCB_PKT_HI             3      // (4) packet type shared with
 
//`define UCB_PKT_LO             0      //     data packet format
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// FCRAM Bus Widths
 
// ================
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// ENET clock periods
 
// ==================
 
//
 
 
 
 
 
 
 
 
 
//
 
// JBus Bridge defines
 
// =================
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// PCI Device Address Configuration
 
// ================================
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
                        // time scale definition
                        // time scale definition
 
 
/*
`include        "tlu.h"
/* ========== Copyright Header Begin ==========================================
 
*
 
* OpenSPARC T1 Processor File: tlu.h
 
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
 
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
 
*
 
* The above named program is free software; you can redistribute it and/or
 
* modify it under the terms of the GNU General Public
 
* License version 2 as published by the Free Software Foundation.
 
*
 
* The above named program is distributed in the hope that it will be
 
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
 
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 
* General Public License for more details.
 
*
 
* You should have received a copy of the GNU General Public
 
* License along with this work; if not, write to the Free Software
 
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
 
*
 
* ========== Copyright Header End ============================================
 
*/
 
// ifu trap types
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// modified for hypervisor support
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
 
 
 
 
// modified due to bug 2588
 
// `define      TSA_PSTATE_VRANGE2_LO 16 
 
 
 
 
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// added due to Niagara SRAMs methodology
 
// The following defines have been replaced due
 
// the memory macro replacement from:
 
// bw_r_rf32x144 -> 2x bw_r_rf32x80
 
/*
 
`define TSA_MEM_WIDTH     144
 
`define TSA_HTSTATE_HI    142 //  3 bits
 
`define TSA_HTSTATE_LO    140
 
`define TSA_TPC_HI        138 // 47 bits
 
`define TSA_TPC_LO         92
 
`define TSA_TNPC_HI        90 // 47 bits
 
`define TSA_TNPC_LO        44
 
`define TSA_TSTATE_HI      40 // 29 bits
 
`define TSA_TSTATE_LO      12
 
`define TSA_TTYPE_HI        8 //  9 bits
 
`define TSA_TTYPE_LO        0
 
`define TSA_MEM_CWP_LO     12
 
`define TSA_MEM_CWP_HI     14
 
`define TSA_MEM_PSTATE_LO  15
 
`define TSA_MEM_PSTATE_HI  22
 
`define TSA_MEM_ASI_LO     23
 
`define TSA_MEM_ASI_HI     30
 
`define TSA_MEM_CCR_LO     31
 
`define TSA_MEM_CCR_HI     38
 
`define TSA_MEM_GL_LO      39
 
`define TSA_MEM_GL_HI      40
 
*/
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// HPSTATE position definitions within wsr
 
 
 
 
 
 
 
 
 
 
 
 
 
// TSTATE postition definitions within wsr
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// modified due to bug 2588
 
 
 
 
 
// added for bug 2584 
 
 
 
 
 
 
 
 
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// tick_cmp and stick_cmp definitions
 
 
 
 
 
 
 
 
 
 
 
//
 
// PIB WRAP
 
 
 
 
 
 
 
// HPSTATE postition definitions
 
 
 
 
 
 
 
 
 
 
 
 
 
// HTBA definitions
 
 
 
 
 
 
 
 
 
// TBA definitions
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// added for the hypervisor support
 
 
 
 
 
// modified due to bug 2588
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// compressed PSTATE WSR definitions
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// ASI_QUEUE for hypervisor
 
// Queues are: CPU_MONODO
 
//             DEV_MONODO
 
//             RESUMABLE_ERROR
 
//             NON_RESUMABLE_ERROR
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// for address range checking
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// Niagara scratch-pads
 
// VA address of 0x20 and 0x28 are exclusive to hypervisor
 
// 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// range checking 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// PIB related definitions
 
// Bit definition for events
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// 
 
// PIB related definitions
 
// PCR and PIC address definitions
 
 
 
 
 
 
 
// 
 
// PCR bit definitions
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// PIC definitions
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// PIC  mask bit position definitions
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
// added define from sparc_tlu_int.v 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
//
 
// shadow scan related definitions 
 
 
 
// modified due to logic redistribution
 
// `define TCL_SSCAN_WIDTH 12 
 
 
 
 
 
 
 
 
 
 
 
// `define TCL_SSCAN_LO 51 
 
 
 
 
 
 
 
 
 
// 
 
// position definitions - TDP
 
 
 
 
 
 
 
 
 
 
 
 
 
// 
 
// position definitions - TCL
 
 
 
 
 
 
 
 
 
// 
 
// To speedup POR for verification purposes
 
 
 
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
// Local header file includes / local defines
// Local header file includes / local defines
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
 
 
module tlu (/*AUTOARG*/
module tlu (/*AUTOARG*/
Line 793... Line 118...
// Beginning of automatic inputs (from unused autoinst inputs)
// Beginning of automatic inputs (from unused autoinst inputs)
//
//
// input                        clk;                    // To tlu_int of sparc_tlu_int.v, ...
// input                        clk;                    // To tlu_int of sparc_tlu_int.v, ...
input                   rclk;                   // To tlu_int of sparc_tlu_int.v, ...
input                   rclk;                   // To tlu_int of sparc_tlu_int.v, ...
input [3:0]              const_cpuid;            // To tlu_int of sparc_tlu_int.v, ...
input [3:0]              const_cpuid;            // To tlu_int of sparc_tlu_int.v, ...
input [48-1:0] exu_lsu_ldst_va_e;        // To mmu_dp of tlu_mmu_dp.v
input [`ASI_VA_WIDTH-1:0] exu_lsu_ldst_va_e;     // To mmu_dp of tlu_mmu_dp.v
input [10-1:0] lsu_tlu_ldst_va_m;        // To mmu_dp of tlu_mmu_dp.v
input [`TLU_ASI_VA_WIDTH-1:0] lsu_tlu_ldst_va_m; // To mmu_dp of tlu_mmu_dp.v
input [7:0]     exu_mmu_early_va_e;     // From exu of sparc_exu.v
input [7:0]     exu_mmu_early_va_e;     // From exu of sparc_exu.v
input [7:0]              exu_tlu_ccr0_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr0_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr1_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr1_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr2_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr2_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr3_w;         // To tdp of tlu_tdp.v
input [7:0]              exu_tlu_ccr3_w;         // To tdp of tlu_tdp.v
Line 844... Line 169...
input                   lsu_tlu_early_flush_w;  // To tcl of tlu_tcl.v
input                   lsu_tlu_early_flush_w;  // To tcl of tlu_tcl.v
input                   lsu_tlu_early_flush2_w; // To tcl of tlu_tcl.v
input                   lsu_tlu_early_flush2_w; // To tcl of tlu_tcl.v
input                   ifu_tlu_hwint_m;        // To tcl of tlu_tcl.v
input                   ifu_tlu_hwint_m;        // To tcl of tlu_tcl.v
input                   ifu_tlu_immu_miss_m;    // To tcl of tlu_tcl.v, ...
input                   ifu_tlu_immu_miss_m;    // To tcl of tlu_tcl.v, ...
input                   ifu_tlu_pc_oor_e;       // To tcl of tlu_tcl.v
input                   ifu_tlu_pc_oor_e;       // To tcl of tlu_tcl.v
input [4-1:0] ifu_tlu_l2imiss;   // To tcl of tlu_tcl.v, ...
input [`TLU_THRD_NUM-1:0] ifu_tlu_l2imiss;       // To tcl of tlu_tcl.v, ...
input                   ifu_tlu_inst_vld_m;     // To tcl of tlu_tcl.v
input                   ifu_tlu_inst_vld_m;     // To tcl of tlu_tcl.v
input                   ifu_tlu_inst_vld_m_bf1; // To tcl of tlu_tcl.v
input                   ifu_tlu_inst_vld_m_bf1; // To tcl of tlu_tcl.v
input                   ifu_tlu_itlb_done;      // To mmu_ctl of tlu_mmu_ctl.v
input                   ifu_tlu_itlb_done;      // To mmu_ctl of tlu_mmu_ctl.v
// input [1:0]          ifu_tlu_ldst_size_e;    // To mmu_ctl of tlu_mmu_ctl.v
// input [1:0]          ifu_tlu_ldst_size_e;    // To mmu_ctl of tlu_mmu_ctl.v
// modified for bug 3017
// modified for bug 3017
Line 869... Line 194...
input                   ifu_tlu_trap_m;     // To tcl of tlu_tcl.v
input                   ifu_tlu_trap_m;     // To tcl of tlu_tcl.v
input [7:0]              lsu_asi_reg0;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg0;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg1;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg1;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg2;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg2;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg3;           // To tdp of tlu_tdp.v
input [7:0]              lsu_asi_reg3;           // To tdp of tlu_tdp.v
input [8-1:0] lsu_asi_state;             // To tcl of tlu_tcl.v, ...
input [`TLU_ASI_STATE_WIDTH-1:0] lsu_asi_state;          // To tcl of tlu_tcl.v, ...
// added asynchronize trap to handle correctable dmmu parity error
// added asynchronize trap to handle correctable dmmu parity error
input           lsu_tlu_async_ttype_vld_g; // lsu asynchronous trap valid
input           lsu_tlu_async_ttype_vld_g; // lsu asynchronous trap valid
input           lsu_tlu_defr_trp_taken_g; // lsu asynchronous trap valid
input           lsu_tlu_defr_trp_taken_g; // lsu asynchronous trap valid
input           lsu_mmu_defr_trp_taken_g; // lsu asynchronous trap valid
input           lsu_mmu_defr_trp_taken_g; // lsu asynchronous trap valid
input [6:0]     lsu_tlu_async_ttype_g;  // lsu asynchronous trap type 
input [6:0]     lsu_tlu_async_ttype_g;  // lsu asynchronous trap type 
Line 890... Line 215...
// input                        lsu_tlu_flt_ld_nfo_pg_g;// To tcl of tlu_tcl.v
// input                        lsu_tlu_flt_ld_nfo_pg_g;// To tcl of tlu_tcl.v
// input                        lsu_tlu_illegal_asi_action_g;// To tcl of tlu_tcl.v
// input                        lsu_tlu_illegal_asi_action_g;// To tcl of tlu_tcl.v
input [17:0]     lsu_tlu_intpkt;         // To tlu_int of sparc_tlu_int.v
input [17:0]     lsu_tlu_intpkt;         // To tlu_int of sparc_tlu_int.v
// modified for shadow scan
// modified for shadow scan
// input [3:0] lsu_tlu_iobrdge_pc_sel;
// input [3:0] lsu_tlu_iobrdge_pc_sel;
input [4-1:0] ctu_sscan_tid;
input [`TLU_THRD_NUM-1:0] ctu_sscan_tid;
input                   lsu_tlu_misalign_addr_ldst_atm_m;// To tcl of tlu_tcl.v
input                   lsu_tlu_misalign_addr_ldst_atm_m;// To tcl of tlu_tcl.v
// input                        lsu_tlu_nonalt_ldst_m;  // To tcl of tlu_tcl.v
// input                        lsu_tlu_nonalt_ldst_m;  // To tcl of tlu_tcl.v
input [12:0]     lsu_tlu_pctxt_m;        // To mmu_dp of tlu_mmu_dp.v
input [12:0]     lsu_tlu_pctxt_m;        // To mmu_dp of tlu_mmu_dp.v
input                   lsu_tlu_pcxpkt_ack;     // To tlu_int of sparc_tlu_int.v
input                   lsu_tlu_pcxpkt_ack;     // To tlu_int of sparc_tlu_int.v
input                   lsu_tlu_priv_action_g;  // To tcl of tlu_tcl.v
input                   lsu_tlu_priv_action_g;  // To tcl of tlu_tcl.v
Line 929... Line 254...
input                   sehold;                 // To tlu_int of sparc_tlu_int.v, ...
input                   sehold;                 // To tlu_int of sparc_tlu_int.v, ...
input                   se;                     // To tlu_int of sparc_tlu_int.v, ...
input                   se;                     // To tlu_int of sparc_tlu_int.v, ...
input                   si0,si1,short_si0,short_si1;                    // To tlu_int of sparc_tlu_int.v, ...
input                   si0,si1,short_si0,short_si1;                    // To tlu_int of sparc_tlu_int.v, ...
// End of automatics
// End of automatics
// Read/Write Privileged State Register Access.
// Read/Write Privileged State Register Access.
input   [7-1:0] ifu_tlu_sraddr_d;      // addr of sr(st/pr)
input   [`TLU_ASR_ADDR_WIDTH-1:0] ifu_tlu_sraddr_d;      // addr of sr(st/pr)
input   [7-1:0] ifu_tlu_sraddr_d_v2;   // addr of sr(st/pr)
input   [`TLU_ASR_ADDR_WIDTH-1:0] ifu_tlu_sraddr_d_v2;   // addr of sr(st/pr)
input           ifu_tlu_rsr_inst_d ;    // valid rd sr(st/pr)
input           ifu_tlu_rsr_inst_d ;    // valid rd sr(st/pr)
// modified for timing
// modified for timing
// input           ifu_tlu_wsr_inst_d ; // valid wr sr(st/pr)
// input           ifu_tlu_wsr_inst_d ; // valid wr sr(st/pr)
input           lsu_tlu_wsr_inst_e ;    // valid wr sr(st/pr)
input           lsu_tlu_wsr_inst_e ;    // valid wr sr(st/pr)
input   [63:0]  exu_tlu_wsr_data_m ;    // pr/st data to irf.
input   [63:0]  exu_tlu_wsr_data_m ;    // pr/st data to irf.
Line 1000... Line 325...
output [58:0]    tlu_dtlb_tte_tag_w2;    // From mmu_dp of tlu_mmu_dp.v
output [58:0]    tlu_dtlb_tte_tag_w2;    // From mmu_dp of tlu_mmu_dp.v
output[3:0]              lsu_ifu_inj_ack ;       // ack for tlb error injection.
output[3:0]              lsu_ifu_inj_ack ;       // ack for tlb error injection.
//
//
// width modified for hypervisor support
// width modified for hypervisor support
// output [2:0] tlu_exu_agp;            // From tcl of tlu_tcl.v
// output [2:0] tlu_exu_agp;            // From tcl of tlu_tcl.v
output [2-1:0] tlu_exu_agp;              // From tcl of tlu_tcl.v
output [`TSA_GLOBAL_WIDTH-1:0] tlu_exu_agp;              // From tcl of tlu_tcl.v
output                  tlu_exu_agp_swap;       // From tcl of tlu_tcl.v
output                  tlu_exu_agp_swap;       // From tcl of tlu_tcl.v
output [1:0]    tlu_exu_agp_tid;        // From tcl of tlu_tcl.v
output [1:0]    tlu_exu_agp_tid;        // From tcl of tlu_tcl.v
output [7:0]     tlu_exu_ccr_m;          // From tcl of tlu_tcl.v
output [7:0]     tlu_exu_ccr_m;          // From tcl of tlu_tcl.v
output [2:0]     tlu_exu_cwp_m;          // From tcl of tlu_tcl.v
output [2:0]     tlu_exu_cwp_m;          // From tcl of tlu_tcl.v
output                  tlu_exu_cwp_retry_m;    // From tcl of tlu_tcl.v
output                  tlu_exu_cwp_retry_m;    // From tcl of tlu_tcl.v
output                  tlu_exu_cwpccr_update_m;// From tcl of tlu_tcl.v
output                  tlu_exu_cwpccr_update_m;// From tcl of tlu_tcl.v
// tlu_exu_rsr_data_e being replaced by tlu_exu_rsr_data_m
// tlu_exu_rsr_data_e being replaced by tlu_exu_rsr_data_m
// the bus will become obsolete
// the bus will become obsolete
// output [`TLU_ASR_DATA_WIDTH-1:0] tlu_exu_rsr_data_e;     // From tdp of tlu_tdp.v
// output [`TLU_ASR_DATA_WIDTH-1:0] tlu_exu_rsr_data_e;     // From tdp of tlu_tdp.v
output [64-1:0] tlu_exu_rsr_data_m;     // From tdp of tlu_tdp.v
output [`TLU_ASR_DATA_WIDTH-1:0] tlu_exu_rsr_data_m;     // From tdp of tlu_tdp.v
output [40:0]    tlu_idtlb_dmp_key_g;    // From mmu_dp of tlu_mmu_dp.v
output [40:0]    tlu_idtlb_dmp_key_g;    // From mmu_dp of tlu_mmu_dp.v
output [1:0]     tlu_idtlb_dmp_thrid_g;  // From mmu_ctl of tlu_mmu_ctl.v
output [1:0]     tlu_idtlb_dmp_thrid_g;  // From mmu_ctl of tlu_mmu_ctl.v
output [3:0]     tlu_ifu_hwint_i3;       // From tlu_int of sparc_tlu_int.v
output [3:0]     tlu_ifu_hwint_i3;       // From tlu_int of sparc_tlu_int.v
// removed - ifu will derive the signal internally
// removed - ifu will derive the signal internally
// output [3:0] tlu_ifu_int_activate_i3;// From tlu_int of sparc_tlu_int.v
// output [3:0] tlu_ifu_int_activate_i3;// From tlu_int of sparc_tlu_int.v
Line 1059... Line 384...
output [3:0]     tlu_lsu_redmode_rst_d1; // From tcl of tlu_tcl.v
output [3:0]     tlu_lsu_redmode_rst_d1; // From tcl of tlu_tcl.v
// output [`TLU_THRD_NUM-1:0] tlu_lsu_async_ack_w2;     // From tcl of tlu_tcl.v
// output [`TLU_THRD_NUM-1:0] tlu_lsu_async_ack_w2;     // From tcl of tlu_tcl.v
output                  tlu_lsu_stxa_ack;       // From mmu_ctl of tlu_mmu_ctl.v
output                  tlu_lsu_stxa_ack;       // From mmu_ctl of tlu_mmu_ctl.v
output [1:0]     tlu_lsu_stxa_ack_tid;   // From mmu_ctl of tlu_mmu_ctl.v
output [1:0]     tlu_lsu_stxa_ack_tid;   // From mmu_ctl of tlu_mmu_ctl.v
output [1:0]     tlu_lsu_tid_m;          // From tcl of tlu_tcl.v
output [1:0]     tlu_lsu_tid_m;          // From tcl of tlu_tcl.v
output [4-1:0] tlu_lsu_tl_zero;  // From tcl of tlu_tcl.v
output [`TLU_THRD_NUM-1:0] tlu_lsu_tl_zero;      // From tcl of tlu_tcl.v
output [4-1:0] tlu_sftint_vld; // From tcl of tlu_tcl.v
output [`TLU_THRD_NUM-1:0] tlu_sftint_vld; // From tcl of tlu_tcl.v
output [4-1:0] tlu_hintp_vld;  // From tcl of tlu_tcl.v
output [`TLU_THRD_NUM-1:0] tlu_hintp_vld;  // From tcl of tlu_tcl.v
output [4-1:0] tlu_rerr_vld;  // From tcl of tlu_tcl.v
output [`TLU_THRD_NUM-1:0] tlu_rerr_vld;  // From tcl of tlu_tcl.v
// End of automatics
// End of automatics
   // Outputs
   // Outputs
// End of automatics
// End of automatics
// output tlu_ifu_flush_pipe_w; // From tcl of tlu_tcl.v
// output tlu_ifu_flush_pipe_w; // From tcl of tlu_tcl.v
output tlu_early_flush_pipe_w;  // From tcl of tlu_tcl.v
output tlu_early_flush_pipe_w;  // From tcl of tlu_tcl.v
output tlu_early_flush_pipe2_w; // From tcl of tlu_tcl.v
output tlu_early_flush_pipe2_w; // From tcl of tlu_tcl.v
output tlu_exu_early_flush_pipe_w;      // From tcl of tlu_tcl.v
output tlu_exu_early_flush_pipe_w;      // From tcl of tlu_tcl.v
output tlu_lsu_ldxa_async_data_vld ; // tlu_lsu_ldxa_data_vld is for async op.
output tlu_lsu_ldxa_async_data_vld ; // tlu_lsu_ldxa_data_vld is for async op.
output [4-1:0] tlu_hpstate_priv;
output [`TLU_THRD_NUM-1:0] tlu_hpstate_priv;
output [4-1:0] tlu_hpstate_enb;
output [`TLU_THRD_NUM-1:0] tlu_hpstate_enb;
// added for hpstate.ibe ECO
// added for hpstate.ibe ECO
output [4-1:0] tlu_hpstate_ibe;
output [`TLU_THRD_NUM-1:0] tlu_hpstate_ibe;
output tlu_exu_priv_trap_m; // local traps send to exu 
output tlu_exu_priv_trap_m; // local traps send to exu 
output tlu_lsu_priv_trap_m; // local traps send to exu 
output tlu_lsu_priv_trap_m; // local traps send to exu 
// output tlu_lsu_priv_trap_w; // local traps send to exu 
// output tlu_lsu_priv_trap_w; // local traps send to exu 
output tlu_exu_pic_onebelow_m; // local traps send to exu 
output tlu_exu_pic_onebelow_m; // local traps send to exu 
output tlu_exu_pic_twobelow_m; // local traps send to exu 
output tlu_exu_pic_twobelow_m; // local traps send to exu 
Line 1112... Line 437...
wire [33:0]              tlu_partial_trap_pc_w1;
wire [33:0]              tlu_partial_trap_pc_w1;
wire [1:0]               tlu_int_tid_m;          // To tlu_int of sparc_tlu_int.v
wire [1:0]               tlu_int_tid_m;          // To tlu_int of sparc_tlu_int.v
wire [3:0]               tlu_sftint_vld;         // From tcl of tlu_tcl.v
wire [3:0]               tlu_sftint_vld;         // From tcl of tlu_tcl.v
wire                    tlu_asi_write_g;        // From hyperv of tlu_hyperv.v
wire                    tlu_asi_write_g;        // From hyperv of tlu_hyperv.v
wire                    tlu_tte_real_g ;        // tte is real
wire                    tlu_tte_real_g ;        // tte is real
wire [4-1:0] tlu_hpstate_tlz;
wire [`TLU_THRD_NUM-1:0] tlu_hpstate_tlz;
wire [8-1:0] tlu_asi_state_e;
wire [`TLU_ASI_STATE_WIDTH-1:0] tlu_asi_state_e;
// modified due to memory macro swap
// modified due to memory macro swap
// 
// 
// wire [`TSA_MEM_WIDTH-1:0]            tsa_dout;
// wire [`TSA_MEM_WIDTH-1:0]            tsa_dout;
wire [80-1:0] tsa0_dout;
wire [`TSA_MEM_WIDTH-1:0] tsa0_dout;
wire [80-1:0] tsa1_dout;
wire [`TSA_MEM_WIDTH-1:0] tsa1_dout;
 
 
/*AUTOWIRE*/
/*AUTOWIRE*/
// Beginning of automatic wires (for undeclared instantiated-module outputs)
// Beginning of automatic wires (for undeclared instantiated-module outputs)
wire [64-1:0]            tlu_wsr_data_w; // From tdp of tlu_tdp.v
wire [`TLU_ASR_DATA_WIDTH-1:0]           tlu_wsr_data_w; // From tdp of tlu_tdp.v
wire                    dmmu_any_sfsr_wr;       // From mmu_ctl of tlu_mmu_ctl.v
wire                    dmmu_any_sfsr_wr;       // From mmu_ctl of tlu_mmu_ctl.v
wire [3:0]               dmmu_sfar_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
wire [3:0]               dmmu_sfar_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
// wire [3:0]           dmmu_sfsr_trp_wr;       // From tcl of tlu_tcl.v
// wire [3:0]           dmmu_sfsr_trp_wr;       // From tcl of tlu_tcl.v
wire [3:0]               dmmu_sfsr_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
wire [3:0]               dmmu_sfsr_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
wire                    immu_any_sfsr_wr;       // From mmu_ctl of tlu_mmu_ctl.v
wire                    immu_any_sfsr_wr;       // From mmu_ctl of tlu_mmu_ctl.v
Line 1153... Line 478...
wire [3:0]               tlu_dsfsr_flt_vld;      // From mmu_dp of tlu_mmu_dp.v
wire [3:0]               tlu_dsfsr_flt_vld;      // From mmu_dp of tlu_mmu_dp.v
wire [47:13]    tlu_dtag_access_w2;     // From mmu_dp of tlu_mmu_dp.v
wire [47:13]    tlu_dtag_access_w2;     // From mmu_dp of tlu_mmu_dp.v
wire [3:0]               tlu_dtsb_size_w2;       // From mmu_dp of tlu_mmu_dp.v
wire [3:0]               tlu_dtsb_size_w2;       // From mmu_dp of tlu_mmu_dp.v
wire                    tlu_dtsb_split_w2;      // From mmu_dp of tlu_mmu_dp.v
wire                    tlu_dtsb_split_w2;      // From mmu_dp of tlu_mmu_dp.v
wire [1:0]               tlu_agp_tid_w2;     // From tcl of tlu_tcl.v
wire [1:0]               tlu_agp_tid_w2;     // From tcl of tlu_tcl.v
wire [9-1:0] tlu_final_offset_w1;        // From tcl of tlu_tcl.v
wire [`TSA_TTYPE_WIDTH-1:0] tlu_final_offset_w1; // From tcl of tlu_tcl.v
wire [9-1:0] tlu_final_ttype_w2; // From tcl of tlu_tcl.v
wire [`TSA_TTYPE_WIDTH-1:0] tlu_final_ttype_w2;  // From tcl of tlu_tcl.v
wire                    tlu_full_flush_pipe_w2; // From tcl of tlu_tcl.v
wire                    tlu_full_flush_pipe_w2; // From tcl of tlu_tcl.v
wire            tlu_tcc_inst_w; // From tcl of tlu_tcl.v
wire            tlu_tcc_inst_w; // From tcl of tlu_tcl.v
wire                    tlu_local_flush_w;      // From tcl of tlu_tcl.v
wire                    tlu_local_flush_w;      // From tcl of tlu_tcl.v
wire [47:0]              tlu_idtsb_8k_ptr;       // From mmu_ctl of tlu_mmu_ctl.v
wire [47:0]              tlu_idtsb_8k_ptr;       // From mmu_ctl of tlu_mmu_ctl.v
wire                    tlu_asi_data_nf_vld_w2; // From mmu_ctl of tlu_mmu_ctl.v
wire                    tlu_asi_data_nf_vld_w2; // From mmu_ctl of tlu_mmu_ctl.v
Line 1189... Line 514...
wire [1:0]              tlu_pstate2_mmodel;     // From tdp of tlu_tdp.v
wire [1:0]              tlu_pstate2_mmodel;     // From tdp of tlu_tdp.v
wire [1:0]              tlu_pstate3_mmodel;     // From tdp of tlu_tdp.v
wire [1:0]              tlu_pstate3_mmodel;     // From tdp of tlu_tdp.v
wire [`TLU_THRD_NUM-1:0] tlu_pstate_tle;                // From tdp of tlu_tdp.v
wire [`TLU_THRD_NUM-1:0] tlu_pstate_tle;                // From tdp of tlu_tdp.v
wire [`TLU_THRD_NUM-1:0] tlu_pstate_cle;                // From tdp of tlu_tdp.v
wire [`TLU_THRD_NUM-1:0] tlu_pstate_cle;                // From tdp of tlu_tdp.v
*/
*/
wire [4-1:0] tlu_pstate_am;              // From tdp of tlu_tdp.v
wire [`TLU_THRD_NUM-1:0] tlu_pstate_am;          // From tdp of tlu_tdp.v
wire [1:0]               tlu_pstate_din_sel0;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel0;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel1;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel1;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel2;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel2;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel3;    // From tcl of tlu_tcl.v
wire [1:0]               tlu_pstate_din_sel3;    // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_pstate_priv;    // From tdp of tlu_tdp.v
// wire [`TLU_THRD_NUM-1:0] tlu_pstate_priv;    // From tdp of tlu_tdp.v
Line 1212... Line 537...
wire                    tlu_select_tba_w2;      // From tcl of tlu_tcl.v
wire                    tlu_select_tba_w2;      // From tcl of tlu_tcl.v
wire                    tdp_select_tba_w2;      // From tcl of tlu_tcl.v
wire                    tdp_select_tba_w2;      // From tcl of tlu_tcl.v
// wire                 tlu_self_boot_rst_g;    // From tcl of tlu_tcl.v
// wire                 tlu_self_boot_rst_g;    // From tcl of tlu_tcl.v
// wire                 tlu_self_boot_rst_w2;   // From tcl of tlu_tcl.v
// wire                 tlu_self_boot_rst_w2;   // From tcl of tlu_tcl.v
wire                    tlu_set_sftint_l_g;     // From tcl of tlu_tcl.v
wire                    tlu_set_sftint_l_g;     // From tcl of tlu_tcl.v
wire [4-1:0] tlu_sftint_en_l_g;  // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_sftint_en_l_g;      // From tcl of tlu_tcl.v
wire [4-1:0] tlu_sftint_mx_sel;  // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_sftint_mx_sel;      // From tcl of tlu_tcl.v
wire [3:0]               tlu_sftint_id;          // From tdp of tlu_tdp.v
wire [3:0]               tlu_sftint_id;          // From tdp of tlu_tdp.v
// wire [3:0]           tlu_sftint_lvl14_int;   // From tcl of tlu_tcl.v
// wire [3:0]           tlu_sftint_lvl14_int;   // From tcl of tlu_tcl.v
wire [3:0]               tlu_sftint_penc_sel;    // From tcl of tlu_tcl.v
wire [3:0]               tlu_sftint_penc_sel;    // From tcl of tlu_tcl.v
wire [3:0]               tlu_slxa_thrd_sel;      // From mmu_ctl of tlu_mmu_ctl.v
wire [3:0]               tlu_slxa_thrd_sel;      // From mmu_ctl of tlu_mmu_ctl.v
wire [2:0]               tlu_tag_access_ctxt_sel_m;// From tcl of tlu_tcl.v
wire [2:0]               tlu_tag_access_ctxt_sel_m;// From tcl of tlu_tcl.v
//wire                  tlu_tag_access_nctxt_g; // From mmu_dp of tlu_mmu_dp.v
//wire                  tlu_tag_access_nctxt_g; // From mmu_dp of tlu_mmu_dp.v
wire [4-1:0] tlu_tba_en_l;               // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_tba_en_l;           // From tcl of tlu_tcl.v
wire [4-1:0] tlu_thrd_rsel_e;    // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_thrd_rsel_e;        // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_thrd_rsel_g;    // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_thrd_rsel_g;    // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_thrd_wsel_g;    // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_thrd_wsel_g;    // From tcl of tlu_tcl.v
wire [4-1:0] tlu_thrd_wsel_w2;   // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_thrd_wsel_w2;       // From tcl of tlu_tcl.v
wire [4-1:0] tlu_thread_wsel_g;  // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_thread_wsel_g;      // From tcl of tlu_tcl.v
wire [4-1:0] tlu_thread_inst_vld_g;      // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_thread_inst_vld_g;  // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_thread_inst_vld_w2;     // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_thread_inst_vld_w2;     // From tcl of tlu_tcl.v
wire                    tlu_tick_en_l;          // From tcl of tlu_tcl.v
wire                    tlu_tick_en_l;          // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_tick_int;               // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_tick_int;               // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_stick_int;              // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_stick_int;              // From tcl of tlu_tcl.v
// wire                 tlu_tick_match;         // From tdp of tlu_tdp.v
// wire                 tlu_tick_match;         // From tdp of tlu_tdp.v
wire                    tlu_tick_npt;           // From tcl of tlu_tcl.v
wire                    tlu_tick_npt;           // From tcl of tlu_tcl.v
wire [4-1:0] tlu_tickcmp_en_l;   // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_tickcmp_en_l;       // From tcl of tlu_tcl.v
// wire                 tlu_tickcmp_intdis;     // From tcl of tlu_tcl.v
// wire                 tlu_tickcmp_intdis;     // From tcl of tlu_tcl.v
wire [4-1:0] tlu_tickcmp_sel;    // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_tickcmp_sel;        // From tcl of tlu_tcl.v
// wire                 tlu_tl_gt_0_g;          // From tcl of tlu_tcl.v
// wire                 tlu_tl_gt_0_g;          // From tcl of tlu_tcl.v
wire                    tlu_tl_gt_0_w2;         // From tcl of tlu_tcl.v
wire                    tlu_tl_gt_0_w2;         // From tcl of tlu_tcl.v
wire [2:0]               tlu_trp_lvl;            // From tcl of tlu_tcl.v
wire [2:0]               tlu_trp_lvl;            // From tcl of tlu_tcl.v
wire [2:0]               tlu_tte_tag_g;          // From mmu_ctl of tlu_mmu_ctl.v
wire [2:0]               tlu_tte_tag_g;          // From mmu_ctl of tlu_mmu_ctl.v
wire [2:0]               tlu_tte_wr_pid_g;       // From mmu_ctl of tlu_mmu_ctl.v
wire [2:0]               tlu_tte_wr_pid_g;       // From mmu_ctl of tlu_mmu_ctl.v
// wire [`TLU_THRD_NUM-1:0] tlu_update_pc_l_m;  // From tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] tlu_update_pc_l_m;  // From tcl of tlu_tcl.v
wire [4-1:0] tlu_update_pc_l_w;  // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_update_pc_l_w;      // From tcl of tlu_tcl.v
wire [4-1:0] tlu_trap_cwp_en;    // From tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_trap_cwp_en;        // From tcl of tlu_tcl.v
wire tlu_cwp_no_change_m;       // From tcl of tlu_tcl.v
wire tlu_cwp_no_change_m;       // From tcl of tlu_tcl.v
// modified due to timing
// modified due to timing
// wire [3:0]           tlu_update_pstate_l_g;  // From tcl of tlu_tcl.v
// wire [3:0]           tlu_update_pstate_l_g;  // From tcl of tlu_tcl.v
wire [3:0]               tlu_update_pstate_l_w2; // From tcl of tlu_tcl.v
wire [3:0]               tlu_update_pstate_l_w2; // From tcl of tlu_tcl.v
wire                    tlu_wr_sftint_l_g;      // From tcl of tlu_tcl.v
wire                    tlu_wr_sftint_l_g;      // From tcl of tlu_tcl.v
Line 1263... Line 588...
wire                    tsa_rd_en;              // From tcl of tlu_tcl.v
wire                    tsa_rd_en;              // From tcl of tlu_tcl.v
// wire [`TLU_TSA_WIDTH-1:0]            tsa_rdata;              // From tsa of tlu_tsa.v
// wire [`TLU_TSA_WIDTH-1:0]            tsa_rdata;              // From tsa of tlu_tsa.v
wire                    tsa_tstate_en;          // From tcl of tlu_tcl.v
wire                    tsa_tstate_en;          // From tcl of tlu_tcl.v
wire                    tsa_htstate_en;         // From tlu_hyperv of tlu_hyperv.v
wire                    tsa_htstate_en;         // From tlu_hyperv of tlu_hyperv.v
wire                    tsa_ttype_en;           // From tcl of tlu_tcl.v
wire                    tsa_ttype_en;           // From tcl of tlu_tcl.v
wire [136-1:0]           tsa_wdata;              // From tdp of tlu_tdp.v
wire [`TLU_TSA_WIDTH-1:0]                tsa_wdata;              // From tdp of tlu_tdp.v
wire [1:0]               tsa_wr_tid;             // From tcl of tlu_tcl.v
wire [1:0]               tsa_wr_tid;             // From tcl of tlu_tcl.v
wire [2:0]               tsa_wr_tpl;             // From tcl of tlu_tcl.v
wire [2:0]               tsa_wr_tpl;             // From tcl of tlu_tcl.v
// modified due to tsa memory swap
// modified due to tsa memory swap
wire [1:0]               tsa_wr_vld;             // From tcl of tlu_tcl.v
wire [1:0]               tsa_wr_vld;             // From tcl of tlu_tcl.v
wire                    tlu_htstate_rw_d;  // From tlu_hyperv of tlu_hyperv.v
wire                    tlu_htstate_rw_d;  // From tlu_hyperv of tlu_hyperv.v
wire                    tlu_htstate_rw_g;  // From tlu_hyperv of tlu_hyperv.v
wire                    tlu_htstate_rw_g;  // From tlu_hyperv of tlu_hyperv.v
// modified due to rsr mux recode
// modified due to rsr mux recode
// wire                 tlu_htba_mx2_sel;  // From tlu_hyperv of tlu_hyperv.v
// wire                 tlu_htba_mx2_sel;  // From tlu_hyperv of tlu_hyperv.v
wire                    tlu_htickcmp_rw_e; // From tlu_hyperv of tlu_hyperv.v
wire                    tlu_htickcmp_rw_e; // From tlu_hyperv of tlu_hyperv.v
 
`ifdef SIMPLY_RISC_TWEAKS
 
wire tlu_restore_pc_sel_w1;
 
wire tlu_itag_acc_sel_g;
 
wire tlu_tlb_access_en_l_d1;
 
`endif
// End of automatics
// End of automatics
wire [8-1:0] tlu_asi_queue_rdata_g;
wire [`TLU_ASI_QUE_WIDTH-1:0] tlu_asi_queue_rdata_g;
wire tlu_asi_queue_rd_vld_g;
wire tlu_asi_queue_rd_vld_g;
wire tlu_ld_data_vld_g;
wire tlu_ld_data_vld_g;
wire tlu_va_ill_g;
wire tlu_va_ill_g;
// wire tlu_va_all_zero_g;      
// wire tlu_va_all_zero_g;      
//
//
// modified for timing fixes
// modified for timing fixes
// wire [3:0]           pib_priv_act_trap ;
// wire [3:0]           pib_priv_act_trap ;
wire [3:0]               pib_priv_act_trap_m ;
wire [3:0]               pib_priv_act_trap_m ;
// wire [`QUE_TRAP_SEL_WIDTH-1:0] tlu_que_trap_sel_m;
// wire [`QUE_TRAP_SEL_WIDTH-1:0] tlu_que_trap_sel_m;
wire [5:0] tlu_ctxt_cfg_w2;      // To mmu_ctl of tlu_mmu_ctl.v
wire [5:0] tlu_ctxt_cfg_w2;      // To mmu_ctl of tlu_mmu_ctl.v
wire [4-1:0] pib_picl_wrap;              // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] pib_picl_wrap;          // To tcl of tlu_tcl.v
wire [4-1:0] pib_pich_wrap;              // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] pib_pich_wrap;          // To tcl of tlu_tcl.v
wire [4-1:0] pich_wrap_flg;              // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] pich_wrap_flg;          // To tcl of tlu_tcl.v
wire [4-1:0] pich_onebelow_flg;          // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] pich_onebelow_flg;              // To tcl of tlu_tcl.v
wire [4-1:0] pich_twobelow_flg;          // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] pich_twobelow_flg;              // To tcl of tlu_tcl.v
wire tlu_pic_onebelow_e;                // To tcl of tlu_tcl.v
wire tlu_pic_onebelow_e;                // To tcl of tlu_tcl.v
wire tlu_pic_twobelow_e;                // To tcl of tlu_tcl.v
wire tlu_pic_twobelow_e;                // To tcl of tlu_tcl.v
wire tlu_pic_wrap_e;            // To tcl of tlu_tcl.v
wire tlu_pic_wrap_e;            // To tcl of tlu_tcl.v
//
//
// modified for bug 5436: Niagara 2.0
// modified for bug 5436: Niagara 2.0
wire [4-1:0] tlu_pcr_ut;         // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_pcr_ut;             // To tcl of tlu_tcl.v
wire [4-1:0] tlu_pcr_st;         // To tcl of tlu_tcl.v
wire [`TLU_THRD_NUM-1:0] tlu_pcr_st;             // To tcl of tlu_tcl.v
// wire tlu_pcr_ut_e;           // To tcl of tlu_tcl.v
// wire tlu_pcr_ut_e;           // To tcl of tlu_tcl.v
// wire tlu_pcr_st_e;           // To tcl of tlu_tcl.v
// wire tlu_pcr_st_e;           // To tcl of tlu_tcl.v
wire tlu_pic_cnt_en_m;          // To tcl of tlu_tcl.v
wire tlu_pic_cnt_en_m;          // To tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] pich_threebelow_flg;        // To tcl of tlu_tcl.v
// wire [`TLU_THRD_NUM-1:0] pich_threebelow_flg;        // To tcl of tlu_tcl.v
//
//
// added for hypervisor support
// added for hypervisor support
wire [2-1:0] tlu_dnrtry_global_g;
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_dnrtry_global_g;
// wire tlu_htick_match;
// wire tlu_htick_match;
// wire tlu_stick_match;
// wire tlu_stick_match;
wire tlu_trap_hpstate_enb;
wire tlu_trap_hpstate_enb;
wire [4-1:0] local_hpstate_priv;
wire [`TLU_THRD_NUM-1:0] local_hpstate_priv;
wire [4-1:0] tcl_hpstate_priv;
wire [`TLU_THRD_NUM-1:0] tcl_hpstate_priv;
wire [4-1:0] local_hpstate_enb;
wire [`TLU_THRD_NUM-1:0] local_hpstate_enb;
wire [4-1:0] tcl_hpstate_enb;
wire [`TLU_THRD_NUM-1:0] tcl_hpstate_enb;
wire [4-1:0] local_pstate_priv;
wire [`TLU_THRD_NUM-1:0] local_pstate_priv;
wire [4-1:0] local_pstate_ie;
wire [`TLU_THRD_NUM-1:0] local_pstate_ie;
 
 
wire [2-1:0] tlu_gl_lvl0;
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl0;
wire [2-1:0] tlu_gl_lvl1;
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl1;
wire [2-1:0] tlu_gl_lvl2;
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl2;
wire [2-1:0] tlu_gl_lvl3;
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl3;
// wire [`TLU_THRD_NUM-1:0] tlu_hintp_en_l_g;
// wire [`TLU_THRD_NUM-1:0] tlu_hintp_en_l_g;
wire [4-1:0] tlu_htba_en_l;
wire [`TLU_THRD_NUM-1:0] tlu_htba_en_l;
wire [4-1:0] tlu_htickcmp_en_l;
wire [`TLU_THRD_NUM-1:0] tlu_htickcmp_en_l;
// wire [`TLU_THRD_NUM-1:0] tlu_set_hintp_g;
// wire [`TLU_THRD_NUM-1:0] tlu_set_hintp_g;
wire [4-1:0] tlu_set_hintp_sel_g;
wire [`TLU_THRD_NUM-1:0] tlu_set_hintp_sel_g;
wire [4-1:0] tlu_stickcmp_en_l;
wire [`TLU_THRD_NUM-1:0] tlu_stickcmp_en_l;
// modified for timing 
// modified for timing 
// wire [`TLU_THRD_NUM-1:0] tlu_update_hpstate_l_g;
// wire [`TLU_THRD_NUM-1:0] tlu_update_hpstate_l_g;
wire [4-1:0] tlu_update_hpstate_l_w2;
wire [`TLU_THRD_NUM-1:0] tlu_update_hpstate_l_w2;
wire [4-1:0] tlu_wr_hintp_g;
wire [`TLU_THRD_NUM-1:0] tlu_wr_hintp_g;
wire [4-1:0] tlu_cpu_mondo_cmp;
wire [`TLU_THRD_NUM-1:0] tlu_cpu_mondo_cmp;
wire [4-1:0] tlu_dev_mondo_cmp;
wire [`TLU_THRD_NUM-1:0] tlu_dev_mondo_cmp;
wire [4-1:0] tlu_resum_err_cmp;
wire [`TLU_THRD_NUM-1:0] tlu_resum_err_cmp;
wire [4-1:0] tlu_hintp;
wire [`TLU_THRD_NUM-1:0] tlu_hintp;
wire [1:0] tlu_hpstate_din_sel0;
wire [1:0] tlu_hpstate_din_sel0;
wire [1:0] tlu_hpstate_din_sel1;
wire [1:0] tlu_hpstate_din_sel1;
wire [1:0] tlu_hpstate_din_sel2;
wire [1:0] tlu_hpstate_din_sel2;
wire [1:0] tlu_hpstate_din_sel3;
wire [1:0] tlu_hpstate_din_sel3;
wire [4:0] tlu_hyperv_rdpr_sel;
wire [4:0] tlu_hyperv_rdpr_sel;
Line 1354... Line 684...
wire [2:0] tlu_pc_mxsel_w2;
wire [2:0] tlu_pc_mxsel_w2;
// wire       tlu_stickcmp_intdis;
// wire       tlu_stickcmp_intdis;
wire       tlu_htickcmp_intdis;
wire       tlu_htickcmp_intdis;
// wire       tlu_gl_rw_g;      
// wire       tlu_gl_rw_g;      
wire       tlu_gl_rw_m;
wire       tlu_gl_rw_m;
wire [4-1:0] tlu_por_rstint_g;
wire [`TLU_THRD_NUM-1:0] tlu_por_rstint_g;
// modified due to timing
// modified due to timing
// wire tlu_thrd0_traps, tlu_thrd1_traps;
// wire tlu_thrd0_traps, tlu_thrd1_traps;
// wire tlu_thrd2_traps, tlu_thrd3_traps;
// wire tlu_thrd2_traps, tlu_thrd3_traps;
wire [4-1:0] tlu_thrd_traps_w2;
wire [`TLU_THRD_NUM-1:0] tlu_thrd_traps_w2;
wire tlu_dnrtry0_inst_g, tlu_dnrtry1_inst_g;
wire tlu_dnrtry0_inst_g, tlu_dnrtry1_inst_g;
wire tlu_dnrtry2_inst_g, tlu_dnrtry3_inst_g;
wire tlu_dnrtry2_inst_g, tlu_dnrtry3_inst_g;
wire tlu_scpd_rd_vld_m; // tlu_scpd_rd_vld_g; 
wire tlu_scpd_rd_vld_m; // tlu_scpd_rd_vld_g; 
wire tlu_scpd_wr_vld_g;
wire tlu_scpd_wr_vld_g;
wire tlu_hscpd_dacc_excpt_m;
wire tlu_hscpd_dacc_excpt_m;
wire tlu_qtail_dacc_excpt_m;
wire tlu_qtail_dacc_excpt_m;
wire [5-1:0]  tlu_scpd_rd_addr_m;
wire [`SCPD_RW_ADDR_WIDTH-1:0]  tlu_scpd_rd_addr_m;
wire [5-1:0]  tlu_scpd_wr_addr_g;
wire [`SCPD_RW_ADDR_WIDTH-1:0]  tlu_scpd_wr_addr_g;
wire [79:0] tlu_scpd_asi_rdata_g;
wire [79:0] tlu_scpd_asi_rdata_g;
//
//
// added for the change of hierarchy to promote sparc_tlu_intdp and 
// added for the change of hierarchy to promote sparc_tlu_intdp and 
// sparc_tlu_intctl onto the tlu level
// sparc_tlu_intctl onto the tlu level
// wire                 inc_ind_asi_inrr;       // From intctl of sparc_tlu_intctl.v
// wire                 inc_ind_asi_inrr;       // From intctl of sparc_tlu_intctl.v
Line 1464... Line 794...
                       .tlu_int_redmode (tlu_int_redmode[3:0]),
                       .tlu_int_redmode (tlu_int_redmode[3:0]),
                       .tlu_int_sftint_pend(tlu_int_sftint_pend[3:0]),
                       .tlu_int_sftint_pend(tlu_int_sftint_pend[3:0]),
                       .tlu_int_tid_m   (tlu_int_tid_m[1:0]));
                       .tlu_int_tid_m   (tlu_int_tid_m[1:0]));
*/
*/
sparc_tlu_intdp  intdp(
sparc_tlu_intdp  intdp(
                          .lsu_ind_intpkt_id(lsu_tlu_intpkt[5:0]),
                          .lsu_ind_intpkt_id(lsu_tlu_intpkt[`INT_VEC_HI:`INT_VEC_LO]),
                          .lsu_ind_intpkt_type(lsu_tlu_intpkt[17:16]),
                          .lsu_ind_intpkt_type(lsu_tlu_intpkt[`INT_TYPE_HI:`INT_TYPE_LO]),
                          .lsu_ind_intpkt_thr(lsu_tlu_intpkt[12:8]),
                          .lsu_ind_intpkt_thr(lsu_tlu_intpkt[`INT_THR_HI:`INT_THR_LO]),
                          .so           (scan1_1),
                          .so           (scan1_1),
                          .si           (si1),
                          .si           (si1),
              /*AUTOINST*/
              /*AUTOINST*/
                          // Outputs
                          // Outputs
                          .int_pending_i2_l(int_pending_i2_l[3:0]),
                          .int_pending_i2_l(int_pending_i2_l[3:0]),
Line 1483... Line 813...
                          .rclk         (rclk),
                          .rclk         (rclk),
                          .se           (se),
                          .se           (se),
                          .tlu_rst_l(int_rst_l),
                          .tlu_rst_l(int_rst_l),
                          .lsu_tlu_st_rs3_data_g(lsu_tlu_rs3_data_g[63:0]),
                          .lsu_tlu_st_rs3_data_g(lsu_tlu_rs3_data_g[63:0]),
                          .tlu_asi_rdata_mxsel_g(tlu_asi_rdata_mxsel_g[3:0]),
                          .tlu_asi_rdata_mxsel_g(tlu_asi_rdata_mxsel_g[3:0]),
              .tlu_scpd_asi_rdata_g(tlu_scpd_asi_rdata_g[64-1:0]),
              .tlu_scpd_asi_rdata_g(tlu_scpd_asi_rdata_g[`TLU_SCPD_DATA_WIDTH-1:0]),
              .tlu_asi_queue_rdata_g(tlu_asi_queue_rdata_g[8-1:0]),
              .tlu_asi_queue_rdata_g(tlu_asi_queue_rdata_g[`TLU_ASI_QUE_WIDTH-1:0]),
                          .inc_ind_ld_int_i1(inc_ind_ld_int_i1[3:0]),
                          .inc_ind_ld_int_i1(inc_ind_ld_int_i1[3:0]),
                          .inc_ind_rstthr_i1(inc_ind_rstthr_i1[3:0]),
                          .inc_ind_rstthr_i1(inc_ind_rstthr_i1[3:0]),
                          .inc_ind_asi_thr(tlu_local_thrid_g[4-1:0]),
                          .inc_ind_asi_thr(tlu_local_thrid_g[`TLU_THRD_NUM-1:0]),
                          .inc_ind_asi_wr_indr(inc_ind_asi_wr_indr[3:0]),
                          .inc_ind_asi_wr_indr(inc_ind_asi_wr_indr[3:0]),
                          .inc_ind_indr_grant(inc_ind_indr_grant[3:0]),
                          .inc_ind_indr_grant(inc_ind_indr_grant[3:0]),
                          .inc_ind_thr_m(inc_ind_thr_m[3:0]),
                          .inc_ind_thr_m(inc_ind_thr_m[3:0]),
                          .inc_ind_asi_wr_inrr(inc_ind_asi_wr_inrr[3:0]),
                          .inc_ind_asi_wr_inrr(inc_ind_asi_wr_inrr[3:0]),
                          .inc_ind_asi_rd_invr(inc_ind_asi_rd_invr[3:0]),
                          .inc_ind_asi_rd_invr(inc_ind_asi_rd_invr[3:0]),
Line 1547... Line 877...
 
 
tlu_misctl misctl (
tlu_misctl misctl (
         // output
         // output
         .tlu_exu_pic_onebelow_m  (tlu_exu_pic_onebelow_m),
         .tlu_exu_pic_onebelow_m  (tlu_exu_pic_onebelow_m),
         .tlu_exu_pic_twobelow_m  (tlu_exu_pic_twobelow_m),
         .tlu_exu_pic_twobelow_m  (tlu_exu_pic_twobelow_m),
             .tlu_exu_cwp_m               (tlu_exu_cwp_m[3-1:0]),
             .tlu_exu_cwp_m               (tlu_exu_cwp_m[`TSA_CWP_WIDTH-1:0]),
             .tlu_exu_ccr_m               (tlu_exu_ccr_m[8-1:0]),
             .tlu_exu_ccr_m               (tlu_exu_ccr_m[`TSA_CCR_WIDTH-1:0]),
             .tlu_lsu_asi_m               (tlu_lsu_asi_m[8-1:0]),
             .tlu_lsu_asi_m               (tlu_lsu_asi_m[`TLU_ASI_STATE_WIDTH-1:0]),
         .tlu_cwp_no_change_m (tlu_cwp_no_change_m),
         .tlu_cwp_no_change_m (tlu_cwp_no_change_m),
         .tlu_sscan_misctl_data  (tlu_sscan_test_data[59:51]),
         .tlu_sscan_misctl_data  (tlu_sscan_test_data[`MISCTL_SSCAN_HI:`MISCTL_SSCAN_LO]),
         .tlu_ifu_trappc_w2     (tlu_ifu_trappc_w2[48:0]),
         .tlu_ifu_trappc_w2     (tlu_ifu_trappc_w2[48:0]),
         .tlu_ifu_trapnpc_w2    (tlu_ifu_trapnpc_w2[48:0]),
         .tlu_ifu_trapnpc_w2    (tlu_ifu_trapnpc_w2[48:0]),
         .tlu_pc_new_w          (tlu_pc_new_w[48:0]),
         .tlu_pc_new_w          (tlu_pc_new_w[48:0]),
         .tlu_npc_new_w         (tlu_npc_new_w[48:0]),
         .tlu_npc_new_w         (tlu_npc_new_w[48:0]),
         .so (short_so0),
         .so (short_so0),
         // inputs
         // inputs
             .ctu_sscan_tid      (ctu_sscan_tid[4-1:0]),
             .ctu_sscan_tid      (ctu_sscan_tid[`TLU_THRD_NUM-1:0]),
             .ifu_tlu_pc_m               (ifu_tlu_pc_m[48:0]),
             .ifu_tlu_pc_m               (ifu_tlu_pc_m[48:0]),
             // .ifu_tlu_npc_m           (ifu_tlu_npc_m[48:0]),
             // .ifu_tlu_npc_m           (ifu_tlu_npc_m[48:0]),
             .ifu_npc_w              (ifu_npc_w[48:0]),
             .ifu_npc_w              (ifu_npc_w[48:0]),
             .exu_tlu_cwp0               (exu_tlu_cwp0[3-1:0]),
             .exu_tlu_cwp0               (exu_tlu_cwp0[`TSA_CWP_WIDTH-1:0]),
             .exu_tlu_cwp1               (exu_tlu_cwp1[3-1:0]),
             .exu_tlu_cwp1               (exu_tlu_cwp1[`TSA_CWP_WIDTH-1:0]),
             .exu_tlu_cwp2               (exu_tlu_cwp2[3-1:0]),
             .exu_tlu_cwp2               (exu_tlu_cwp2[`TSA_CWP_WIDTH-1:0]),
             .exu_tlu_cwp3               (exu_tlu_cwp3[3-1:0]),
             .exu_tlu_cwp3               (exu_tlu_cwp3[`TSA_CWP_WIDTH-1:0]),
             .tlu_partial_trap_pc_w1 (tlu_partial_trap_pc_w1[33:0]),
             .tlu_partial_trap_pc_w1 (tlu_partial_trap_pc_w1[33:0]),
         .tlu_restore_pc_w1      (tlu_restore_pc_w1[48:0]),
         .tlu_restore_pc_w1      (tlu_restore_pc_w1[48:0]),
         .tlu_restore_npc_w1     (tlu_restore_npc_w1[48:0]),
         .tlu_restore_npc_w1     (tlu_restore_npc_w1[48:0]),
             .tlu_final_ttype_w2     (tlu_final_ttype_w2[9-1:0]),
             .tlu_final_ttype_w2     (tlu_final_ttype_w2[`TSA_TTYPE_WIDTH-1:0]),
             .tlu_final_offset_w1    (tlu_final_offset_w1[9-1:0]),
             .tlu_final_offset_w1    (tlu_final_offset_w1[`TSA_TTYPE_WIDTH-1:0]),
             .tlu_restore_pc_sel_w1      (tlu_restore_pc_sel_w1),
             .tlu_restore_pc_sel_w1      (tlu_restore_pc_sel_w1),
             // .tlu_retry_inst_m            (tlu_retry_inst_m),
             // .tlu_retry_inst_m            (tlu_retry_inst_m),
             // .tlu_done_inst_m             (tlu_done_inst_m),
             // .tlu_done_inst_m             (tlu_done_inst_m),
             // .tlu_dnrtry_inst_m_l    (tlu_dnrtry_inst_m_l),
             // .tlu_dnrtry_inst_m_l    (tlu_dnrtry_inst_m_l),
             .tlu_true_pc_sel_w   (tlu_true_pc_sel_w[2:0]),
             .tlu_true_pc_sel_w   (tlu_true_pc_sel_w[2:0]),
             .tsa_wr_tid   (tsa_wr_tid[1:0]),
             .tsa_wr_tid   (tsa_wr_tid[1:0]),
             .tsa1_wr_vld  (tsa_wr_vld[1]),
             .tsa1_wr_vld  (tsa_wr_vld[1]),
             .tsa_ttype_en (tsa_ttype_en),
             .tsa_ttype_en (tsa_ttype_en),
             .tsa_rd_vld_e (tsa_rd_vld_e),
             .tsa_rd_vld_e (tsa_rd_vld_e),
             // .tsa_rd_vld   (tsa_rd_vld),
             // .tsa_rd_vld   (tsa_rd_vld),
             .tsa0_rdata_cwp     (tsa0_dout[2:0]),
             .tsa0_rdata_cwp     (tsa0_dout[`TSA0_MEM_CWP_HI:`TSA0_MEM_CWP_LO]),
             .tsa0_rdata_pstate  (tsa0_dout[10:3]),
             .tsa0_rdata_pstate  (tsa0_dout[`TSA0_MEM_PSTATE_HI:`TSA0_MEM_PSTATE_LO]),
             .tsa0_rdata_asi     (tsa0_dout[18:11]),
             .tsa0_rdata_asi     (tsa0_dout[`TSA0_MEM_ASI_HI:`TSA0_MEM_ASI_LO]),
             .tsa0_rdata_ccr     (tsa0_dout[26:19]),
             .tsa0_rdata_ccr     (tsa0_dout[`TSA0_MEM_CCR_HI:`TSA0_MEM_CCR_LO]),
             .tsa0_rdata_gl              (tsa0_dout[28:27]),
             .tsa0_rdata_gl              (tsa0_dout[`TSA0_MEM_GL_HI:`TSA0_MEM_GL_LO]),
             .tsa0_rdata_pc              (tsa0_dout[78:32]),
             .tsa0_rdata_pc              (tsa0_dout[`TSA0_TPC_HI:`TSA0_TPC_LO]),
             .tsa1_rdata_ttype   (tsa1_dout[8:0]),
             .tsa1_rdata_ttype   (tsa1_dout[`TSA1_TTYPE_HI:`TSA1_TTYPE_LO]),
             .tsa1_rdata_npc     (tsa1_dout[58:12]),
             .tsa1_rdata_npc     (tsa1_dout[`TSA1_TNPC_HI:`TSA1_TNPC_LO]),
             .tsa1_rdata_htstate (tsa1_dout[63:60]),
             .tsa1_rdata_htstate (tsa1_dout[`TSA1_HTSTATE_HI:`TSA1_HTSTATE_LO]),
             .tlu_thrd_rsel_e    (tlu_thrd_rsel_e[4-1:0]),
             .tlu_thrd_rsel_e    (tlu_thrd_rsel_e[`TLU_THRD_NUM-1:0]),
         // experiement
         // experiement
         .tlu_pic_onebelow_e (tlu_pic_onebelow_e),
         .tlu_pic_onebelow_e (tlu_pic_onebelow_e),
         .tlu_pic_twobelow_e (tlu_pic_twobelow_e),
         .tlu_pic_twobelow_e (tlu_pic_twobelow_e),
         .tlu_pic_cnt_en_m   (tlu_pic_cnt_en_m),
         .tlu_pic_cnt_en_m   (tlu_pic_cnt_en_m),
         // .pich_onebelow_flg (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
         // .pich_onebelow_flg (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
Line 1608... Line 938...
             .rclk      (rclk));
             .rclk      (rclk));
 
 
tlu_tcl tcl (
tlu_tcl tcl (
         .so (short_so1),
         .so (short_so1),
         .si (short_si1),
         .si (short_si1),
             .tlu_wsr_data_b63_w        (tlu_wsr_data_w[64-1]),
             .tlu_wsr_data_b63_w        (tlu_wsr_data_w[`TLU_ASR_DATA_WIDTH-1]),
         .tlu_itag_acc_sel_g (tlu_itag_acc_sel_g),
         .tlu_itag_acc_sel_g (tlu_itag_acc_sel_g),
         .pib_priv_act_trap_m   (pib_priv_act_trap_m[3:0]),
         .pib_priv_act_trap_m   (pib_priv_act_trap_m[3:0]),
         .spu_tlu_rsrv_illgl_m  (spu_tlu_rsrv_illgl_m),
         .spu_tlu_rsrv_illgl_m  (spu_tlu_rsrv_illgl_m),
         .tlu_cpu_mondo_cmp (tlu_cpu_mondo_cmp[4-1:0]),
         .tlu_cpu_mondo_cmp (tlu_cpu_mondo_cmp[`TLU_THRD_NUM-1:0]),
         .tlu_dev_mondo_cmp (tlu_dev_mondo_cmp[4-1:0]),
         .tlu_dev_mondo_cmp (tlu_dev_mondo_cmp[`TLU_THRD_NUM-1:0]),
         .tlu_resum_err_cmp (tlu_resum_err_cmp[4-1:0]),
         .tlu_resum_err_cmp (tlu_resum_err_cmp[`TLU_THRD_NUM-1:0]),
         .tlu_hintp         (tlu_hintp),
         .tlu_hintp         (tlu_hintp),
         .pich_wrap_flg     (pich_wrap_flg[4-1:0]),
         .pich_wrap_flg     (pich_wrap_flg[`TLU_THRD_NUM-1:0]),
         .pich_onebelow_flg (pich_onebelow_flg[4-1:0]),
         .pich_onebelow_flg (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
         .pich_twobelow_flg (pich_twobelow_flg[4-1:0]),
         .pich_twobelow_flg (pich_twobelow_flg[`TLU_THRD_NUM-1:0]),
          // modified for bug 5436: Niagara 2.0
          // modified for bug 5436: Niagara 2.0
             .tlu_pcr_ut            (tlu_pcr_ut[4-1:0]),
             .tlu_pcr_ut            (tlu_pcr_ut[`TLU_THRD_NUM-1:0]),
             .tlu_pcr_st            (tlu_pcr_st[4-1:0]),
             .tlu_pcr_st            (tlu_pcr_st[`TLU_THRD_NUM-1:0]),
             // .tlu_pcr_ut_e       (tlu_pcr_ut_e),
             // .tlu_pcr_ut_e       (tlu_pcr_ut_e),
             // .tlu_pcr_st_e       (tlu_pcr_st_e),
             // .tlu_pcr_st_e       (tlu_pcr_st_e),
         .tlu_pic_cnt_en_m  (tlu_pic_cnt_en_m),
         .tlu_pic_cnt_en_m  (tlu_pic_cnt_en_m),
         .tlu_pic_wrap_e    (tlu_pic_wrap_e),
         .tlu_pic_wrap_e    (tlu_pic_wrap_e),
         // .pich_threebelow_flg (pich_threebelow_flg[`TLU_THRD_NUM-1:0]),
         // .pich_threebelow_flg (pich_threebelow_flg[`TLU_THRD_NUM-1:0]),
         .pib_picl_wrap (pib_picl_wrap[4-1:0]),
         .pib_picl_wrap (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
             .tlu_local_flush_w (tlu_local_flush_w),
             .tlu_local_flush_w (tlu_local_flush_w),
             .tlu_restore_pc_sel_w1     (tlu_restore_pc_sel_w1),
             .tlu_restore_pc_sel_w1     (tlu_restore_pc_sel_w1),
             .tlu_final_offset_w1 (tlu_final_offset_w1[9-1:0]),
             .tlu_final_offset_w1 (tlu_final_offset_w1[`TSA_TTYPE_WIDTH-1:0]),
             // Outputs
             // Outputs
         .pib_pich_wrap (pib_pich_wrap[4-1:0]),
         .pib_pich_wrap (pib_pich_wrap[`TLU_THRD_NUM-1:0]),
         .tlu_ibrkpt_trap_w2     (tlu_ibrkpt_trap_w2),
         .tlu_ibrkpt_trap_w2     (tlu_ibrkpt_trap_w2),
             .tlu_early_flush_pipe_w    (tlu_early_flush_pipe_w),
             .tlu_early_flush_pipe_w    (tlu_early_flush_pipe_w),
             .tlu_early_flush_pipe2_w   (tlu_early_flush_pipe2_w),
             .tlu_early_flush_pipe2_w   (tlu_early_flush_pipe2_w),
             .tlu_exu_early_flush_pipe_w        (tlu_exu_early_flush_pipe_w),
             .tlu_exu_early_flush_pipe_w        (tlu_exu_early_flush_pipe_w),
             .tlu_ifu_trappc_vld_w1     (tlu_ifu_trappc_vld_w1),
             .tlu_ifu_trappc_vld_w1     (tlu_ifu_trappc_vld_w1),
Line 1669... Line 999...
             // .tlu_retry_inst_m               (tlu_retry_inst_m),
             // .tlu_retry_inst_m               (tlu_retry_inst_m),
             // .tlu_done_inst_m                (tlu_done_inst_m),
             // .tlu_done_inst_m                (tlu_done_inst_m),
             // .tlu_dnrtry_inst_m_l            (tlu_dnrtry_inst_m_l),
             // .tlu_dnrtry_inst_m_l            (tlu_dnrtry_inst_m_l),
             .tlu_true_pc_sel_w   (tlu_true_pc_sel_w[2:0]),
             .tlu_true_pc_sel_w   (tlu_true_pc_sel_w[2:0]),
             .tlu_tick_en_l             (tlu_tick_en_l),
             .tlu_tick_en_l             (tlu_tick_en_l),
             .tlu_tickcmp_en_l          (tlu_tickcmp_en_l[4-1:0]),
             .tlu_tickcmp_en_l          (tlu_tickcmp_en_l[`TLU_THRD_NUM-1:0]),
             .tlu_tba_en_l              (tlu_tba_en_l[4-1:0]),
             .tlu_tba_en_l              (tlu_tba_en_l[`TLU_THRD_NUM-1:0]),
             .tlu_thrd_wsel_w2          (tlu_thrd_wsel_w2[4-1:0]),
             .tlu_thrd_wsel_w2          (tlu_thrd_wsel_w2[`TLU_THRD_NUM-1:0]),
             .tlu_thread_wsel_g         (tlu_thread_wsel_g[4-1:0]),
             .tlu_thread_wsel_g         (tlu_thread_wsel_g[`TLU_THRD_NUM-1:0]),
             .tlu_final_ttype_w2                (tlu_final_ttype_w2[9-1:0]),
             .tlu_final_ttype_w2                (tlu_final_ttype_w2[`TSA_TTYPE_WIDTH-1:0]),
             .tlu_thread_inst_vld_g     (tlu_thread_inst_vld_g[4-1:0]),
             .tlu_thread_inst_vld_g     (tlu_thread_inst_vld_g[`TLU_THRD_NUM-1:0]),
             // .tlu_thread_inst_vld_w2 (tlu_thread_inst_vld_w2[`TLU_THRD_NUM-1:0]),
             // .tlu_thread_inst_vld_w2 (tlu_thread_inst_vld_w2[`TLU_THRD_NUM-1:0]),
             .tlu_update_pc_l_w         (tlu_update_pc_l_w[4-1:0]),
             .tlu_update_pc_l_w         (tlu_update_pc_l_w[`TLU_THRD_NUM-1:0]),
             .tlu_select_redmode        (tlu_select_redmode),
             .tlu_select_redmode        (tlu_select_redmode),
             .tlu_pstate_din_sel0       (tlu_pstate_din_sel0[1:0]),
             .tlu_pstate_din_sel0       (tlu_pstate_din_sel0[1:0]),
             .tlu_pstate_din_sel1       (tlu_pstate_din_sel1[1:0]),
             .tlu_pstate_din_sel1       (tlu_pstate_din_sel1[1:0]),
             .tlu_pstate_din_sel2       (tlu_pstate_din_sel2[1:0]),
             .tlu_pstate_din_sel2       (tlu_pstate_din_sel2[1:0]),
             .tlu_pstate_din_sel3       (tlu_pstate_din_sel3[1:0]),
             .tlu_pstate_din_sel3       (tlu_pstate_din_sel3[1:0]),
Line 1696... Line 1026...
             .tlu_select_tba_w2         (tlu_select_tba_w2),
             .tlu_select_tba_w2         (tlu_select_tba_w2),
             .tdp_select_tba_w2         (tdp_select_tba_w2),
             .tdp_select_tba_w2         (tdp_select_tba_w2),
             .tlu_set_sftint_l_g        (tlu_set_sftint_l_g),
             .tlu_set_sftint_l_g        (tlu_set_sftint_l_g),
             .tlu_clr_sftint_l_g        (tlu_clr_sftint_l_g),
             .tlu_clr_sftint_l_g        (tlu_clr_sftint_l_g),
             .tlu_wr_sftint_l_g         (tlu_wr_sftint_l_g),
             .tlu_wr_sftint_l_g         (tlu_wr_sftint_l_g),
             .tlu_sftint_en_l_g         (tlu_sftint_en_l_g[4-1:0]),
             .tlu_sftint_en_l_g         (tlu_sftint_en_l_g[`TLU_THRD_NUM-1:0]),
             .tlu_sftint_mx_sel         (tlu_sftint_mx_sel[4-1:0]),
             .tlu_sftint_mx_sel         (tlu_sftint_mx_sel[`TLU_THRD_NUM-1:0]),
             .tlu_sftint_penc_sel       (tlu_sftint_penc_sel[4-1:0]),
             .tlu_sftint_penc_sel       (tlu_sftint_penc_sel[`TLU_THRD_NUM-1:0]),
             .tlu_sftint_vld            (tlu_sftint_vld[4-1:0]),
             .tlu_sftint_vld            (tlu_sftint_vld[`TLU_THRD_NUM-1:0]),
             .tlu_hintp_vld                 (tlu_hintp_vld[4-1:0]),
             .tlu_hintp_vld                 (tlu_hintp_vld[`TLU_THRD_NUM-1:0]),
             .tlu_rerr_vld                  (tlu_rerr_vld[4-1:0]),
             .tlu_rerr_vld                  (tlu_rerr_vld[`TLU_THRD_NUM-1:0]),
             .tlu_int_tid_m                 (tlu_int_tid_m[1:0]),
             .tlu_int_tid_m                 (tlu_int_tid_m[1:0]),
             .tlu_incr_tick                 (tlu_incr_tick[1:0]),
             .tlu_incr_tick                 (tlu_incr_tick[1:0]),
             .tlu_tckctr_in                 (tlu_tckctr_in[1:0]),
             .tlu_tckctr_in                 (tlu_tckctr_in[1:0]),
             .tlu_tickcmp_sel           (tlu_tickcmp_sel[4-1:0]),
             .tlu_tickcmp_sel           (tlu_tickcmp_sel[`TLU_THRD_NUM-1:0]),
             .immu_sfsr_trp_wr          (immu_sfsr_trp_wr[3:0]),
             .immu_sfsr_trp_wr          (immu_sfsr_trp_wr[3:0]),
             .tlu_isfsr_din_g           (tlu_isfsr_din_g[23:0]),
             .tlu_isfsr_din_g           (tlu_isfsr_din_g[23:0]),
             .tlu_tick_npt                  (tlu_tick_npt),
             .tlu_tick_npt                  (tlu_tick_npt),
             .tlu_thrd_rsel_e           (tlu_thrd_rsel_e[3:0]),
             .tlu_thrd_rsel_e           (tlu_thrd_rsel_e[3:0]),
             .tlu_inst_vld_nq_m         (tlu_inst_vld_nq_m),
             .tlu_inst_vld_nq_m         (tlu_inst_vld_nq_m),
Line 1723... Line 1053...
             .tlu_rdpr_mx6_sel          (tlu_rdpr_mx6_sel[2:0]),
             .tlu_rdpr_mx6_sel          (tlu_rdpr_mx6_sel[2:0]),
             .tlu_rdpr_mx7_sel          (tlu_rdpr_mx7_sel[3:0]),
             .tlu_rdpr_mx7_sel          (tlu_rdpr_mx7_sel[3:0]),
             .tlu_lsu_redmode_rst_d1 (tlu_lsu_redmode_rst_d1[3:0]),
             .tlu_lsu_redmode_rst_d1 (tlu_lsu_redmode_rst_d1[3:0]),
             .lsu_tlu_rsr_data_mod_e    (lsu_tlu_rsr_data_mod_e[7:0]),
             .lsu_tlu_rsr_data_mod_e    (lsu_tlu_rsr_data_mod_e[7:0]),
             .tlu_addr_msk_g            (tlu_addr_msk_g),
             .tlu_addr_msk_g            (tlu_addr_msk_g),
         .tlu_stickcmp_en_l (tlu_stickcmp_en_l[4-1:0]),
         .tlu_stickcmp_en_l (tlu_stickcmp_en_l[`TLU_THRD_NUM-1:0]),
         .tlu_htickcmp_en_l (tlu_htickcmp_en_l[4-1:0]),
         .tlu_htickcmp_en_l (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
         .tlu_htstate_rw_d (tlu_htstate_rw_d),
         .tlu_htstate_rw_d (tlu_htstate_rw_d),
         .tlu_htstate_rw_g (tlu_htstate_rw_g),
         .tlu_htstate_rw_g (tlu_htstate_rw_g),
         .tlu_dnrtry0_inst_g (tlu_dnrtry0_inst_g),
         .tlu_dnrtry0_inst_g (tlu_dnrtry0_inst_g),
         .tlu_dnrtry1_inst_g (tlu_dnrtry1_inst_g),
         .tlu_dnrtry1_inst_g (tlu_dnrtry1_inst_g),
         .tlu_dnrtry2_inst_g (tlu_dnrtry2_inst_g),
         .tlu_dnrtry2_inst_g (tlu_dnrtry2_inst_g),
         .tlu_dnrtry3_inst_g (tlu_dnrtry3_inst_g),
         .tlu_dnrtry3_inst_g (tlu_dnrtry3_inst_g),
         .tlu_thrd_traps_w2 (tlu_thrd_traps_w2[4-1:0]),
         .tlu_thrd_traps_w2 (tlu_thrd_traps_w2[`TLU_THRD_NUM-1:0]),
         .tlu_tick_ctl_din (tlu_tick_ctl_din),
         .tlu_tick_ctl_din (tlu_tick_ctl_din),
         .tlu_por_rstint_g (tlu_por_rstint_g[4-1:0]),
         .tlu_por_rstint_g (tlu_por_rstint_g[`TLU_THRD_NUM-1:0]),
         .tlu_pc_mxsel_w2 (tlu_pc_mxsel_w2),
         .tlu_pc_mxsel_w2 (tlu_pc_mxsel_w2),
             .ifu_npc_w             (ifu_npc_w[48:0]),
             .ifu_npc_w             (ifu_npc_w[48:0]),
             .tlu_rst                   (tlu_rst),
             .tlu_rst                   (tlu_rst),
             // .tlu_rst_l                      (tlu_rst_l),
             // .tlu_rst_l                      (tlu_rst_l),
         .tlu_sscan_tcl_data (tlu_sscan_test_data[62:60]),
         .tlu_sscan_tcl_data (tlu_sscan_test_data[`TCL_SSCAN_HI:`TCL_SSCAN_LO]),
             // Inputs
             // Inputs
             .ifu_tlu_npc_m                 (ifu_tlu_npc_m[48:0]),
             .ifu_tlu_npc_m                 (ifu_tlu_npc_m[48:0]),
             .ifu_tlu_pc_oor_e          (ifu_tlu_pc_oor_e),
             .ifu_tlu_pc_oor_e          (ifu_tlu_pc_oor_e),
         .lsu_tlu_early_flush_w (lsu_tlu_early_flush_w),
         .lsu_tlu_early_flush_w (lsu_tlu_early_flush_w),
         .ifu_tlu_flush_fd_w    (ifu_tlu_flush_fd2_w),
         .ifu_tlu_flush_fd_w    (ifu_tlu_flush_fd2_w),
             .ifu_tlu_sraddr_d          (ifu_tlu_sraddr_d[7-1:0]),
             .ifu_tlu_sraddr_d          (ifu_tlu_sraddr_d[`TLU_ASR_ADDR_WIDTH-1:0]),
             .ifu_tlu_rsr_inst_d        (ifu_tlu_rsr_inst_d),
             .ifu_tlu_rsr_inst_d        (ifu_tlu_rsr_inst_d),
             .lsu_tlu_wsr_inst_e        (lsu_tlu_wsr_inst_e),
             .lsu_tlu_wsr_inst_e        (lsu_tlu_wsr_inst_e),
             .tlu_wsr_data_w        (tlu_wsr_data_w[3:0]),
             .tlu_wsr_data_w        (tlu_wsr_data_w[3:0]),
             .lsu_tlu_ttype_m2          (lsu_tlu_ttype_m2[8:0]),
             .lsu_tlu_ttype_m2          (lsu_tlu_ttype_m2[8:0]),
             .lsu_tlu_ttype_vld_m2      (lsu_tlu_ttype_vld_m2),
             .lsu_tlu_ttype_vld_m2      (lsu_tlu_ttype_vld_m2),
Line 1765... Line 1095...
         .exu_tlu_spill_other   (exu_tlu_spill_other),
         .exu_tlu_spill_other   (exu_tlu_spill_other),
         .exu_tlu_spill_wtype   (exu_tlu_spill_wtype),
         .exu_tlu_spill_wtype   (exu_tlu_spill_wtype),
             .exu_tlu_va_oor_m          (exu_tlu_va_oor_m),
             .exu_tlu_va_oor_m          (exu_tlu_va_oor_m),
             .exu_tlu_va_oor_jl_ret_m   (exu_tlu_va_oor_jl_ret_m),
             .exu_tlu_va_oor_jl_ret_m   (exu_tlu_va_oor_jl_ret_m),
         .tlu_cwp_no_change_m   (tlu_cwp_no_change_m),
         .tlu_cwp_no_change_m   (tlu_cwp_no_change_m),
         .tlu_trap_cwp_en   (tlu_trap_cwp_en[4-1:0]),
         .tlu_trap_cwp_en   (tlu_trap_cwp_en[`TLU_THRD_NUM-1:0]),
             .ifu_tlu_sir_inst_m        (ifu_tlu_sir_inst_m),
             .ifu_tlu_sir_inst_m        (ifu_tlu_sir_inst_m),
             .ifu_tlu_inst_vld_m        (ifu_tlu_inst_vld_m),
             .ifu_tlu_inst_vld_m        (ifu_tlu_inst_vld_m),
             .ifu_tlu_thrid_d           (ifu_tlu_thrid_d[1:0]),
             .ifu_tlu_thrid_d           (ifu_tlu_thrid_d[1:0]),
         .lsu_tlu_async_ttype_vld_g (lsu_tlu_async_ttype_vld_g),
         .lsu_tlu_async_ttype_vld_g (lsu_tlu_async_ttype_vld_g),
         .lsu_tlu_defr_trp_taken_g (lsu_tlu_defr_trp_taken_g),
         .lsu_tlu_defr_trp_taken_g (lsu_tlu_defr_trp_taken_g),
Line 1790... Line 1120...
             .exu_tlu_misalign_addr_jmpl_rtn_m(exu_tlu_misalign_addr_jmpl_rtn_m),
             .exu_tlu_misalign_addr_jmpl_rtn_m(exu_tlu_misalign_addr_jmpl_rtn_m),
             .lsu_tlu_priv_action_g     (lsu_tlu_priv_action_g),
             .lsu_tlu_priv_action_g     (lsu_tlu_priv_action_g),
             .lsu_tlu_wtchpt_trp_g      (lsu_tlu_wtchpt_trp_g),
             .lsu_tlu_wtchpt_trp_g      (lsu_tlu_wtchpt_trp_g),
             .ifu_tlu_priv_violtn_m     (ifu_tlu_priv_violtn_m),
             .ifu_tlu_priv_violtn_m     (ifu_tlu_priv_violtn_m),
             .ifu_lsu_memref_d          (ifu_lsu_memref_d),
             .ifu_lsu_memref_d          (ifu_lsu_memref_d),
             .tlu_pstate_priv           (local_pstate_priv[4-1:0]),
             .tlu_pstate_priv           (local_pstate_priv[`TLU_THRD_NUM-1:0]),
             .tlu_pstate_am             (tlu_pstate_am[3:0]),
             .tlu_pstate_am             (tlu_pstate_am[3:0]),
             .tlu_isfsr_flt_vld         (tlu_isfsr_flt_vld[3:0]),
             .tlu_isfsr_flt_vld         (tlu_isfsr_flt_vld[3:0]),
             .ffu_tlu_trap_ieee754      (ffu_tlu_trap_ieee754),
             .ffu_tlu_trap_ieee754      (ffu_tlu_trap_ieee754),
             .ffu_tlu_trap_other        (ffu_tlu_trap_other),
             .ffu_tlu_trap_other        (ffu_tlu_trap_other),
             .ffu_tlu_trap_ue       (ffu_tlu_trap_ue),
             .ffu_tlu_trap_ue       (ffu_tlu_trap_ue),
             .ffu_ifu_tid_w2            (ffu_ifu_tid_w2[1:0]),
             .ffu_ifu_tid_w2            (ffu_ifu_tid_w2[1:0]),
             .ffu_tlu_ill_inst_m                (ffu_tlu_ill_inst_m), // new trap from ffu
             .ffu_tlu_ill_inst_m                (ffu_tlu_ill_inst_m), // new trap from ffu
             .lsu_tlu_rsr_data_e        (lsu_tlu_rsr_data_e[7:0]),
             .lsu_tlu_rsr_data_e        (lsu_tlu_rsr_data_e[7:0]),
             .lsu_tlu_squash_va_oor_m   (lsu_tlu_squash_va_oor_m),
             .lsu_tlu_squash_va_oor_m   (lsu_tlu_squash_va_oor_m),
             .tlu_hpstate_priv (tcl_hpstate_priv[4-1:0]),
             .tlu_hpstate_priv (tcl_hpstate_priv[`TLU_THRD_NUM-1:0]),
         .tlu_hscpd_dacc_excpt_m(tlu_hscpd_dacc_excpt_m),
         .tlu_hscpd_dacc_excpt_m(tlu_hscpd_dacc_excpt_m),
         .tlu_qtail_dacc_excpt_m(tlu_qtail_dacc_excpt_m),
         .tlu_qtail_dacc_excpt_m(tlu_qtail_dacc_excpt_m),
         .tlu_htickcmp_rw_e (tlu_htickcmp_rw_e),
         .tlu_htickcmp_rw_e (tlu_htickcmp_rw_e),
         // .tlu_gl_rw_g (tlu_gl_rw_g),
         // .tlu_gl_rw_g (tlu_gl_rw_g),
         .tlu_gl_rw_m (tlu_gl_rw_m),
         .tlu_gl_rw_m (tlu_gl_rw_m),
         .tlu_hpstate_enb  (tcl_hpstate_enb[4-1:0]),
         .tlu_hpstate_enb  (tcl_hpstate_enb[`TLU_THRD_NUM-1:0]),
         .tlu_hpstate_tlz  (tlu_hpstate_tlz[4-1:0]),
         .tlu_hpstate_tlz  (tlu_hpstate_tlz[`TLU_THRD_NUM-1:0]),
             .ctu_sscan_tid    (ctu_sscan_tid[4-1:0]),
             .ctu_sscan_tid    (ctu_sscan_tid[`TLU_THRD_NUM-1:0]),
         .se         (se),
         .se         (se),
             .rclk               (rclk),
             .rclk               (rclk),
             .grst_l     (grst_l),
             .grst_l     (grst_l),
             .arst_l     (arst_l),
             .arst_l     (arst_l),
             .rst_tri_en (mux_drive_disable));
             .rst_tri_en (mux_drive_disable));
 
 
tlu_tdp tdp (
tlu_tdp tdp (
             .so                        (scan1_2),
             .so                        (scan1_2),
             .si                        (scan1_1),
             .si                        (scan1_1),
             .tsa_rdata     ({tsa1_dout[63:60],
             .tsa_rdata     ({tsa1_dout[`TSA1_HTSTATE_HI:`TSA1_HTSTATE_LO],
                         // tsa0_dout[`TSA0_TPC_HI:`TSA0_TPC_LO],
                         // tsa0_dout[`TSA0_TPC_HI:`TSA0_TPC_LO],
                         // tsa1_dout[`TSA1_TNPC_HI:`TSA1_TNPC_LO],
                         // tsa1_dout[`TSA1_TNPC_HI:`TSA1_TNPC_LO],
                         tsa0_dout[78-1:32],
                         tsa0_dout[`TSA0_TPC_HI-1:`TSA0_TPC_LO],
                         tsa1_dout[58-1:12],
                         tsa1_dout[`TSA1_TNPC_HI-1:`TSA1_TNPC_LO],
                         tsa0_dout[28:0],
                         tsa0_dout[`TSA0_TSTATE_HI:`TSA0_TSTATE_LO],
                         tsa1_dout[8:0]}),
                         tsa1_dout[`TSA1_TTYPE_HI:`TSA1_TTYPE_LO]}),
             .lsu_tlu_rsr_data_e (lsu_tlu_rsr_data_mod_e[7:0]),
             .lsu_tlu_rsr_data_e (lsu_tlu_rsr_data_mod_e[7:0]),
         .ifu_lsu_imm_asi_d           (ifu_lsu_imm_asi_d[7:0]),
         .ifu_lsu_imm_asi_d           (ifu_lsu_imm_asi_d[7:0]),
         .ifu_lsu_imm_asi_vld_d       (ifu_lsu_imm_asi_vld_d),
         .ifu_lsu_imm_asi_vld_d       (ifu_lsu_imm_asi_vld_d),
             .tlu_lsu_redmode           (tlu_lsu_redmode[3:0]),
             .tlu_lsu_redmode           (tlu_lsu_redmode[3:0]),
         .tlu_exu_rsr_data_m    (tlu_exu_rsr_data_m[64-1:0]),
         .tlu_exu_rsr_data_m    (tlu_exu_rsr_data_m[`TLU_ASR_DATA_WIDTH-1:0]),
         /*AUTOINST*/
         /*AUTOINST*/
             // Outputs
             // Outputs
         // modified for bug 3017
         // modified for bug 3017
         .tlu_restore_pc_w1 (tlu_restore_pc_w1[48:0]),
         .tlu_restore_pc_w1 (tlu_restore_pc_w1[48:0]),
         .tlu_restore_npc_w1 (tlu_restore_npc_w1[48:0]),
         .tlu_restore_npc_w1 (tlu_restore_npc_w1[48:0]),
             .tlu_partial_trap_pc_w1 (tlu_partial_trap_pc_w1[33:0]),
             .tlu_partial_trap_pc_w1 (tlu_partial_trap_pc_w1[33:0]),
             .tlu_pib_rsr_data_e        (tlu_pib_rsr_data_e[63:0]),
             .tlu_pib_rsr_data_e        (tlu_pib_rsr_data_e[63:0]),
         .tlu_asi_state_e       (tlu_asi_state_e[8-1:0]),
         .tlu_asi_state_e       (tlu_asi_state_e[`TLU_ASI_STATE_WIDTH-1:0]),
             .tsa_wdata                     (tsa_wdata[136-1:0]),
             .tsa_wdata                     (tsa_wdata[`TLU_TSA_WIDTH-1:0]),
             .tlu_int_pstate_ie         (tlu_int_pstate_ie[3:0]),
             .tlu_int_pstate_ie         (tlu_int_pstate_ie[3:0]),
             .local_pstate_ie       (local_pstate_ie[3:0]),
             .local_pstate_ie       (local_pstate_ie[3:0]),
             .tlu_ifu_pstate_pef        (tlu_ifu_pstate_pef[3:0]),
             .tlu_ifu_pstate_pef        (tlu_ifu_pstate_pef[3:0]),
             .tlu_lsu_pstate_cle        (tlu_lsu_pstate_cle[3:0]),
             .tlu_lsu_pstate_cle        (tlu_lsu_pstate_cle[3:0]),
             .tlu_lsu_pstate_priv       (tlu_lsu_pstate_priv[3:0]),
             .tlu_lsu_pstate_priv       (tlu_lsu_pstate_priv[3:0]),
             .tlu_int_redmode           (tlu_int_redmode[3:0]),
             .tlu_int_redmode           (tlu_int_redmode[3:0]),
             .local_pstate_priv         (local_pstate_priv[4-1:0]),
             .local_pstate_priv         (local_pstate_priv[`TLU_THRD_NUM-1:0]),
             .tlu_pstate_am             (tlu_pstate_am[3:0]),
             .tlu_pstate_am             (tlu_pstate_am[3:0]),
             .tlu_sftint_id             (tlu_sftint_id[3:0]),
             .tlu_sftint_id             (tlu_sftint_id[3:0]),
             .tlu_tick_incr_din         (tlu_tick_incr_din[61:0]),
             .tlu_tick_incr_din         (tlu_tick_incr_din[61:0]),
             .tlu_sscan_test_data  (tlu_sscan_test_data[51-1:0]),
             .tlu_sscan_test_data  (tlu_sscan_test_data[`TDP_SSCAN_WIDTH-1:0]),
         .tlu_dnrtry_global_g  (tlu_dnrtry_global_g[2-1:0]),
         .tlu_dnrtry_global_g  (tlu_dnrtry_global_g[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_hpstate_enb  (tlu_hpstate_enb[4-1:0]),
         .tlu_hpstate_enb  (tlu_hpstate_enb[`TLU_THRD_NUM-1:0]),
         .local_hpstate_enb  (local_hpstate_enb[4-1:0]),
         .local_hpstate_enb  (local_hpstate_enb[`TLU_THRD_NUM-1:0]),
         .tcl_hpstate_enb  (tcl_hpstate_enb[4-1:0]),
         .tcl_hpstate_enb  (tcl_hpstate_enb[`TLU_THRD_NUM-1:0]),
         .tlu_hpstate_tlz  (tlu_hpstate_tlz[4-1:0]),
         .tlu_hpstate_tlz  (tlu_hpstate_tlz[`TLU_THRD_NUM-1:0]),
         .tlu_hpstate_priv  (tlu_hpstate_priv[4-1:0]),
         .tlu_hpstate_priv  (tlu_hpstate_priv[`TLU_THRD_NUM-1:0]),
         .local_hpstate_priv  (local_hpstate_priv[4-1:0]),
         .local_hpstate_priv  (local_hpstate_priv[`TLU_THRD_NUM-1:0]),
         .tcl_hpstate_priv  (tcl_hpstate_priv[4-1:0]),
         .tcl_hpstate_priv  (tcl_hpstate_priv[`TLU_THRD_NUM-1:0]),
         .tlu_hpstate_ibe  (tlu_hpstate_ibe[4-1:0]),
         .tlu_hpstate_ibe  (tlu_hpstate_ibe[`TLU_THRD_NUM-1:0]),
         .tlu_hintp        (tlu_hintp),
         .tlu_hintp        (tlu_hintp),
             // Inputs
             // Inputs
         .tlu_ibrkpt_trap_w2 (tlu_ibrkpt_trap_w2),
         .tlu_ibrkpt_trap_w2 (tlu_ibrkpt_trap_w2),
         .pib_picl_wrap      (pib_picl_wrap[4-1:0]),
         .pib_picl_wrap      (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
         .pib_pich_wrap      (pib_pich_wrap[4-1:0]),
         .pib_pich_wrap      (pib_pich_wrap[`TLU_THRD_NUM-1:0]),
         .tlu_por_rstint_g  (tlu_por_rstint_g[4-1:0]),
         .tlu_por_rstint_g  (tlu_por_rstint_g[`TLU_THRD_NUM-1:0]),
             .rclk                          (rclk),
             .rclk                          (rclk),
             .tlu_rst                   (tlu_rst),
             .tlu_rst                   (tlu_rst),
         .tlu_trap_hpstate_enb  (tlu_trap_hpstate_enb),
         .tlu_trap_hpstate_enb  (tlu_trap_hpstate_enb),
             .tlu_thrd_wsel_w2          (tlu_thrd_wsel_w2[4-1:0]),
             .tlu_thrd_wsel_w2          (tlu_thrd_wsel_w2[`TLU_THRD_NUM-1:0]),
             .tlu_final_ttype_w2                (tlu_final_ttype_w2[9-1:0]),
             .tlu_final_ttype_w2                (tlu_final_ttype_w2[`TSA_TTYPE_WIDTH-1:0]),
             .tlu_pstate_din_sel0       (tlu_pstate_din_sel0[1:0]),
             .tlu_pstate_din_sel0       (tlu_pstate_din_sel0[1:0]),
             .tlu_pstate_din_sel1       (tlu_pstate_din_sel1[1:0]),
             .tlu_pstate_din_sel1       (tlu_pstate_din_sel1[1:0]),
             .tlu_pstate_din_sel2       (tlu_pstate_din_sel2[1:0]),
             .tlu_pstate_din_sel2       (tlu_pstate_din_sel2[1:0]),
             .tlu_pstate_din_sel3       (tlu_pstate_din_sel3[1:0]),
             .tlu_pstate_din_sel3       (tlu_pstate_din_sel3[1:0]),
             .tlu_wr_tsa_inst_w2                (tlu_wr_tsa_inst_w2),
             .tlu_wr_tsa_inst_w2                (tlu_wr_tsa_inst_w2),
             .lsu_asi_reg0              (lsu_asi_reg0[7:0]),
             .lsu_asi_reg0              (lsu_asi_reg0[7:0]),
             .lsu_asi_reg1              (lsu_asi_reg1[7:0]),
             .lsu_asi_reg1              (lsu_asi_reg1[7:0]),
             .lsu_asi_reg2              (lsu_asi_reg2[7:0]),
             .lsu_asi_reg2              (lsu_asi_reg2[7:0]),
             .lsu_asi_reg3              (lsu_asi_reg3[7:0]),
             .lsu_asi_reg3              (lsu_asi_reg3[7:0]),
             .tlu_tickcmp_sel           (tlu_tickcmp_sel[4-1:0]),
             .tlu_tickcmp_sel           (tlu_tickcmp_sel[`TLU_THRD_NUM-1:0]),
             .exu_tlu_ccr0_w            (exu_tlu_ccr0_w[7:0]),
             .exu_tlu_ccr0_w            (exu_tlu_ccr0_w[7:0]),
             .exu_tlu_ccr1_w            (exu_tlu_ccr1_w[7:0]),
             .exu_tlu_ccr1_w            (exu_tlu_ccr1_w[7:0]),
             .exu_tlu_ccr2_w            (exu_tlu_ccr2_w[7:0]),
             .exu_tlu_ccr2_w            (exu_tlu_ccr2_w[7:0]),
             .exu_tlu_ccr3_w            (exu_tlu_ccr3_w[7:0]),
             .exu_tlu_ccr3_w            (exu_tlu_ccr3_w[7:0]),
             .exu_tlu_cwp0              (exu_tlu_cwp0[2:0]),
             .exu_tlu_cwp0              (exu_tlu_cwp0[2:0]),
             .exu_tlu_cwp1              (exu_tlu_cwp1[2:0]),
             .exu_tlu_cwp1              (exu_tlu_cwp1[2:0]),
             .exu_tlu_cwp2              (exu_tlu_cwp2[2:0]),
             .exu_tlu_cwp2              (exu_tlu_cwp2[2:0]),
             .exu_tlu_cwp3              (exu_tlu_cwp3[2:0]),
             .exu_tlu_cwp3              (exu_tlu_cwp3[2:0]),
         .tlu_trap_cwp_en   (tlu_trap_cwp_en[4-1:0]),
         .tlu_trap_cwp_en   (tlu_trap_cwp_en[`TLU_THRD_NUM-1:0]),
         // modified for bug 3017
         // modified for bug 3017
             // .ifu_tlu_pc_m           (ifu_tlu_pc_m[48:0]),
             // .ifu_tlu_pc_m           (ifu_tlu_pc_m[48:0]),
             // .ifu_tlu_npc_m          (ifu_tlu_npc_m[48:0]),
             // .ifu_tlu_npc_m          (ifu_tlu_npc_m[48:0]),
         .tlu_pc_new_w          (tlu_pc_new_w[48:0]),
         .tlu_pc_new_w          (tlu_pc_new_w[48:0]),
         .tlu_npc_new_w         (tlu_npc_new_w[48:0]),
         .tlu_npc_new_w         (tlu_npc_new_w[48:0]),
             .tlu_sftint_en_l_g         (tlu_sftint_en_l_g[4-1:0]),
             .tlu_sftint_en_l_g         (tlu_sftint_en_l_g[`TLU_THRD_NUM-1:0]),
             .tlu_sftint_mx_sel         (tlu_sftint_mx_sel[4-1:0]),
             .tlu_sftint_mx_sel         (tlu_sftint_mx_sel[`TLU_THRD_NUM-1:0]),
             .tlu_set_sftint_l_g        (tlu_set_sftint_l_g),
             .tlu_set_sftint_l_g        (tlu_set_sftint_l_g),
             .tlu_clr_sftint_l_g        (tlu_clr_sftint_l_g),
             .tlu_clr_sftint_l_g        (tlu_clr_sftint_l_g),
             .tlu_wr_sftint_l_g         (tlu_wr_sftint_l_g),
             .tlu_wr_sftint_l_g         (tlu_wr_sftint_l_g),
             .tlu_sftint_penc_sel       (tlu_sftint_penc_sel[3:0]),
             .tlu_sftint_penc_sel       (tlu_sftint_penc_sel[3:0]),
             .tlu_tba_en_l              (tlu_tba_en_l[3:0]),
             .tlu_tba_en_l              (tlu_tba_en_l[3:0]),
Line 1923... Line 1253...
             .tlu_rdpr_mx3_sel          (tlu_rdpr_mx3_sel[1:0]),
             .tlu_rdpr_mx3_sel          (tlu_rdpr_mx3_sel[1:0]),
             .tlu_rdpr_mx4_sel          (tlu_rdpr_mx4_sel[1:0]),
             .tlu_rdpr_mx4_sel          (tlu_rdpr_mx4_sel[1:0]),
             .tlu_rdpr_mx5_sel          (tlu_rdpr_mx5_sel[2:0]),
             .tlu_rdpr_mx5_sel          (tlu_rdpr_mx5_sel[2:0]),
             .tlu_rdpr_mx6_sel          (tlu_rdpr_mx6_sel[2:0]),
             .tlu_rdpr_mx6_sel          (tlu_rdpr_mx6_sel[2:0]),
             .tlu_rdpr_mx7_sel          (tlu_rdpr_mx7_sel[3:0]),
             .tlu_rdpr_mx7_sel          (tlu_rdpr_mx7_sel[3:0]),
             .ctu_sscan_tid          (ctu_sscan_tid[4-1:0]),
             .ctu_sscan_tid          (ctu_sscan_tid[`TLU_THRD_NUM-1:0]),
         .tlu_gl_lvl0  (tlu_gl_lvl0[2-1:0]),
         .tlu_gl_lvl0  (tlu_gl_lvl0[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_gl_lvl1  (tlu_gl_lvl1[2-1:0]),
         .tlu_gl_lvl1  (tlu_gl_lvl1[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_gl_lvl2  (tlu_gl_lvl2[2-1:0]),
         .tlu_gl_lvl2  (tlu_gl_lvl2[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_gl_lvl3  (tlu_gl_lvl3[2-1:0]),
         .tlu_gl_lvl3  (tlu_gl_lvl3[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_hpstate_din_sel0  (tlu_hpstate_din_sel0[1:0]),
         .tlu_hpstate_din_sel0  (tlu_hpstate_din_sel0[1:0]),
         .tlu_hpstate_din_sel1  (tlu_hpstate_din_sel1[1:0]),
         .tlu_hpstate_din_sel1  (tlu_hpstate_din_sel1[1:0]),
         .tlu_hpstate_din_sel2  (tlu_hpstate_din_sel2[1:0]),
         .tlu_hpstate_din_sel2  (tlu_hpstate_din_sel2[1:0]),
         .tlu_hpstate_din_sel3  (tlu_hpstate_din_sel3[1:0]),
         .tlu_hpstate_din_sel3  (tlu_hpstate_din_sel3[1:0]),
         .tlu_htba_en_l  (tlu_htba_en_l[4-1:0]),
         .tlu_htba_en_l  (tlu_htba_en_l[`TLU_THRD_NUM-1:0]),
         .tlu_htickcmp_en_l  (tlu_htickcmp_en_l[4-1:0]),
         .tlu_htickcmp_en_l  (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
         .tlu_htickcmp_intdis  (tlu_htickcmp_intdis),
         .tlu_htickcmp_intdis  (tlu_htickcmp_intdis),
         .tlu_pc_mxsel_w2 (tlu_pc_mxsel_w2),
         .tlu_pc_mxsel_w2 (tlu_pc_mxsel_w2),
         .tlu_set_hintp_sel_g  (tlu_set_hintp_sel_g[4-1:0]),
         .tlu_set_hintp_sel_g  (tlu_set_hintp_sel_g[`TLU_THRD_NUM-1:0]),
         .tlu_stickcmp_en_l  (tlu_stickcmp_en_l[4-1:0]),
         .tlu_stickcmp_en_l  (tlu_stickcmp_en_l[`TLU_THRD_NUM-1:0]),
         .tlu_update_hpstate_l_w2  (tlu_update_hpstate_l_w2[4-1:0]),
         .tlu_update_hpstate_l_w2  (tlu_update_hpstate_l_w2[`TLU_THRD_NUM-1:0]),
         .tlu_wr_hintp_g  (tlu_wr_hintp_g[4-1:0]),
         .tlu_wr_hintp_g  (tlu_wr_hintp_g[`TLU_THRD_NUM-1:0]),
         .tlu_wsr_data_w        (tlu_wsr_data_w[64-1:0]),
         .tlu_wsr_data_w        (tlu_wsr_data_w[`TLU_ASR_DATA_WIDTH-1:0]),
             .se                        (se));
             .se                        (se));
 
 
// modified for Niagara SRAMs methodology
// modified for Niagara SRAMs methodology
 
 
bw_r_rf32x80 tsa0 (
bw_r_rf32x80 tsa0 (
             // Outputs
             // Outputs
             .dout           (tsa0_dout[80-1:0]),
             .dout           (tsa0_dout[`TSA_MEM_WIDTH-1:0]),
         .so         (short_scan0_1),
         .so         (short_scan0_1),
             // Inputs
             // Inputs
             .wr_adr     ({tsa_wr_tid[1:0],tsa_wr_tpl[2:0]}),
             .wr_adr     ({tsa_wr_tid[1:0],tsa_wr_tpl[2:0]}),
             .wr_en              (tsa_wr_vld[0]),
             .wr_en              (tsa_wr_vld[0]),
             .nib_wr_en  ({{12{tsa_pc_en}},
             .nib_wr_en  ({{12{tsa_pc_en}},
                      { 8{tsa_tstate_en}}}),
                      { 8{tsa_tstate_en}}}),
             .rd_adr     ({tsa_rd_tid[1:0],tsa_rd_tpl[2:0]}),
             .rd_adr     ({tsa_rd_tid[1:0],tsa_rd_tpl[2:0]}),
             .rd_en              (tsa_rd_en),
             .rd_en              (tsa_rd_en),
             .din                ({1'b0, tsa_wdata[131:85],
             .din                ({1'b0, tsa_wdata[`TLU_PC_HI:`TLU_PC_LO],
                       3'b0, tsa_wdata[37:9]}),
                       3'b0, tsa_wdata[`TLU_GL_HI:`TLU_CWP_LO]}),
         .reset_l    (arst_l),
         .reset_l    (arst_l),
         .rst_tri_en (mem_write_disable),
         .rst_tri_en (mem_write_disable),
         .sehold     (sehold),
         .sehold     (sehold),
         .se         (se),
         .se         (se),
         .si         (short_si0),
         .si         (short_si0),
         .rclk       (rclk));
         .rclk       (rclk));
 
 
bw_r_rf32x80 tsa1 (
bw_r_rf32x80 tsa1 (
             // Outputs
             // Outputs
             .dout           (tsa1_dout[80-1:0]),
             .dout           (tsa1_dout[`TSA_MEM_WIDTH-1:0]),
         .so         (short_scan0_2),
         .so         (short_scan0_2),
             // Inputs
             // Inputs
             .wr_adr     ({tsa_wr_tid[1:0],tsa_wr_tpl[2:0]}),
             .wr_adr     ({tsa_wr_tid[1:0],tsa_wr_tpl[2:0]}),
             .wr_en              (tsa_wr_vld[1]),
             .wr_en              (tsa_wr_vld[1]),
             .nib_wr_en  ({ 4'h0, // unused 
             .nib_wr_en  ({ 4'h0, // unused 
Line 1979... Line 1309...
                      {12{tsa_npc_en}},
                      {12{tsa_npc_en}},
                      { 3{tsa_ttype_en}}}),
                      { 3{tsa_ttype_en}}}),
             .rd_adr     ({tsa_rd_tid[1:0],tsa_rd_tpl[2:0]}),
             .rd_adr     ({tsa_rd_tid[1:0],tsa_rd_tpl[2:0]}),
             .rd_en              (tsa_rd_en),
             .rd_en              (tsa_rd_en),
             .din                ({16'h0000, // unused bits
             .din                ({16'h0000, // unused bits
                       tsa_wdata[135:132],
                       tsa_wdata[`TLU_HTSTATE_HI:`TLU_HTSTATE_LO],
                       1'b0, tsa_wdata[84:38],
                       1'b0, tsa_wdata[`TLU_NPC_HI:`TLU_NPC_LO],
                       3'b0, tsa_wdata[8:0]}),
                       3'b0, tsa_wdata[`TLU_TT_HI:`TLU_TT_LO]}),
         .reset_l    (arst_l),
         .reset_l    (arst_l),
         .rst_tri_en (mem_write_disable),
         .rst_tri_en (mem_write_disable),
         .sehold     (sehold),
         .sehold     (sehold),
         .se         (se),
         .se         (se),
         .si         (short_scan0_1),
         .si         (short_scan0_1),
Line 2190... Line 1520...
                   .lsu_tlu_dside_ctxt_m(lsu_tlu_dside_ctxt_m[12:0]),
                   .lsu_tlu_dside_ctxt_m(lsu_tlu_dside_ctxt_m[12:0]),
                   .lsu_tlu_pctxt_m     (lsu_tlu_pctxt_m[12:0]),
                   .lsu_tlu_pctxt_m     (lsu_tlu_pctxt_m[12:0]),
                   .tlu_tag_access_ctxt_sel_m(tlu_tag_access_ctxt_sel_m[2:0]),
                   .tlu_tag_access_ctxt_sel_m(tlu_tag_access_ctxt_sel_m[2:0]),
                   .lsu_tlu_st_rs3_data_b63t59_g(lsu_tlu_st_rs3_data_g[63:59]),
                   .lsu_tlu_st_rs3_data_b63t59_g(lsu_tlu_st_rs3_data_g[63:59]),
                   .lsu_tlu_st_rs3_data_b47t0_g(lsu_tlu_st_rs3_data_g[47:0]),
                   .lsu_tlu_st_rs3_data_b47t0_g(lsu_tlu_st_rs3_data_g[47:0]),
                   .exu_lsu_ldst_va_e   (exu_lsu_ldst_va_e[48-1:0]),
                   .exu_lsu_ldst_va_e   (exu_lsu_ldst_va_e[`ASI_VA_WIDTH-1:0]),
                   .tlu_idtsb_8k_ptr    (tlu_idtsb_8k_ptr[47:0]),
                   .tlu_idtsb_8k_ptr    (tlu_idtsb_8k_ptr[47:0]),
                   .lsu_tlu_tlb_dmp_va_m(lsu_tlu_tlb_dmp_va_m[47:13]),
                   .lsu_tlu_tlb_dmp_va_m(lsu_tlu_tlb_dmp_va_m[47:13]),
                   .tlu_slxa_thrd_sel   (tlu_slxa_thrd_sel[3:0]),
                   .tlu_slxa_thrd_sel   (tlu_slxa_thrd_sel[3:0]),
                   .tlu_tte_tag_g       (tlu_tte_tag_g[2:0]),
                   .tlu_tte_tag_g       (tlu_tte_tag_g[2:0]),
                   .tlu_dmp_key_vld_g   (tlu_dmp_key_vld_g[4:0]),
                   .tlu_dmp_key_vld_g   (tlu_dmp_key_vld_g[4:0]),
Line 2223... Line 1553...
             .rst_tri_en (mux_drive_disable),
             .rst_tri_en (mux_drive_disable),
         // output
         // output
         // modified for timing
         // modified for timing
         // .tlu_gl_rw_g (tlu_gl_rw_g),
         // .tlu_gl_rw_g (tlu_gl_rw_g),
         .tlu_gl_rw_m (tlu_gl_rw_m),
         .tlu_gl_rw_m (tlu_gl_rw_m),
         .tlu_gl_lvl0 (tlu_gl_lvl0[2-1:0]),
         .tlu_gl_lvl0 (tlu_gl_lvl0[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_gl_lvl1 (tlu_gl_lvl1[2-1:0]),
         .tlu_gl_lvl1 (tlu_gl_lvl1[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_gl_lvl2 (tlu_gl_lvl2[2-1:0]),
         .tlu_gl_lvl2 (tlu_gl_lvl2[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_gl_lvl3 (tlu_gl_lvl3[2-1:0]),
         .tlu_gl_lvl3 (tlu_gl_lvl3[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_hpstate_din_sel0 (tlu_hpstate_din_sel0[1:0]),
         .tlu_hpstate_din_sel0 (tlu_hpstate_din_sel0[1:0]),
         .tlu_hpstate_din_sel1 (tlu_hpstate_din_sel1[1:0]),
         .tlu_hpstate_din_sel1 (tlu_hpstate_din_sel1[1:0]),
         .tlu_hpstate_din_sel2 (tlu_hpstate_din_sel2[1:0]),
         .tlu_hpstate_din_sel2 (tlu_hpstate_din_sel2[1:0]),
         .tlu_hpstate_din_sel3 (tlu_hpstate_din_sel3[1:0]),
         .tlu_hpstate_din_sel3 (tlu_hpstate_din_sel3[1:0]),
         .tlu_htickcmp_rw_e (tlu_htickcmp_rw_e),
         .tlu_htickcmp_rw_e (tlu_htickcmp_rw_e),
         // .tlu_update_hpstate_l_g (tlu_update_hpstate_l_g[`TLU_THRD_NUM-1:0]),
         // .tlu_update_hpstate_l_g (tlu_update_hpstate_l_g[`TLU_THRD_NUM-1:0]),
         .tlu_update_hpstate_l_w2 (tlu_update_hpstate_l_w2[4-1:0]),
         .tlu_update_hpstate_l_w2 (tlu_update_hpstate_l_w2[`TLU_THRD_NUM-1:0]),
         // .tlu_htickcmp_en_l (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
         // .tlu_htickcmp_en_l (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
         .tlu_htickcmp_intdis (tlu_htickcmp_intdis),
         .tlu_htickcmp_intdis (tlu_htickcmp_intdis),
         // .tlu_hintp_en_l_g (tlu_hintp_en_l_g[`TLU_THRD_NUM-1:0]),
         // .tlu_hintp_en_l_g (tlu_hintp_en_l_g[`TLU_THRD_NUM-1:0]),
         .tlu_wr_hintp_g (tlu_wr_hintp_g[4-1:0]),
         .tlu_wr_hintp_g (tlu_wr_hintp_g[`TLU_THRD_NUM-1:0]),
         // .tlu_set_hintp_g (tlu_set_hintp_g[`TLU_THRD_NUM-1:0]),
         // .tlu_set_hintp_g (tlu_set_hintp_g[`TLU_THRD_NUM-1:0]),
         .tlu_set_hintp_sel_g (tlu_set_hintp_sel_g[4-1:0]),
         .tlu_set_hintp_sel_g (tlu_set_hintp_sel_g[`TLU_THRD_NUM-1:0]),
         .tlu_htba_en_l (tlu_htba_en_l[4-1:0]),
         .tlu_htba_en_l (tlu_htba_en_l[`TLU_THRD_NUM-1:0]),
         // .tlu_hyper_lite (tlu_hyper_lite[`TLU_THRD_NUM-1:0]),
         // .tlu_hyper_lite (tlu_hyper_lite[`TLU_THRD_NUM-1:0]),
         .tlu_hscpd_dacc_excpt_m (tlu_hscpd_dacc_excpt_m),
         .tlu_hscpd_dacc_excpt_m (tlu_hscpd_dacc_excpt_m),
         .tlu_qtail_dacc_excpt_m (tlu_qtail_dacc_excpt_m),
         .tlu_qtail_dacc_excpt_m (tlu_qtail_dacc_excpt_m),
         .tlu_scpd_rd_vld_m (tlu_scpd_rd_vld_m),
         .tlu_scpd_rd_vld_m (tlu_scpd_rd_vld_m),
         // .tlu_scpd_rd_vld_g (tlu_scpd_rd_vld_g),
         // .tlu_scpd_rd_vld_g (tlu_scpd_rd_vld_g),
         .tlu_scpd_wr_vld_g (tlu_scpd_wr_vld_g),
         .tlu_scpd_wr_vld_g (tlu_scpd_wr_vld_g),
         .tlu_scpd_rd_addr_m (tlu_scpd_rd_addr_m[5-1:0]),
         .tlu_scpd_rd_addr_m (tlu_scpd_rd_addr_m[`SCPD_RW_ADDR_WIDTH-1:0]),
         .tlu_scpd_wr_addr_g (tlu_scpd_wr_addr_g[5-1:0]),
         .tlu_scpd_wr_addr_g (tlu_scpd_wr_addr_g[`SCPD_RW_ADDR_WIDTH-1:0]),
         .tlu_asi_queue_rdata_g(tlu_asi_queue_rdata_g[8-1:0]),
         .tlu_asi_queue_rdata_g(tlu_asi_queue_rdata_g[`TLU_ASI_QUE_WIDTH-1:0]),
         .tlu_ld_data_vld_g(tlu_ld_data_vld_g),
         .tlu_ld_data_vld_g(tlu_ld_data_vld_g),
         .tlu_asi_queue_rd_vld_g(tlu_asi_queue_rd_vld_g),
         .tlu_asi_queue_rd_vld_g(tlu_asi_queue_rd_vld_g),
                 // .tlu_va_all_zero_g(tlu_va_all_zero_g),
                 // .tlu_va_all_zero_g(tlu_va_all_zero_g),
                 .tlu_va_ill_g(tlu_va_ill_g),
                 .tlu_va_ill_g(tlu_va_ill_g),
         .tlu_htstate_rw_d (tlu_htstate_rw_d),
         .tlu_htstate_rw_d (tlu_htstate_rw_d),
         .tlu_htstate_rw_g (tlu_htstate_rw_g),
         .tlu_htstate_rw_g (tlu_htstate_rw_g),
             // .tlu_htba_mx2_sel (tlu_htba_mx2_sel),
             // .tlu_htba_mx2_sel (tlu_htba_mx2_sel),
         // .tlu_rdpr_mx5_sel (tlu_rdpr_mx5_sel[3:0]),
         // .tlu_rdpr_mx5_sel (tlu_rdpr_mx5_sel[3:0]),
         .tlu_hyperv_rdpr_sel (tlu_hyperv_rdpr_sel[4:0]),
         .tlu_hyperv_rdpr_sel (tlu_hyperv_rdpr_sel[4:0]),
         // .tlu_rdpr_mx5_active (tlu_rdpr_mx5_active),
         // .tlu_rdpr_mx5_active (tlu_rdpr_mx5_active),
             .tlu_exu_agp (tlu_exu_agp[2-1:0]),
             .tlu_exu_agp (tlu_exu_agp[`TSA_GLOBAL_WIDTH-1:0]),
             .tlu_exu_agp_swap (tlu_exu_agp_swap),
             .tlu_exu_agp_swap (tlu_exu_agp_swap),
         .tlu_cpu_mondo_cmp (tlu_cpu_mondo_cmp[4-1:0]),
         .tlu_cpu_mondo_cmp (tlu_cpu_mondo_cmp[`TLU_THRD_NUM-1:0]),
         .tlu_dev_mondo_cmp (tlu_dev_mondo_cmp[4-1:0]),
         .tlu_dev_mondo_cmp (tlu_dev_mondo_cmp[`TLU_THRD_NUM-1:0]),
         .tlu_resum_err_cmp (tlu_resum_err_cmp[4-1:0]),
         .tlu_resum_err_cmp (tlu_resum_err_cmp[`TLU_THRD_NUM-1:0]),
             // .tlu_exu_agp_tid        (tlu_exu_agp_tid[1:0]),
             // .tlu_exu_agp_tid        (tlu_exu_agp_tid[1:0]),
                 .tlu_asi_write_g       (tlu_asi_write_g),
                 .tlu_asi_write_g       (tlu_asi_write_g),
                .inc_ind_asi_wr_inrr(inc_ind_asi_wr_inrr[4-1:0]),
                .inc_ind_asi_wr_inrr(inc_ind_asi_wr_inrr[`TLU_THRD_NUM-1:0]),
                .inc_ind_asi_wr_indr(inc_ind_asi_wr_indr[4-1:0]),
                .inc_ind_asi_wr_indr(inc_ind_asi_wr_indr[`TLU_THRD_NUM-1:0]),
                .inc_ind_asi_rd_invr(inc_ind_asi_rd_invr[4-1:0]),
                .inc_ind_asi_rd_invr(inc_ind_asi_rd_invr[`TLU_THRD_NUM-1:0]),
                .tlu_local_thrid_g(tlu_local_thrid_g[4-1:0]),
                .tlu_local_thrid_g(tlu_local_thrid_g[`TLU_THRD_NUM-1:0]),
         // input
         // input
         .tlu_por_rstint_g (tlu_por_rstint_g[4-1:0]),
         .tlu_por_rstint_g (tlu_por_rstint_g[`TLU_THRD_NUM-1:0]),
         // .tlu_wsr_inst_g (tlu_wsr_inst_g),
         // .tlu_wsr_inst_g (tlu_wsr_inst_g),
         .tlu_wsr_inst_nq_g (tlu_wsr_inst_nq_g),
         .tlu_wsr_inst_nq_g (tlu_wsr_inst_nq_g),
         // .ifu_tlu_thrid_e (ifu_tlu_thrid_e[1:0]),
         // .ifu_tlu_thrid_e (ifu_tlu_thrid_e[1:0]),
         .ifu_tlu_thrid_d (ifu_tlu_thrid_d[1:0]),
         .ifu_tlu_thrid_d (ifu_tlu_thrid_d[1:0]),
         .ifu_tlu_sraddr_d (ifu_tlu_sraddr_d_v2[7-1:0]),
         .ifu_tlu_sraddr_d (ifu_tlu_sraddr_d_v2[`TLU_ASR_ADDR_WIDTH-1:0]),
         .tlu_wsr_data_w_global (tlu_wsr_data_w[4-1:0]),
         .tlu_wsr_data_w_global (tlu_wsr_data_w[`TLU_GLOBAL_WIDTH-1:0]),
         .tlu_dnrtry_global_g (tlu_dnrtry_global_g[2-1:0]),
         .tlu_dnrtry_global_g (tlu_dnrtry_global_g[`TSA_GLOBAL_WIDTH-1:0]),
         .tlu_dnrtry0_inst_g (tlu_dnrtry0_inst_g),
         .tlu_dnrtry0_inst_g (tlu_dnrtry0_inst_g),
         .tlu_dnrtry1_inst_g (tlu_dnrtry1_inst_g),
         .tlu_dnrtry1_inst_g (tlu_dnrtry1_inst_g),
         .tlu_dnrtry2_inst_g (tlu_dnrtry2_inst_g),
         .tlu_dnrtry2_inst_g (tlu_dnrtry2_inst_g),
         .tlu_dnrtry3_inst_g (tlu_dnrtry3_inst_g),
         .tlu_dnrtry3_inst_g (tlu_dnrtry3_inst_g),
         // modified due to timing
         // modified due to timing
         // .tlu_thrd0_traps (tlu_thrd0_traps),
         // .tlu_thrd0_traps (tlu_thrd0_traps),
         // .tlu_thrd1_traps (tlu_thrd1_traps),
         // .tlu_thrd1_traps (tlu_thrd1_traps),
         // .tlu_thrd2_traps (tlu_thrd2_traps),
         // .tlu_thrd2_traps (tlu_thrd2_traps),
         // .tlu_thrd3_traps (tlu_thrd3_traps),
         // .tlu_thrd3_traps (tlu_thrd3_traps),
         // .tlu_select_tba_g (tlu_select_tba_g),
         // .tlu_select_tba_g (tlu_select_tba_g),
         .tlu_thrd_traps_w2 (tlu_thrd_traps_w2[4-1:0]),
         .tlu_thrd_traps_w2 (tlu_thrd_traps_w2[`TLU_THRD_NUM-1:0]),
         .tlu_select_tba_w2 (tlu_select_tba_w2),
         .tlu_select_tba_w2 (tlu_select_tba_w2),
         .tlu_tick_ctl_din (tlu_tick_ctl_din),
         .tlu_tick_ctl_din (tlu_tick_ctl_din),
         // .tlu_htick_match (tlu_htick_match),
         // .tlu_htick_match (tlu_htick_match),
         .tlu_tickcmp_sel (tlu_tickcmp_sel[4-1:0]),
         .tlu_tickcmp_sel (tlu_tickcmp_sel[`TLU_THRD_NUM-1:0]),
         .tlu_pstate_priv (local_pstate_priv[4-1:0]),
         .tlu_pstate_priv (local_pstate_priv[`TLU_THRD_NUM-1:0]),
         .tlu_hpstate_priv (local_hpstate_priv[4-1:0]),
         .tlu_hpstate_priv (local_hpstate_priv[`TLU_THRD_NUM-1:0]),
         .tlu_hpstate_enb (local_hpstate_enb[4-1:0]),
         .tlu_hpstate_enb (local_hpstate_enb[`TLU_THRD_NUM-1:0]),
         .ifu_lsu_alt_space_e (ifu_lsu_alt_space_e),
         .ifu_lsu_alt_space_e (ifu_lsu_alt_space_e),
         .ifu_lsu_ld_inst_e (ifu_lsu_ld_inst_e),
         .ifu_lsu_ld_inst_e (ifu_lsu_ld_inst_e),
         .ifu_lsu_st_inst_e (ifu_lsu_st_inst_e),
         .ifu_lsu_st_inst_e (ifu_lsu_st_inst_e),
         .tlu_asi_state_e (tlu_asi_state_e[8-1:0]),
         .tlu_asi_state_e (tlu_asi_state_e[`TLU_ASI_STATE_WIDTH-1:0]),
         // new signal to replace ifu_tlu_flush_w
         // new signal to replace ifu_tlu_flush_w
         // .ifu_tlu_flush_w (ifu_tlu_flush_w),
         // .ifu_tlu_flush_w (ifu_tlu_flush_w),
                 // .tlu_flush_pipe_w (tlu_flush_pipe_w),
                 // .tlu_flush_pipe_w (tlu_flush_pipe_w),
                 // .tlu_flush_all_w (tlu_flush_all_w),
                 // .tlu_flush_all_w (tlu_flush_all_w),
         .lsu_tlu_early_flush_w (lsu_tlu_early_flush2_w),
         .lsu_tlu_early_flush_w (lsu_tlu_early_flush2_w),
Line 2313... Line 1643...
                 .tlu_lsu_int_ldxa_vld_w2(tlu_lsu_int_ldxa_vld_w2),
                 .tlu_lsu_int_ldxa_vld_w2(tlu_lsu_int_ldxa_vld_w2),
                 .tlu_asi_data_nf_vld_w2 (tlu_asi_data_nf_vld_w2),
                 .tlu_asi_data_nf_vld_w2 (tlu_asi_data_nf_vld_w2),
         .ifu_tlu_flush_fd_w      (ifu_tlu_flush_fd_w),
         .ifu_tlu_flush_fd_w      (ifu_tlu_flush_fd_w),
                 .tlu_inst_vld_m  (tlu_inst_vld_nq_m),
                 .tlu_inst_vld_m  (tlu_inst_vld_nq_m),
         // .exu_lsu_ldst_va_e (exu_lsu_ldst_va_e[`TLU_ASI_VA_WIDTH-1:0]),
         // .exu_lsu_ldst_va_e (exu_lsu_ldst_va_e[`TLU_ASI_VA_WIDTH-1:0]),
         .lsu_tlu_ldst_va_m (lsu_tlu_ldst_va_m[10-1:0]),
         .lsu_tlu_ldst_va_m (lsu_tlu_ldst_va_m[`TLU_ASI_VA_WIDTH-1:0]),
         .tlu_asi_queue_data_g (lsu_tlu_rs3_data_g[13:6]),
         .tlu_asi_queue_data_g (lsu_tlu_rs3_data_g[`TLU_ASI_QUE_HI:`TLU_ASI_QUE_LO]),
             // .tlu_exu_agp_tid           (tlu_exu_agp_tid[1:0]),
             // .tlu_exu_agp_tid           (tlu_exu_agp_tid[1:0]),
             // .tlu_agp_tid_g     (tlu_agp_tid_g[1:0]),
             // .tlu_agp_tid_g     (tlu_agp_tid_g[1:0]),
             .tlu_agp_tid_w2       (tlu_agp_tid_w2[1:0]),
             .tlu_agp_tid_w2       (tlu_agp_tid_w2[1:0]),
         .se(se),
         .se(se),
         // .tlu_rst_l (tlu_rst_l),
         // .tlu_rst_l (tlu_rst_l),
Line 2414... Line 1744...
                 .si (scan1_3),
                 .si (scan1_3),
                     .grst_l    (grst_l),
                     .grst_l    (grst_l),
                     .arst_l    (arst_l),
                     .arst_l    (arst_l),
                 .ifu_tlu_imiss_e       (ifu_tlu_imiss_e),
                 .ifu_tlu_imiss_e       (ifu_tlu_imiss_e),
                 .ifu_tlu_immu_miss_m   (ifu_tlu_immu_miss_m),
                 .ifu_tlu_immu_miss_m   (ifu_tlu_immu_miss_m),
                 .tlu_hpstate_enb  (local_hpstate_enb[4-1:0]),
                 .tlu_hpstate_enb  (local_hpstate_enb[`TLU_THRD_NUM-1:0]),
                 .ifu_tlu_l2imiss       (ifu_tlu_l2imiss[4-1:0]),
                 .ifu_tlu_l2imiss       (ifu_tlu_l2imiss[`TLU_THRD_NUM-1:0]),
                     .tlu_thread_inst_vld_g     (tlu_thread_inst_vld_g[4-1:0]),
                     .tlu_thread_inst_vld_g     (tlu_thread_inst_vld_g[`TLU_THRD_NUM-1:0]),
                 .ifu_tlu_thrid_d       (ifu_tlu_thrid_d[1:0]),
                 .ifu_tlu_thrid_d       (ifu_tlu_thrid_d[1:0]),
                 .exu_tlu_wsr_data_m    (exu_tlu_wsr_data_m[64-1:0]),
                 .exu_tlu_wsr_data_m    (exu_tlu_wsr_data_m[`TLU_ASR_DATA_WIDTH-1:0]),
                 .tlu_full_flush_pipe_w2 (tlu_full_flush_pipe_w2),
                 .tlu_full_flush_pipe_w2 (tlu_full_flush_pipe_w2),
                 .tlu_tcc_inst_w         (tlu_tcc_inst_w),
                 .tlu_tcc_inst_w         (tlu_tcc_inst_w),
                 .ifu_tlu_flush_fd_w      (ifu_tlu_flush_fd3_w),
                 .ifu_tlu_flush_fd_w      (ifu_tlu_flush_fd3_w),
                 .ifu_tlu_sraddr_d      (ifu_tlu_sraddr_d_v2[7-1:0]),
                 .ifu_tlu_sraddr_d      (ifu_tlu_sraddr_d_v2[`TLU_ASR_ADDR_WIDTH-1:0]),
                 .ifu_tlu_rsr_inst_d    (ifu_tlu_rsr_inst_d),
                 .ifu_tlu_rsr_inst_d    (ifu_tlu_rsr_inst_d),
                 // .ifu_tlu_wsr_inst_d    (ifu_tlu_wsr_inst_d), 
                 // .ifu_tlu_wsr_inst_d    (ifu_tlu_wsr_inst_d), 
                 .lsu_tlu_wsr_inst_e    (lsu_tlu_wsr_inst_e),
                 .lsu_tlu_wsr_inst_e    (lsu_tlu_wsr_inst_e),
                     .tlu_wsr_inst_nq_g         (tlu_wsr_inst_nq_g),
                     .tlu_wsr_inst_nq_g         (tlu_wsr_inst_nq_g),
                 .tlu_pib_rsr_data_e    (tlu_pib_rsr_data_e[64-1:0]),
                 .tlu_pib_rsr_data_e    (tlu_pib_rsr_data_e[`TLU_ASR_DATA_WIDTH-1:0]),
                 .tlu_pstate_priv       (local_pstate_priv[4-1:0]),
                 .tlu_pstate_priv       (local_pstate_priv[`TLU_THRD_NUM-1:0]),
                     .tlu_hpstate_priv      (local_hpstate_priv[4-1:0]),
                     .tlu_hpstate_priv      (local_hpstate_priv[`TLU_THRD_NUM-1:0]),
                     .tlu_thread_wsel_g         (tlu_thread_wsel_g[4-1:0]),
                     .tlu_thread_wsel_g         (tlu_thread_wsel_g[`TLU_THRD_NUM-1:0]),
                 .ffu_tlu_fpu_tid       (ffu_tlu_fpu_tid[1:0]),
                 .ffu_tlu_fpu_tid       (ffu_tlu_fpu_tid[1:0]),
                 .ffu_tlu_fpu_cmplt     (ffu_tlu_fpu_cmplt),
                 .ffu_tlu_fpu_cmplt     (ffu_tlu_fpu_cmplt),
                 .lsu_tlu_dmmu_miss_g   (lsu_tlu_dmmu_miss_g),
                 .lsu_tlu_dmmu_miss_g   (lsu_tlu_dmmu_miss_g),
                 .lsu_tlu_dcache_miss_w2(lsu_tlu_dcache_miss_w2[4-1:0]),
                 .lsu_tlu_dcache_miss_w2(lsu_tlu_dcache_miss_w2[`TLU_THRD_NUM-1:0]),
                 .lsu_tlu_l2_dmiss       (lsu_tlu_l2_dmiss[4-1:0]),
                 .lsu_tlu_l2_dmiss       (lsu_tlu_l2_dmiss[`TLU_THRD_NUM-1:0]),
                 .lsu_tlu_stb_full_w2   (lsu_tlu_stb_full_w2[4-1:0]),
                 .lsu_tlu_stb_full_w2   (lsu_tlu_stb_full_w2[`TLU_THRD_NUM-1:0]),
                 .tlu_wsr_data_w        (tlu_wsr_data_w[64-1:0]),
                 .tlu_wsr_data_w        (tlu_wsr_data_w[`TLU_ASR_DATA_WIDTH-1:0]),
                 // modified for timing fixes
                 // modified for timing fixes
                     // .pib_priv_act_trap     (pib_priv_act_trap[`TLU_THRD_NUM-1:0]), 
                     // .pib_priv_act_trap     (pib_priv_act_trap[`TLU_THRD_NUM-1:0]), 
                     .pib_priv_act_trap_m   (pib_priv_act_trap_m[4-1:0]),
                     .pib_priv_act_trap_m   (pib_priv_act_trap_m[`TLU_THRD_NUM-1:0]),
                 // .pib_pic_wrap        (pib_pic_wrap[`TLU_THRD_NUM-1:0]), 
                 // .pib_pic_wrap        (pib_pic_wrap[`TLU_THRD_NUM-1:0]), 
                 .pib_picl_wrap          (pib_picl_wrap[4-1:0]),
                 .pib_picl_wrap          (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
                 .pich_wrap_flg          (pich_wrap_flg[4-1:0]),
                 .pich_wrap_flg          (pich_wrap_flg[`TLU_THRD_NUM-1:0]),
                 .pich_onebelow_flg      (pich_onebelow_flg[4-1:0]),
                 .pich_onebelow_flg      (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
                 .pich_twobelow_flg      (pich_twobelow_flg[4-1:0]),
                 .pich_twobelow_flg      (pich_twobelow_flg[`TLU_THRD_NUM-1:0]),
                 .tlu_pic_onebelow_e     (tlu_pic_onebelow_e),
                 .tlu_pic_onebelow_e     (tlu_pic_onebelow_e),
                 .tlu_pic_twobelow_e     (tlu_pic_twobelow_e),
                 .tlu_pic_twobelow_e     (tlu_pic_twobelow_e),
                 // modified for bug 5436: Niagara 2.0
                 // modified for bug 5436: Niagara 2.0
                     .tlu_pcr_ut            (tlu_pcr_ut[4-1:0]),
                     .tlu_pcr_ut            (tlu_pcr_ut[`TLU_THRD_NUM-1:0]),
                     .tlu_pcr_st            (tlu_pcr_st[4-1:0]),
                     .tlu_pcr_st            (tlu_pcr_st[`TLU_THRD_NUM-1:0]),
                 //.tlu_pcr_ut_e            (tlu_pcr_ut_e), 
                 //.tlu_pcr_ut_e            (tlu_pcr_ut_e), 
                 //.tlu_pcr_st_e            (tlu_pcr_st_e), 
                 //.tlu_pcr_st_e            (tlu_pcr_st_e), 
                 .tlu_pic_wrap_e         (tlu_pic_wrap_e),
                 .tlu_pic_wrap_e         (tlu_pic_wrap_e),
                 // .pich_threebelow_flg      (pich_threebelow_flg[`TLU_THRD_NUM-1:0]), 
                 // .pich_threebelow_flg      (pich_threebelow_flg[`TLU_THRD_NUM-1:0]), 
                 // .tlu_que_trap_sel_m  (tlu_que_trap_sel_m[`QUE_TRAP_SEL_WIDTH-1:0]), 
                 // .tlu_que_trap_sel_m  (tlu_que_trap_sel_m[`QUE_TRAP_SEL_WIDTH-1:0]), 
Line 2487... Line 1817...
                 // output
                 // output
                 .dout    (tlu_scpd_asi_rdata_g[79:0]),
                 .dout    (tlu_scpd_asi_rdata_g[79:0]),
                 .so      (short_scan0_6),
                 .so      (short_scan0_6),
                 // intput
                 // intput
                 .din     ({{16{1'b0}}, // unused inputs
                 .din     ({{16{1'b0}}, // unused inputs
                            lsu_tlu_rs3_data_g[64-1:0]}),
                            lsu_tlu_rs3_data_g[`TLU_SCPD_DATA_WIDTH-1:0]}),
                 .rd_en   (tlu_scpd_rd_vld_m),
                 .rd_en   (tlu_scpd_rd_vld_m),
                 .wr_en   (tlu_scpd_wr_vld_g),
                 .wr_en   (tlu_scpd_wr_vld_g),
                 .rd_adr  (tlu_scpd_rd_addr_m[5-1:0]),
                 .rd_adr  (tlu_scpd_rd_addr_m[`SCPD_RW_ADDR_WIDTH-1:0]),
                 .wr_adr  (tlu_scpd_wr_addr_g[5-1:0]),
                 .wr_adr  (tlu_scpd_wr_addr_g[`SCPD_RW_ADDR_WIDTH-1:0]),
                 .nib_wr_en (20'hfffff),
                 .nib_wr_en (20'hfffff),
                 .reset_l (arst_l),
                 .reset_l (arst_l),
                 .rst_tri_en (mem_write_disable),
                 .rst_tri_en (mem_write_disable),
                 .sehold  (sehold),
                 .sehold  (sehold),
                 .se      (se),
                 .se      (se),

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