URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] [tests/] [boot/] [boot.s] - Diff between revs 77 and 87

Rev 77	Rev 87
Line 318...	Line 318...
`stxa %l1, [%g0] (69) !!Load/Store Unit Control Register=1100 (aka "stxa %l1, [%g0] ASI_LSU_CTL_REG")`	`stxa %l1, [%g0] (69) !!Load/Store Unit Control Register=1100 (aka "stxa %l1, [%g0] ASI_LSU_CTL_REG")`
`!!l''effetto dovrebbe essere:`	`!!l''effetto dovrebbe essere:`
`!! .dm=1 (DMMU ENABLE)`	`!! .dm=1 (DMMU ENABLE)`
`!! .Im=1 (IMMU ENABLE)`	`!! .Im=1 (IMMU ENABLE)`
`!! .dc=0 (dcache not enabled)`	`!! .dc=0 (dcache not enabled)`
`\|\| .ic=0 (icache not enabled)`	`!! .ic=0 (icache not enabled)`
`!!setx HPriv_Reset_Handler, %g1, %g2`	`!!setx HPriv_Reset_Handler, %g1, %g2`
`!! this instructions expands as`	`!! this instructions expands as`
`sethi %hi(0), %g1`	`sethi %hi(0), %g1`
`sethi %hi(0x144000), %g2`	`sethi %hi(0x144000), %g2`
`mov %g1, %g1`	`mov %g1, %g1`