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Line 19... |
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# Remove synthetized files -- if any
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# Remove synthetized files -- if any
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find $DST_DIR -name "*_flat.v" -exec rm -f {} \;
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find $DST_DIR -name "*_flat.v" -exec rm -f {} \;
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find $DST_DIR -name "*_flat_nc.v" -exec rm -f {} \;
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find $DST_DIR -name "*_flat_nc.v" -exec rm -f {} \;
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find $DST_DIR -name "*_hier.v" -exec rm -f {} \;
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find $DST_DIR -name "*_hier.v" -exec rm -f {} \;
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rm -f $DST_DIR/bw_r_l2t.v
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# Clean the files by substituting the $error System Task
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# Remove unused files (according to liuyadong)
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cd $DST_DIR
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rm bw_r_l2t.v bw_r_cm16x40.v bw_r_cm16x40b.v bw_r_dcm.v bw_r_efa.v bw_r_l2d.v bw_r_l2d_32k.v \
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bw_r_l2d_rep_bot.v bw_r_l2d_rep_top.v bw_r_rf16x128d.v bw_r_rf32x108.v bw_rf_16x65.v bw_rf_16x81.v \
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bw_clk_cclk_hdr_48x.v bw_clk_cclk_hdr_64x.v bw_clk_cclk_inv_128x.v bw_clk_cclk_inv_48x.v \
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bw_clk_cclk_inv_64x.v bw_clk_cclk_inv_96x.v bw_clk_cclk_scanlasr_2x.v bw_clk_cclk_sync.v \
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bw_clk_gclk_center_3inv.v bw_clk_gclk_inv_192x.v bw_clk_gclk_inv_224x.v bw_clk_gclk_inv_288x.v \
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bw_clk_gclk_inv_r90_192x.v bw_clk_gclk_inv_r90_224x.v bw_clk_gclk_inv_r90_256x.v bw_clk_gclk_sctag_3inv.v \
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bw_clk_gl.v bw_clk_gl_fdbk.v bw_clk_gl_hz.v bw_clk_gl_rstce_rtl.v bw_clk_gl_vrt_all.v flop_rptrs_xa0.v \
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flop_rptrs_xa1.v flop_rptrs_xb0.v flop_rptrs_xb1.v flop_rptrs_xb2.v flop_rptrs_xb3.v flop_rptrs_xc0.v \
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flop_rptrs_xc1.v flop_rptrs_xc2.v flop_rptrs_xc3.v flop_rptrs_xc4.v flop_rptrs_xc5.v flop_rptrs_xc6.v \
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flop_rptrs_xc7.v bw_rng.v cluster_header_ctu.v cluster_header_dup.v cluster_header_sync.v dbl_buf.v \
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sync_pulse_synchronizer.v synchronizer_asr_dup.v ucb_bus_in.v ucb_bus_out.v ucb_flow_2buf.v \
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ucb_flow_jbi.v ucb_flow_spi.v ucb_noflow.v spc_pcx_buf.v
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# Clean the files by substituting the $error System Task and applying defines with Icarus preprocessor
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for file in $DST_DIR/*.v ; do
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for file in $DST_DIR/*.v ; do
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sed -e 's/\$error/\$display/g' $file | sed -e 's/negedge rclk or rst_l/negedge rclk/g' > $DST_DIR/temp.v
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sed -e 's/\$error/\$display/g' $file | sed -e 's/negedge rclk or rst_l/negedge rclk/g' > $DST_DIR/temp.v
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iverilog -E -D FPGA_SYN -D FPGA_SYN_1THREAD -D FPGA_SYN_NO_SPU -I $DST_DIR/include -o$file $DST_DIR/temp.v
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# vpp +include+$DST_DIR/include -D FPGA_SYN -D FPGA_SYN_1THREAD -D FPGA_SYN_NO_SPU $DST_DIR/temp.v > $file
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sed -e 's/\* ========== Copyright Header Begin/\/\* ========== Copyright Header Begin/g' $file | sed -e 's/if (\$time > (4\* ))/if(\$time>2)/g' > $DST_DIR/temp.v
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mv -f $DST_DIR/temp.v $file
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mv -f $DST_DIR/temp.v $file
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done
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done
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# Remove L1 Instruction and Data Caches
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# Disable L1 Instruction and Data Caches
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cp -f $S1_ROOT/tools/src/bw_r_dcd.v $DST_DIR
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cp -f $S1_ROOT/tools/src/bw_r_dcd.v $DST_DIR
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cp -f $S1_ROOT/tools/src/bw_r_icd.v $DST_DIR
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cp -f $S1_ROOT/tools/src/bw_r_icd.v $DST_DIR
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cp -f $S1_ROOT/tools/src/bw_r_idct.v $DST_DIR
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cp -f $S1_ROOT/tools/src/bw_r_idct.v $DST_DIR
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# Hack the SPARC Core to add the external stall input from the bridge
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# Hack the SPARC Core to add the external stall input from the bridge
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