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[/] [s1_core/] [trunk/] [tools/] [src/] [build_dc.cmd] - Diff between revs 7 and 66

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Rev 7 Rev 66
Line 5... Line 5...
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link
uniquify
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/* check_design */
/* check_design */
 
 
create_clock -period 2.0 -name sys_clock_i find(port, "sys_clock_i")
create_clock -period 2.0 -name sys_clock_i find(port, "sys_clock_i")
set_input_delay  1 -max -clock sys_clock_i all_inputs() - find(port, "sys_clock_i")
set_input_delay  -max -clock sys_clock_i 1 all_inputs () find (port, "sys_clock_i")
set_output_delay 1 -max -clock sys_clock_i all_outputs()
set_output_delay 1 -max -clock sys_clock_i all_outputs()
 
 
compile -map_effort high
compile -map_effort high
 
 
write -format db -hierarchy -output s1_top.db
write -output s1_top.db  -format ddc  -hierarchy
write -format verilog -hierarchy -output s1_top.v
write -output s1_top.v  -format verilog  -hierarchy
 
 
report_area > report_area.txt
report_area > report_area.txt
report_timing > report_timing.txt
report_timing > report_timing.txt
report_constraint -all_violators > report_constraint.txt
report_constraint -all_violators > report_constraint.txt
 
 

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