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#
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#
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# Purpose: This makefile builds the final verilator simulation of the
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# Purpose: This makefile builds the final verilator simulation of the
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# zipsystem. Specifically, it builds the final C++ portion
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# zipsystem. Specifically, it builds the final C++ portion
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# of the simulator, and thus the final simulator executable.
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# of the simulator, and thus the final simulator executable.
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#
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#
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# This simulator depends upon the libelf library.
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#
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#
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# Creator: Dan Gisselquist, Ph.D.
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# Creator: Dan Gisselquist, Ph.D.
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# Gisselquist Technology, LLC
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# Gisselquist Technology, LLC
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#
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#
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################################################################################
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################################################################################
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#
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#
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# Copyright (C) 2015, Gisselquist Technology, LLC
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# Copyright (C) 2015,2017, Gisselquist Technology, LLC
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#
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#
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# This program is free software (firmware): you can redistribute it and/or
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# This program is free software (firmware): you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as published
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# modify it under the terms of the GNU General Public License as published
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# by the Free Software Foundation, either version 3 of the License, or (at
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# by the Free Software Foundation, either version 3 of the License, or (at
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# your option) any later version.
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# your option) any later version.
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################################################################################
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################################################################################
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#
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#
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all: zip_sim
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all: zip_sim
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CXX := g++
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CXX := g++
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FLAGS := -Wall -Og -g
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CFLAGS := -Wall -Og -g
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OBJDIR := obj-pc
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SWHOST := ../../sw/host
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SWHOST := ../../sw/host
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RTLD := ../../rtl
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RTLD := ../../rtl
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INCS := -I$(RTLD)/obj_dir/ -I$(RTLD) -I/usr/share/verilator/include \
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RTLOBJD := $(RTLD)/obj_dir
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-I$(SWHOST)
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VERILATOR_ROOT ?= $(shell bash -c 'verilator -V|grep VERILATOR_ROOT | head -1 | sed -e " s/^.*=\s*//"')
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SOURCES := zip_sim.cpp twoc.cpp qspiflashsim.cpp uartsim.cpp
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VROOT := $(VERILATOR_ROOT)
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VLIB := /usr/share/verilator/include/verilated.cpp
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VINCS := -I$(VROOT)/include -I$(VROOT)/include/vltstd
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RAWLIB := $(VLIB) $(RTLD)/obj_dir/Vbusmaster__ALL.a
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INCS := -I$(RTLOBJD) -I$(RTLD) -I$(VROOT)/include -I$(SWHOST) $(VINCS)
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SOURCES := zip_sim.cpp twoc.cpp qspiflashsim.cpp uartsim.cpp zipelf.cpp byteswap.cpp
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VLSRCS := verilated.cpp verilated_vcd_c.cpp
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VLOBJS := $(OBJDIR)/verilated.o $(OBJDIR)/verilated_vcd_c.o
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VLIB := $(addprefix $(VROOT)/include/,$(VLSRCS))
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RAWLIB := $(RTLOBJD)/Vbusmaster__ALL.a
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OBJECTS := $(addprefix $(OBJDIR)/,$(subst .cpp,.o,$(SOURCES) $(VLSRCS)))
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LIBS := $(RAWLIB) -lelf
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LIBS := $(RAWLIB) -lelf
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TESTF := $(ZASM)/z.out
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TESTF := $(ZASM)/z.out
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DHRYSTONEF := ../asm/zipdhry.z
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DHRYSTONEF := ../asm/zipdhry.z
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zip_sim: $(SOURCES) $(RAWLIB) testb.h
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$(OBJDIR)/%.o: %.cpp
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$(CXX) $(FLAGS) $(INCS) $(SOURCES) $(LIBS) -o $@
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$(CXX) $(CFLAGS) $(INCS) -c $< -o $@
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# .PHONY: stest
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$(OBJDIR)/%.o: $(VROOT)/include/%.cpp
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# stest: zippy_tb
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$(CXX) $(CFLAGS) $(INCS) -c $< -o $@
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# ./zippy_tb -s $(TESTF)
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zip_sim: $(OBJECTS)
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# .PHONY: itest
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$(CXX) $(CFLAGS) $(INCS) $(OBJECTS) $(LIBS) -o $@
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# itest: zippy_tb
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# ./zippy_tb $(TESTF)
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# .PHONY: test
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# test: zippy_tb stest
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define build-depends
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# ./zippy_tb -a $(TESTF)
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@echo "Building dependencies"
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@$(CXX) $(CFLAGS) $(INCS) -MM $(VLIB) $(SOURCES) > $(OBJDIR)/xdepends.txt
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# .PHONY: dhrystone
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@sed -e 's/^.*.o: /$(OBJDIR)\/&/' < $(OBJDIR)/xdepends.txt > $(OBJDIR)/depends.txt
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# dhrystone: zippy_tb
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@rm $(OBJDIR)/xdepends.txt
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# ./zippy_tb -a $(DHRYSTONEF)
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endef
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tags: $(VLIB) $(SOURCES)
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@ctags $(SOURCES) $(VLIB)
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.PHONY: depends
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depends: tags $(OBJDIR)/
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$(build-depends)
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$(OBJDIR)/:
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@bash -c "if [ ! -e $(OBJDIR) ]; then mkdir -p $(OBJDIR)/; fi"
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$(OBJDIR)/depends.txt: $(OBJDIR)/ depends
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.PHONY: clean
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.PHONY: clean
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clean:
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clean:
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rm ./zip_sim
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rm -rf $(OBJDIR)/
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rm -f ./zip_sim
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-include $(OBJDIR)/depends.txt
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