| Line 1... |
Line 1... |
///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
|
//
|
//
|
//
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//
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// Filename: spiflashsim.cpp
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// Filename: spiflashsim.cpp
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//
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//
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// Project: Wishbone Controlled Quad SPI Flash Controller
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// Project: Wishbone Controlled Quad SPI Flash Controller
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| Line 12... |
Line 12... |
//
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//
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// This simulator is useful for testing in a Verilator/C++
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// This simulator is useful for testing in a Verilator/C++
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// environment, where this simulator can be used in place of
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// environment, where this simulator can be used in place of
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// the actual hardware.
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// the actual hardware.
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//
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//
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// Creator: Dan Gisselquist
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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///////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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// Copyright (C) 2015,2017, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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| Line 30... |
Line 30... |
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory. Run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include <assert.h>
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#include <assert.h>
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#include <stdlib.h>
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#include <stdlib.h>
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|
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#include "regdefs.h"
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#include "regdefs.h"
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#include "qspiflashsim.h"
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#include "qspiflashsim.h"
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|
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#define MEMBYTES (FLASHWORDS<<2)
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#define MEMBYTES (1<<24)
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#define MEMMASK ((MEMBYTES)-1)
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|
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static const unsigned DEVID = 0x0115,
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static const unsigned DEVID = 0x0115,
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DEVESD = 0x014,
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DEVESD = 0x014,
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MICROSECONDS = 100,
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MICROSECONDS = 100,
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MILLISECONDS = MICROSECONDS * 1000,
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MILLISECONDS = MICROSECONDS * 1000,
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| Line 73... |
Line 76... |
m_state = QSPIF_IDLE;
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m_state = QSPIF_IDLE;
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m_last_sck = 1;
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m_last_sck = 1;
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m_write_count = 0;
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m_write_count = 0;
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m_ireg = m_oreg = 0;
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m_ireg = m_oreg = 0;
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m_sreg = 0x01c;
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m_sreg = 0x01c;
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m_creg = 0x001; // Iinitial creg on delivery
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m_creg = 0x003; // Initial creg on delivery--assumes quad mode enabled
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m_quad_mode = false;
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m_quad_mode = false;
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m_mode_byte = 0;
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m_mode_byte = 0;
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|
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memset(m_mem, 0x0ff, MEMBYTES);
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memset(m_mem, 0x0ff, MEMBYTES);
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}
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}
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|
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void QSPIFLASHSIM::load(const unsigned addr, const char *fname) {
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void QSPIFLASHSIM::load(const unsigned addr, const char *fname) {
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FILE *fp;
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FILE *fp;
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int nr = 0;
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size_t len;
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size_t len;
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|
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if (addr >= MEMBYTES)
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if (addr >= MEMBYTES)
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return;
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return;
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len = MEMBYTES-addr*4;
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len = MEMBYTES-addr*4;
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|
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if (NULL != (fp = fopen(fname, "r"))) {
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if (NULL != (fp = fopen(fname, "r"))) {
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int nr = 0;
|
|
nr = fread(&m_mem[addr], sizeof(char), len, fp);
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nr = fread(&m_mem[addr], sizeof(char), len, fp);
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fclose(fp);
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fclose(fp);
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if (nr == 0) {
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if (nr == 0) {
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fprintf(stderr, "SPI-FLASH: Could not read %s\n", fname);
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fprintf(stderr, "SPI-FLASH: Could not read %s\n", fname);
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perror("O/S Err:");
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perror("O/S Err:");
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| Line 102... |
Line 105... |
fprintf(stderr, "SPI-FLASH: Could not open %s\n", fname);
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fprintf(stderr, "SPI-FLASH: Could not open %s\n", fname);
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perror("O/S Err:");
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perror("O/S Err:");
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}
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}
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}
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}
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|
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void QSPIFLASHSIM::write(const unsigned addr, const unsigned len, const uint32_t *buf) {
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void QSPIFLASHSIM::write(const unsigned offset, const unsigned len, const char *buf) {
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char *ptr;
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uint32_t moff = (offset & (MEMBYTES-1));
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if ((addr+len < SPIFLASH)||(addr >= SPIFLASH+MEMBYTES/4))
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return;
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memcpy(&m_mem[moff], buf, len);
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printf("FLASH: Copying into memory at S6Add4 %08x, my addr %08x, %d values\n",
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addr, (addr-SPIFLASH)<<2, len<<2);
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ptr = &m_mem[(addr-SPIFLASH)<<2];
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memcpy(ptr, buf, len<<2);
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printf("%02x %02x %02x %02x\n", ptr[0]&0x0ff, ptr[1]&0x0ff, ptr[2]&0x0ff, ptr[3]&0x0ff);
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}
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}
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|
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#define QOREG(A) m_oreg = ((m_oreg & (~0x0ff))|(A&0x0ff))
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#define QOREG(A) m_oreg = ((m_oreg & (~0x0ff))|(A&0x0ff))
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|
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int QSPIFLASHSIM::operator()(const int csn, const int sck, const int dat) {
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int QSPIFLASHSIM::operator()(const int csn, const int sck, const int dat) {
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| Line 228... |
Line 226... |
// printf("PROCESS, COUNT = %d, IREG = %02x\n", m_count, m_ireg);
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// printf("PROCESS, COUNT = %d, IREG = %02x\n", m_count, m_ireg);
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if (m_state == QSPIF_QUAD_READ_IDLE) {
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if (m_state == QSPIF_QUAD_READ_IDLE) {
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assert(m_quad_mode);
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assert(m_quad_mode);
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if (m_count == 24) {
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if (m_count == 24) {
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if (m_debug) printf("QSPI: Entering from Quad-Read Idle to Quad-Read\n");
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if (m_debug) printf("QSPI: Entering from Quad-Read Idle to Quad-Read\n");
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if (m_debug) printf("QSPI: QI/O Idle Addr = %02x\n", m_ireg&0x0ffffff);
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if (m_debug) printf("QSPI: QI/O Idle Addr = %02x\n", m_ireg&MEMMASK);
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m_addr = (m_ireg) & 0x0ffffff;
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m_addr = (m_ireg) & MEMMASK;
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assert((m_addr & 0xfc00000)==0);
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assert((m_addr & (~(MEMMASK)))==0);
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m_state = QSPIF_QUAD_READ;
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m_state = QSPIF_QUAD_READ;
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} m_oreg = 0;
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} m_oreg = 0;
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} else if (m_count == 8) {
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} else if (m_count == 8) {
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QOREG(0x0a5);
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QOREG(0x0a5);
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// printf("SFLASH-CMD = %02x\n", m_ireg & 0x0ff);
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// printf("SFLASH-CMD = %02x\n", m_ireg & 0x0ff);
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| Line 372... |
Line 370... |
case QSPIF_CLSR:
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case QSPIF_CLSR:
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assert(0 && "Too many clocks for CLSR command!!\n");
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assert(0 && "Too many clocks for CLSR command!!\n");
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break;
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break;
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case QSPIF_RDID:
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case QSPIF_RDID:
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if (m_count == 32) {
|
if (m_count == 32) {
|
m_addr = m_ireg & 0x0ffffff;
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m_addr = m_ireg & MEMMASK;
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if (m_debug) printf("READID, ADDR = %08x\n", m_addr);
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if (m_debug) printf("READID, ADDR = %08x\n", m_addr);
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QOREG((DEVID>>8));
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QOREG((DEVID>>8));
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if (m_debug) printf("QSPI: READING ID, %02x\n", (DEVID>>8)&0x0ff);
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if (m_debug) printf("QSPI: READING ID, %02x\n", (DEVID>>8)&0x0ff);
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} else if (m_count > 32) {
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} else if (m_count > 32) {
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if (((m_count-32)>>3)&1)
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if (((m_count-32)>>3)&1)
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| Line 396... |
Line 394... |
if (m_debug) printf("Read CREG = %02x\n", m_creg);
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if (m_debug) printf("Read CREG = %02x\n", m_creg);
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QOREG(m_creg);
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QOREG(m_creg);
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break;
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break;
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case QSPIF_FAST_READ:
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case QSPIF_FAST_READ:
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if (m_count == 32) {
|
if (m_count == 32) {
|
m_addr = m_ireg & 0x0ffffff;
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m_addr = m_ireg & MEMMASK;
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if (m_debug) printf("FAST READ, ADDR = %08x\n", m_addr);
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if (m_debug) printf("FAST READ, ADDR = %08x\n", m_addr);
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QOREG(0x0c3);
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QOREG(0x0c3);
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assert((m_addr & 0xfc00000)==0);
|
if (m_addr & (~(MEMMASK))) {
|
|
printf("QSPI: ADDR = %08x ? !!\n", m_addr);
|
|
} assert((m_addr & (~(MEMMASK)))==0);
|
} else if ((m_count >= 40)&&(0 == (m_sreg&0x01))) {
|
} else if ((m_count >= 40)&&(0 == (m_sreg&0x01))) {
|
//if (m_count == 40)
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|
//printf("DUMMY BYTE COMPLETE ...\n");
|
|
QOREG(m_mem[m_addr++]);
|
QOREG(m_mem[m_addr++]);
|
// if (m_debug) printf("SPIF[%08x] = %02x\n", m_addr-1, m_oreg);
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if (m_debug) printf("SPIF[%08x] = %02x\n", m_addr-1, m_oreg);
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} else m_oreg = 0;
|
} else m_oreg = 0;
|
break;
|
break;
|
case QSPIF_QUAD_READ_CMD:
|
case QSPIF_QUAD_READ_CMD:
|
// The command to go into quad read mode took 8 bits
|
// The command to go into quad read mode took 8 bits
|
// that changes the timings, else we'd use quad_Read
|
// that changes the timings, else we'd use quad_Read
|
// below
|
// below
|
if (m_count == 32) {
|
if (m_count == 32) {
|
m_addr = m_ireg & 0x0ffffff;
|
m_addr = m_ireg & MEMMASK;
|
// printf("FAST READ, ADDR = %08x\n", m_addr);
|
if (m_debug) printf("QSPI: QUAD READ, ADDR = %06x\n", m_addr);
|
// printf("QSPI: QUAD READ, ADDR = %06x\n", m_addr);
|
assert((m_addr & (~(MEMMASK)))==0);
|
assert((m_addr & 0xfc00000)==0);
|
|
} else if (m_count == 32+24) {
|
} else if (m_count == 32+24) {
|
m_mode_byte = (m_ireg>>16) & 0x0ff;
|
m_mode_byte = (m_ireg>>16) & 0x0ff;
|
// printf("QSPI: MODE BYTE = %02x\n", m_mode_byte);
|
if (m_debug) printf("QSPI: MODE BYTE = %02x\n", m_mode_byte);
|
|
// Send the first byte in the response ... since it's time to start sending bytes
|
|
QOREG(m_mem[m_addr++]);
|
} else if ((m_count > 32+24)&&(0 == (m_sreg&0x01))) {
|
} else if ((m_count > 32+24)&&(0 == (m_sreg&0x01))) {
|
QOREG(m_mem[m_addr++]);
|
QOREG(m_mem[m_addr++]);
|
// printf("QSPIF[%08x]/QR = %02x\n",
|
if (m_debug) printf("QSPIF[%08x]/QR = %02x\n",
|
// m_addr-1, m_oreg);
|
m_addr-1, m_oreg);
|
} else m_oreg = 0;
|
} else m_oreg = 0;
|
break;
|
break;
|
case QSPIF_QUAD_READ:
|
case QSPIF_QUAD_READ:
|
if (m_count == 32) {
|
if (m_count == 32) {
|
m_mode_byte = (m_ireg & 0x0ff);
|
m_mode_byte = (m_ireg & 0x0ff);
|
// printf("QSPI/QR: MODE BYTE = %02x\n", m_mode_byte);
|
// printf("QSPI/QR: MODE BYTE = %02x\n", m_mode_byte);
|
} else if ((m_count >= 32+16)&&(0 == (m_sreg&0x01))) {
|
} else if ((m_count >= 32+16)&&(0 == (m_sreg&0x01))) {
|
QOREG(m_mem[m_addr++]);
|
QOREG(m_mem[m_addr++]);
|
// printf("QSPIF[%08x]/QR = %02x\n", m_addr-1, m_oreg & 0x0ff);
|
if (m_debug) printf("QSPIF[%08x]/QR = %02x\n", m_addr-1, m_oreg & 0x0ff);
|
} else m_oreg = 0;
|
} else m_oreg = 0;
|
break;
|
break;
|
case QSPIF_PP:
|
case QSPIF_PP:
|
if (m_count == 32) {
|
if (m_count == 32) {
|
m_addr = m_ireg & 0x0ffffff;
|
m_addr = m_ireg & MEMMASK;
|
if (m_debug) printf("QSPI: PAGE-PROGRAM ADDR = %06x\n", m_addr);
|
if (m_debug) printf("QSPI: PAGE-PROGRAM ADDR = %06x\n", m_addr);
|
assert((m_addr & 0xfc00000)==0);
|
assert((m_addr & (~(MEMMASK)))==0);
|
// m_page = m_addr >> 8;
|
// m_page = m_addr >> 8;
|
for(int i=0; i<256; i++)
|
for(int i=0; i<256; i++)
|
m_pmem[i] = 0x0ff;
|
m_pmem[i] = 0x0ff;
|
} else if (m_count >= 40) {
|
} else if (m_count >= 40) {
|
m_pmem[m_addr & 0x0ff] = m_ireg & 0x0ff;
|
m_pmem[m_addr & 0x0ff] = m_ireg & 0x0ff;
|
// printf("QSPI: PMEM[%02x] = 0x%02x -> %02x\n", m_addr & 0x0ff, m_ireg & 0x0ff, (m_pmem[(m_addr & 0x0ff)]&0x0ff));
|
// printf("QSPI: PMEM[%02x] = 0x%02x -> %02x\n", m_addr & 0x0ff, m_ireg & 0x0ff, (m_pmem[(m_addr & 0x0ff)]&0x0ff));
|
m_addr = (m_addr & (~0x0ff)) | ((m_addr+1)&0x0ff);
|
m_addr = (m_addr & (~0x0ff)) | ((m_addr+1)&0x0ff);
|
} break;
|
} break;
|
case QSPIF_QPP:
|
case QSPIF_QPP:
|
if (m_count == 32) {
|
if (m_count == 32) {
|
m_addr = m_ireg & 0x0ffffff;
|
m_addr = m_ireg & MEMMASK;
|
m_quad_mode = true;
|
m_quad_mode = true;
|
if (m_debug) printf("QSPI/QR: PAGE-PROGRAM ADDR = %06x\n", m_addr);
|
if (m_debug) printf("QSPI/QR: PAGE-PROGRAM ADDR = %06x\n", m_addr);
|
assert((m_addr & 0xfc00000)==0);
|
assert((m_addr & (~(MEMMASK)))==0);
|
// m_page = m_addr >> 8;
|
// m_page = m_addr >> 8;
|
for(int i=0; i<256; i++)
|
for(int i=0; i<256; i++)
|
m_pmem[i] = 0x0ff;
|
m_pmem[i] = 0x0ff;
|
} else if (m_count >= 40) {
|
} else if (m_count >= 40) {
|
m_pmem[m_addr & 0x0ff] = m_ireg & 0x0ff;
|
m_pmem[m_addr & 0x0ff] = m_ireg & 0x0ff;
|
| Line 465... |
Line 464... |
} break;
|
} break;
|
case QSPIF_SECTOR_ERASE:
|
case QSPIF_SECTOR_ERASE:
|
if (m_count == 32) {
|
if (m_count == 32) {
|
m_addr = m_ireg & 0x0ffc000;
|
m_addr = m_ireg & 0x0ffc000;
|
if (m_debug) printf("SECTOR_ERASE ADDRESS = %08x\n", m_addr);
|
if (m_debug) printf("SECTOR_ERASE ADDRESS = %08x\n", m_addr);
|
assert((m_addr & 0xfc00000)==0);
|
assert((m_addr & (~(MEMMASK)))==0);
|
} break;
|
} break;
|
case QSPIF_RELEASE:
|
case QSPIF_RELEASE:
|
if (m_count >= 32) {
|
if (m_count >= 32) {
|
QOREG(DEVESD);
|
QOREG(DEVESD);
|
} break;
|
} break;
|
