URL
https://opencores.org/ocsvn/s6soc/s6soc/trunk
[/] [s6soc/] [trunk/] [sw/] [dev/] [cmod.ld] - Diff between revs 45 and 53
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Rev 45 |
Rev 53 |
Line 36... |
Line 36... |
{
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{
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blkram (wx) : ORIGIN = 0x0004000, LENGTH = 0x0004000
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blkram (wx) : ORIGIN = 0x0004000, LENGTH = 0x0004000
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flash (rx) : ORIGIN = 0x1000000, LENGTH = 0x1000000
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flash (rx) : ORIGIN = 0x1000000, LENGTH = 0x1000000
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}
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}
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_flash = ORIGIN(flash);
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_blkram = ORIGIN(blkram);
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_sdram = 0;
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_top_of_stack = ORIGIN(blkram) + LENGTH(blkram) - 4;
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_top_of_stack = ORIGIN(blkram) + LENGTH(blkram) - 4;
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_sdram_image_start = 0;
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_sdram_image_end = 0;
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SECTIONS
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SECTIONS
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{
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{
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. = 0x1200000;
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.rocode 0x1200000 : ALIGN(4) {
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.rocode 0x1200000 : { *(.start) *(.text*)
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_boot_address = .;
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*(.start) *(.boot*)
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*(.text*)
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*(.rodata*)
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*(.rodata*)
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*(.strings*) } > flash
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*(.strings*)
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.data : { *(.fixdata*) *(.data*) *(COMMON*) *(.bss*) } > blkram
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__rocode_alignment = (. + 3) & ~ 3;
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. = __rocode_alignment;
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} > flash
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_kernel_image_start = . ;
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.data : ALIGN_WITH_INPUT {
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*(.kernel*)
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*(.fixdata*)
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*(.data*)
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*(COMMON*)
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_kernel_image_end = . ;
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}> blkram AT> flash
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_blkram_image_end = . ;
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.bss : ALIGN_WITH_INPUT {
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*(.bss*)
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_bss_image_end = . ;
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} > blkram
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_top_of_heap = .;
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_top_of_heap = .;
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}
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}
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