| Line 303... |
Line 303... |
printf(" %-20s 0x%jx\n", "p_align", phdr.p_align);
|
printf(" %-20s 0x%jx\n", "p_align", phdr.p_align);
|
}
|
}
|
|
|
current_section++;
|
current_section++;
|
|
|
r[i]->m_start = phdr.p_vaddr;
|
r[i]->m_start = phdr.p_paddr;
|
r[i]->m_len = phdr.p_filesz/ sizeof(FPGA::BUSW);
|
r[i]->m_len = phdr.p_filesz/ sizeof(FPGA::BUSW);
|
|
|
current_offset += phdr.p_memsz + sizeof(SECTION);
|
current_offset += phdr.p_memsz + sizeof(SECTION);
|
|
|
// Now, let's read in our section ...
|
// Now, let's read in our section ...
|
| Line 347... |
Line 347... |
"\t-h\tDisplay this usage statement\n");
|
"\t-h\tDisplay this usage statement\n");
|
}
|
}
|
|
|
int main(int argc, char **argv) {
|
int main(int argc, char **argv) {
|
int skp=0;
|
int skp=0;
|
bool permit_raw_files = false;
|
bool permit_raw_files = false, debug_only = false;
|
unsigned entry = RAMBASE;
|
unsigned entry = RAMBASE;
|
FLASHDRVR *flash = NULL;
|
FLASHDRVR *flash = NULL;
|
const char *bitfile = NULL, *altbitfile = NULL;
|
const char *bitfile = NULL, *altbitfile = NULL;
|
|
|
if (argc < 2) {
|
if (argc < 2) {
|
| Line 361... |
Line 361... |
|
|
skp=1;
|
skp=1;
|
for(int argn=0; argn<argc-skp; argn++) {
|
for(int argn=0; argn<argc-skp; argn++) {
|
if (argv[argn+skp][0] == '-') {
|
if (argv[argn+skp][0] == '-') {
|
switch(argv[argn+skp][1]) {
|
switch(argv[argn+skp][1]) {
|
|
case 'd':
|
|
debug_only = true;
|
|
break;
|
case 'h':
|
case 'h':
|
usage();
|
usage();
|
exit(EXIT_SUCCESS);
|
exit(EXIT_SUCCESS);
|
|
break;
|
case 'r':
|
case 'r':
|
permit_raw_files = true;
|
permit_raw_files = true;
|
break;
|
break;
|
|
default:
|
|
fprintf(stderr, "Unknown option, -%c\n\n",
|
|
argv[argn+skp][0]);
|
|
usage();
|
|
exit(EXIT_FAILURE);
|
|
break;
|
} skp++; argn--;
|
} skp++; argn--;
|
} else { // Check for bit files
|
} else { // Check for bit files
|
int sl = strlen(argv[argn+skp]);
|
int sl = strlen(argv[argn+skp]);
|
if ((sl>4)&&(strcmp(&argv[argn+skp][sl-4],".bit")==0)) {
|
if ((sl>4)&&(strcmp(&argv[argn+skp][sl-4],".bit")==0)) {
|
if (bitfile == NULL)
|
if (bitfile == NULL)
|
| Line 407... |
Line 417... |
DEVBUS::BUSW *fbuf = new DEVBUS::BUSW[FLASHWORDS];
|
DEVBUS::BUSW *fbuf = new DEVBUS::BUSW[FLASHWORDS];
|
|
|
// Set the flash buffer to all ones
|
// Set the flash buffer to all ones
|
memset(fbuf, -1, FLASHWORDS*sizeof(fbuf[0]));
|
memset(fbuf, -1, FLASHWORDS*sizeof(fbuf[0]));
|
|
|
{
|
if (debug_only) {
|
|
m_fpga = NULL;
|
|
} else {
|
char szSel[64];
|
char szSel[64];
|
strcpy(szSel, "SN:210282768825");
|
strcpy(szSel, "SN:210282768825");
|
m_fpga = new FPGA(new DEPPI(szSel));
|
m_fpga = new FPGA(new DEPPI(szSel));
|
}
|
}
|
|
|
flash = new FLASHDRVR(m_fpga);
|
flash = (debug_only)?NULL : new FLASHDRVR(m_fpga);
|
|
|
// First, see if we need to load a bit file
|
// First, see if we need to load a bit file
|
if (bitfile) {
|
if (bitfile) {
|
int len;
|
int len;
|
FILE *fp = fopen(bitfile, "rb");
|
FILE *fp = fopen(bitfile, "rb");
|
| Line 434... |
Line 446... |
assert(fbuf[i] == 0x0ffffffff);
|
assert(fbuf[i] == 0x0ffffffff);
|
} // printf("0x%08x\n", fbuf[4]);
|
} // printf("0x%08x\n", fbuf[4]);
|
assert(fbuf[4] == 0x0665599aa);
|
assert(fbuf[4] == 0x0665599aa);
|
|
|
printf("Loading: %s\n", bitfile);
|
printf("Loading: %s\n", bitfile);
|
if (!flash->write(CONFIG_ADDRESS, len, &fbuf[CONFIG_ADDRESS-SPIFLASH], true)) {
|
if ((flash)&&(!flash->write(CONFIG_ADDRESS, len, &fbuf[CONFIG_ADDRESS-SPIFLASH], true))) {
|
fprintf(stderr, "Could not write primary bitfile\n");
|
fprintf(stderr, "Could not write primary bitfile\n");
|
exit(EXIT_FAILURE);
|
exit(EXIT_FAILURE);
|
}
|
}
|
} if (altbitfile) {
|
} if (altbitfile) {
|
int len;
|
int len;
|
| Line 450... |
Line 462... |
FLASHWORDS-(ALTCONFIG_ADDRESS-SPIFLASH), fp);
|
FLASHWORDS-(ALTCONFIG_ADDRESS-SPIFLASH), fp);
|
assert(len + ALTCONFIG_ADDRESS < RESET_ADDRESS);
|
assert(len + ALTCONFIG_ADDRESS < RESET_ADDRESS);
|
fclose(fp);
|
fclose(fp);
|
printf("Loading: %s\n", altbitfile);
|
printf("Loading: %s\n", altbitfile);
|
|
|
if (!flash->write(ALTCONFIG_ADDRESS, len, &fbuf[ALTCONFIG_ADDRESS-SPIFLASH], true)) {
|
if ((flash)&&(!flash->write(ALTCONFIG_ADDRESS, len, &fbuf[ALTCONFIG_ADDRESS-SPIFLASH], true))) {
|
fprintf(stderr, "Could not write alternate bitfile\n");
|
fprintf(stderr, "Could not write alternate bitfile\n");
|
exit(EXIT_FAILURE);
|
exit(EXIT_FAILURE);
|
}
|
}
|
}
|
}
|
|
|
| Line 517... |
Line 529... |
} memcpy(&fbuf[secp->m_start-SPIFLASH],
|
} memcpy(&fbuf[secp->m_start-SPIFLASH],
|
secp->m_data,
|
secp->m_data,
|
secp->m_len*sizeof(FPGA::BUSW));
|
secp->m_len*sizeof(FPGA::BUSW));
|
}
|
}
|
}
|
}
|
if (!flash->write(startaddr, codelen, &fbuf[startaddr-SPIFLASH], true)) {
|
if ((flash)&&(!flash->write(startaddr, codelen, &fbuf[startaddr-SPIFLASH], true))) {
|
fprintf(stderr, "ERR: Could not write program to flash\n");
|
fprintf(stderr, "ERR: Could not write program to flash\n");
|
exit(EXIT_FAILURE);
|
exit(EXIT_FAILURE);
|
}
|
} else if (!flash)
|
m_fpga->readio(R_VERSION); // Check for bus errors
|
printf("flash->write(%08x, %d, ... );\n", startaddr,
|
|
codelen);
|
|
if (m_fpga) m_fpga->readio(R_VERSION); // Check for bus errors
|
|
|
// Now ... how shall we start this CPU?
|
// Now ... how shall we start this CPU?
|
printf("The CPU should be fully loaded, you may now start\n");
|
printf("The CPU should be fully loaded, you may now start\n");
|
printf("it. To start the CPU, either toggle power or type\n");
|
printf("it. To start the CPU, either toggle power or type\n");
|
printf("%% wbregs fpgagen1 0 \n");
|
printf("%% wbregs fpgagen1 0 \n");
|
| Line 534... |
Line 548... |
} catch(BUSERR a) {
|
} catch(BUSERR a) {
|
fprintf(stderr, "XULA-BUS error: %08x\n", a.addr);
|
fprintf(stderr, "XULA-BUS error: %08x\n", a.addr);
|
exit(-2);
|
exit(-2);
|
}
|
}
|
|
|
delete m_fpga;
|
if (m_fpga) delete m_fpga;
|
|
|
return EXIT_SUCCESS;
|
return EXIT_SUCCESS;
|
}
|
}
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|
