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[/] [sata_controller_core/] [trunk/] [sata2_fifo_v1_00_a/] [hdl/] [vhdl/] [sata_link_layer.vhd] - Diff between revs 5 and 10

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Rev 5 Rev 10
Line 925... Line 925...
    tx_err_next              <= tx_err;
    tx_err_next              <= tx_err;
    replay_buffer_clear_next <= replay_buffer_clear;
    replay_buffer_clear_next <= replay_buffer_clear;
    prim_type_tx_next        <= prim_type_tx;
    prim_type_tx_next        <= prim_type_tx;
    FIS_word_count_next      <= FIS_word_count;
    FIS_word_count_next      <= FIS_word_count;
    tx_sector_count_next     <= tx_sector_count;
    tx_sector_count_next     <= tx_sector_count;
 
    tx_charisk_TX_FRAME      <= '1';
    ---------------------------------------------------------------------------
    ---------------------------------------------------------------------------
    -- Finite State Machine
    -- Finite State Machine
    ---------------------------------------------------------------------------
    ---------------------------------------------------------------------------
    case (tx_frame_curr) is
    case (tx_frame_curr) is
 
 
Line 961... Line 962...
            tx_frame_next  <= send_FIS;
            tx_frame_next  <= send_FIS;
         end if;
         end if;
 
 
     -- x3
     -- x3
     when send_FIS =>
     when send_FIS =>
 
         tx_charisk_TX_FRAME      <= '0';
     --Send FIS data
     --Send FIS data
         prim_type_tx_next <= FIS;
         prim_type_tx_next <= FIS;
         -- ALIGN primitives after 256 DWORDS
         -- ALIGN primitives after 256 DWORDS
         if (align_en_out = '1' or tx_fifo_almost_empty = '1') then
         if (align_en_out = '1' or tx_fifo_almost_empty = '1') then
           FIS_word_count_next  <= FIS_word_count;
           FIS_word_count_next  <= FIS_word_count;
Line 978... Line 980...
            tx_frame_next  <= send_HOLD_ACK;
            tx_frame_next  <= send_HOLD_ACK;
         end if;
         end if;
         -- Transmit buffer empty condition
         -- Transmit buffer empty condition
         if (tx_fifo_almost_empty = '1') then
         if (tx_fifo_almost_empty = '1') then
            if (align_en_out = '0') then
            if (align_en_out = '0') then
 
               tx_charisk_TX_FRAME  <= '1';
               prim_type_tx_next <= HOLD;
               prim_type_tx_next <= HOLD;
               tx_frame_next  <= send_HOLD;
               tx_frame_next  <= send_HOLD;
            end if;
            end if;
         end if;
         end if;
         -- Transmitted sector count
         -- Transmitted sector count
Line 990... Line 993...
         else
         else
            tx_sector_count_next <= tx_sector_count;
            tx_sector_count_next <= tx_sector_count;
         end if;
         end if;
         if ((tx_sector_count >= conv_std_logic_vector(sector_count, 16)) or (FIS_word_count >= FIS_count_value)) then
         if ((tx_sector_count >= conv_std_logic_vector(sector_count, 16)) or (FIS_word_count >= FIS_count_value)) then
            if (align_en_out = '0') then
            if (align_en_out = '0') then
 
               tx_charisk_TX_FRAME      <= '0';
               FIS_word_count_next <= (others => '0');
               FIS_word_count_next <= (others => '0');
               tx_fifo_re_next   <= '1';
               tx_fifo_re_next   <= '1';
               prim_type_tx_next <= FIS;
               prim_type_tx_next <= FIS;
               tx_frame_next  <= send_EOF;
               tx_frame_next  <= send_EOF;
            end if;
            end if;
Line 1076... Line 1080...
   end case;
   end case;
 end process TX_FRAME_LOGIC_PROC;
 end process TX_FRAME_LOGIC_PROC;
 
 
-- ASYNCHRONOUS MUXES
-- ASYNCHRONOUS MUXES
 tx_charisk_RX_FRAME <= '1';
 tx_charisk_RX_FRAME <= '1';
 tx_charisk_TX_FRAME <= '0' when (((tx_frame_curr = send_FIS) and (tx_fifo_almost_empty = '0')) or ((tx_frame_curr=send_FIS) and
 --tx_charisk_TX_FRAME <= '0' when (((tx_frame_curr = send_FIS) and (tx_fifo_almost_empty = '0')) or ((tx_frame_curr=send_FIS) and 
                        (tx_fifo_almost_empty = '1') and (master_fsm_curr = H2D_REG_FIS))) else '1';
        --              (tx_fifo_almost_empty = '1') and (master_fsm_curr = H2D_REG_FIS))) else '1';
 --tx_charisk_TX_FRAME <= '0' when ((tx_frame_curr = send_FIS) and (tx_fifo_almost_empty = '0')) else '1';
 
 --tx_charisk_out      <= '0' when ((tx_frame_curr = send_FIS) or (prim_type_tx = PRIM_SCRM)) else tx_charisk_RX_FRAME when (rx_tx_state_sel = '0') else tx_charisk_TX_FRAME; 
 --tx_charisk_out      <= '0' when ((tx_frame_curr = send_FIS) or (prim_type_tx = PRIM_SCRM)) else tx_charisk_RX_FRAME when (rx_tx_state_sel = '0') else tx_charisk_TX_FRAME; 
 tx_charisk_out      <= tx_charisk_RX_FRAME when (rx_tx_state_sel = '0') else tx_charisk_TX_FRAME;
 tx_charisk_out      <= tx_charisk_RX_FRAME when (rx_tx_state_sel = '0') else tx_charisk_TX_FRAME;
 prim_type           <= prim_type_rx when (rx_tx_state_sel = '0') else prim_type_tx;
 prim_type           <= prim_type_rx when (rx_tx_state_sel = '0') else prim_type_tx;
-- ASYNCHRONOUS MUXES
-- ASYNCHRONOUS MUXES
 
 

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