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[/] [sc2v/] [trunk/] [src/] [sc2v_step1.c] - Diff between revs 16 and 31

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/* -----------------------------------------------------------------------------
/* -----------------------------------------------------------------------------
 *
 *
 *  SystemC to Verilog Translator v0.4
 *  SystemC to Verilog Translator v0.4
 *  Provided by OpenSoc Design
 *  Provided by Universidad Rey Juan Carlos
 *
 *
 *  www.opensocdesign.com
 
 *
 
 * -----------------------------------------------------------------------------
 
 *  This program is free software; you can redistribute it and/or modify
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *  (at your option) any later version.
 *
 *

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