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[/] [sc2v/] [trunk/] [src/] [sc2v_step1.y] - Diff between revs 14 and 15
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Rev 14 |
Rev 15 |
Line 26... |
Line 26... |
#include
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#include
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#include
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#include
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#include "sc2v_step1.h"
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#include "sc2v_step1.h"
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int lineno=1;
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int processfound = 0;
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int processfound = 0;
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int switchfound = 0;
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int switchfound = 0;
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int switchparenthesis[256];
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int switchparenthesis[256];
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int ifdeffound = 0;
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int ifdeffound = 0;
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char *processname, *processname2;
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char *processname, *processname2;
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Line 63... |
Line 64... |
int verilog;
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int verilog;
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int writemethod;
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int writemethod;
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void yyerror (const char *str)
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void yyerror (const char *str)
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{
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{
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fprintf (stderr, "error: %s\n", str);
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fprintf (stderr, "line: %d error: %s\n", lineno, str);
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}
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}
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int yywrap ()
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int yywrap ()
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{
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{
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return 1;
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return 1;
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Line 103... |
Line 104... |
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translate = 1;
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translate = 1;
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verilog = 0;
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verilog = 0;
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writemethod = 0;
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writemethod = 0;
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FILE* yyin = stdin;
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FILE* yyout = stdout;
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yyparse ();
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yyparse ();
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fclose (FILE_WRITES);
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fclose (FILE_WRITES);
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fclose (FILE_DEFINES);
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fclose (FILE_DEFINES);
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fprintf(stderr,"\nDone\n\n");
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fprintf(stderr,"\nDone\n\n");
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Line 1075... |
Line 1078... |
translateoff:
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translateoff:
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TRANSLATEOFF
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TRANSLATEOFF
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{
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{
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defineparenthesis = 0;
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defineparenthesis = 0;
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translate = 0;
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translate = 0;
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fprintf (stderr, "Found Translate off directive \n");
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fprintf (stderr, "line: %d Found Translate off directive \n", lineno);
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};
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};
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translateon:
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translateon:
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TRANSLATEON
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TRANSLATEON
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{
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{
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defineparenthesis = 0;
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defineparenthesis = 0;
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translate = 1;
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translate = 1;
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fprintf (stderr, "Found Translate on directive \n");
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fprintf (stderr, "line: %d Found Translate on directive \n", lineno);
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};
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};
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verilogbegin:
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verilogbegin:
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VERILOGBEGIN
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VERILOGBEGIN
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{
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{
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defineparenthesis = 0;
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defineparenthesis = 0;
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verilog = 1;
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verilog = 1;
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fprintf (stderr, "Found Verilog Begin directive \n");
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fprintf (stderr, "line: %d Found Verilog Begin directive \n", lineno);
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};
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};
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verilogend:
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verilogend:
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VERILOGEND
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VERILOGEND
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{
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{
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defineparenthesis = 0;
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defineparenthesis = 0;
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verilog = 0;
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verilog = 0;
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fprintf (stderr, "Found Verilog End directive \n");
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fprintf (stderr, "line: %d Found Verilog End directive \n", lineno);
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};
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};
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ifdef:
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ifdef:
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PIFDEF
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PIFDEF
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{
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{
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