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https://opencores.org/ocsvn/sc2v/sc2v/trunk
[/] [sc2v/] [trunk/] [src/] [sc2v_step1.y] - Diff between revs 4 and 6
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| Rev 4 |
Rev 6 |
| Line 110... |
Line 110... |
%}
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%}
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%token NUMBER WORD SC_INT SC_UINT BOOL BIGGER LOWER OPENKEY CLOSEKEY WRITE WORD SYMBOL NEWLINE ENUM INCLUDE
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%token NUMBER WORD SC_INT SC_UINT BOOL BIGGER LOWER OPENKEY CLOSEKEY WRITE WORD SYMBOL NEWLINE ENUM INCLUDE
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%token COLON SEMICOLON RANGE OPENPAR CLOSEPAR TWODOUBLEPOINTS OPENCORCH CLOSECORCH SWITCH CASE DEFAULT BREAK
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%token COLON SEMICOLON RANGE OPENPAR CLOSEPAR TWODOUBLEPOINTS OPENCORCH CLOSECORCH SWITCH CASE DEFAULT BREAK
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%token SC_BIGINT SC_BIGUINT HEXA DEFINE READ TRANSLATEOFF TRANSLATEON VERILOGBEGIN VERILOGEND TAB DOLLAR INTCONV
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%token SC_BIGINT SC_BIGUINT HEXA DEFINE READ TRANSLATEOFF TRANSLATEON VERILOGBEGIN VERILOGEND TAB DOLLAR INTCONV
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%token VOID
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%token VOID TTRUE TFALSE
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%token PIFDEF PENDDEF PELSE
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%token PIFDEF PENDDEF PELSE
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%%
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%%
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commands: /* empty */
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commands: /* empty */
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| Line 205... |
Line 205... |
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ifdef
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ifdef
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endif
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endif
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else
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pelse
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ttrue
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tfalse
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;
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;
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voidword:
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voidword:
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| Line 661... |
Line 665... |
regname2 = (char *)malloc(256*sizeof(int));
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regname2 = (char *)malloc(256*sizeof(int));
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}
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}
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if(processfound)
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if(processfound)
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if(openedkeys != switchparenthesis)
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if(openedkeys != switchparenthesis)
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{
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{
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fprintf(file,"\n");
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for(i = 0; i < openedkeys; i++)
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for(i = 0; i < openedkeys; i++)
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fprintf(file," ");
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fprintf(file," ");
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fprintf(file,"begin\n");
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fprintf(file,"begin\n");
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newline = 1;
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newline = 1;
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}
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}
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| Line 937... |
Line 942... |
fprintf(FILE_DEFINES,"`endif");
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fprintf(FILE_DEFINES,"`endif");
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}
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}
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}else if(verilog==1)
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}else if(verilog==1)
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fprintf(file,"#endif");
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fprintf(file,"#endif");
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};
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};
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else:
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pelse:
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PELSE
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PELSE
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{
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{
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if(translate==1&& verilog==0){
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if(translate==1&& verilog==0){
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if(processfound)
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if(processfound)
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{
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{
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| Line 952... |
Line 957... |
fprintf(FILE_DEFINES,"`else");
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fprintf(FILE_DEFINES,"`else");
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}
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}
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}else if(verilog==1)
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}else if(verilog==1)
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fprintf(file,"#else");
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fprintf(file,"#else");
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};
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};
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ttrue:
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TTRUE
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{
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if(translate==1&& verilog==0){
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if(processfound)
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{
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fprintf(file,"1");
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}
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}else if(verilog==1)
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fprintf(file,"1");
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};
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tfalse:
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TFALSE
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{
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if(translate==1&& verilog==0){
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if(processfound)
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{
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fprintf(file,"0");
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}
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}else if(verilog==1)
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fprintf(file,"0");
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};
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