URL https://opencores.org/ocsvn/sd_card_controller/sd_card_controller/trunk

Subversion Repositories sd_card_controller

[/] [sd_card_controller/] [trunk/] [bench/] [verilog/] [sd_data_serial_host_tb.sv] - Diff between revs 8 and 12

Rev 8	Rev 12
Line 268...	Line 268...
`cycles = bytes/4;`	`cycles = bytes/4;`
`while (blocks+1) begin`	`while (blocks+1) begin`
`wait (rd == 1);`	`wait (rd == 1);`
`#(SD_TCLK/2);`	`#(SD_TCLK/2);`
`assert(rd == 1);`	`assert(rd == 1);`
	`//read delay !!!`
	`#(2*SD_TCLK);`
`data_in = fifo_send_data[1%$size(fifo_send_data)];`	`data_in = fifo_send_data[1%$size(fifo_send_data)];`
`for (i=2; i`	`for (i=2; i`
`for (j=0; j<32/width-1; j++) begin`	`for (j=0; j<32/width-1; j++) begin`
`#SD_TCLK;`	`#SD_TCLK;`
	`if (j == 32/width-3)`
	`assert(rd == 1);`
	`else`
`assert(rd == 0);`	`assert(rd == 0);`
`end`	`end`
`#SD_TCLK;`	`#SD_TCLK;`
`assert(rd == 1);`	`assert(rd == 0);`
`data_in = fifo_send_data[i%$size(fifo_send_data)];`	`data_in = fifo_send_data[i%$size(fifo_send_data)];`
`end`	`end`
`#SD_TCLK;`	`#SD_TCLK;`
`assert(rd == 0);`	`assert(rd == 0);`
`data_in = fifo_send_data[0];`	`data_in = fifo_send_data[0];`