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[/] [sd_card_controller/] [trunk/] [rtl/] [verilog/] [sd_controller_wb.v] - Diff between revs 3 and 6

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Rev 3 Rev 6
Line 108... Line 108...
output reg data_int_rst;
output reg data_int_rst;
output reg cmd_int_rst;
output reg cmd_int_rst;
output reg [`BLKCNT_W-1:0]block_count_reg;
output reg [`BLKCNT_W-1:0]block_count_reg;
output reg [31:0] dma_addr_reg;
output reg [31:0] dma_addr_reg;
 
 
`ifdef SUPPLY_VOLTAGE_3_3
parameter voltage_controll_reg  = `SUPPLY_VOLTAGE_mV;
parameter voltage_controll_reg  = 8'b0000_111_1;
 
`elsif SUPPLY_VOLTAGE_3_0
 
parameter voltage_controll_reg  = 8'b0000_110_1;
 
`elsif SUPPLY_VOLTAGE_1_8
 
parameter voltage_controll_reg  = 8'b0000_101_1;
 
`endif
 
parameter capabilies_reg = 16'b0000_0000_0000_0000;
parameter capabilies_reg = 16'b0000_0000_0000_0000;
 
 
always @(posedge wb_clk_i or posedge wb_rst_i)
always @(posedge wb_clk_i or posedge wb_rst_i)
begin
begin
    if (wb_rst_i)begin
    if (wb_rst_i)begin

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