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/*$$HEADER*/
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/******************************************************************************/
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/* */
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/* H E A D E R I N F O R M A T I O N */
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/* */
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/******************************************************************************/
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// Project Name : Development Board Debugger Example
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// File Name : board.h
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// Prepared By : jb
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// Project Start : 2009-01-01
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/*$$COPYRIGHT NOTICE*/
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/******************************************************************************/
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/* */
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/* C O P Y R I G H T N O T I C E */
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/* */
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/******************************************************************************/
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// Copyright (c) ORSoC 2009 All rights reserved.
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// The information in this document is the property of ORSoC.
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// Except as specifically authorized in writing by ORSoC, the receiver of
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// this document shall keep the information contained herein confidential and
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// shall protect the same in whole or in part thereof from disclosure and
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// dissemination to third parties. Disclosure and disseminations to the receiver's
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// employees shall only be made on a strict need to know basis.
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/*$$DESCRIPTION*/
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/******************************************************************************/
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/* */
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/* D E S C R I P T I O N */
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/* */
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/******************************************************************************/
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// This file contains definitions for the FPGA board used.
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/*$$CHANGE HISTORY*/
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/******************************************************************************/
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/* */
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/* C H A N G E H I S T O R Y */
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/* */
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/******************************************************************************/
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// Date Version Description
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//------------------------------------------------------------------------
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// 090101 1.0 First version jb
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/*$$DEFINES*/
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/******************************************************************************/
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/* */
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/* D E F I N E S */
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/* */
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/******************************************************************************/
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/******************************************************************************/
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/* S Y S T E M C L O C K F R E Q . */
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/******************************************************************************/
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#define IN_CLK 25000000 // 25MHz
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/******************************************************************************/
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/* S D R A M */
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/******************************************************************************/
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//#define SDRAM_BASE 0x00000000
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//#define SDRAM_SIZE 0x02000000 // 32-MByte
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//#define SDRAM_END SDRAM_BASE + SDRAM_SIZE - 1
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/******************************************************************************/
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/* G P I O */
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/******************************************************************************/
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// Not present in the current design
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/*
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#define GPIO_BASE 0x9A000000 // General purpose IO base address
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#define RGPIO_IN 0x0 // GPIO input data
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#define RGPIO_OUT 0x4 // GPIO output data
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#define RGPIO_OE 0x8 // GPIO output enable
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#define RGPIO_INTE 0xC // GPIO interrupt enable
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#define RGPIO_PTRIG 0x10 // Type of event that triggers an IRQ
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#define RGPIO_AUX 0x14 //
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#define RGPIO_CTRL 0x18 // GPIO control register
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#define RGPIO_INTS 0x1C // Interupt status
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#define RGPIO_ECLK 0x20 // Enable gpio_eclk to latch RGPIO_IN
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#define RGPIO_NEC 0x24 // Select active edge of gpio_eclk
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*/
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/******************************************************************************/
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/* U A R T */
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/******************************************************************************/
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//#define UART_BAUD_RATE 19200
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#define UART_BAUD_RATE 115200
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#define UART_BASE 0x90000000
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#define UART_IRQ 19
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/******************************************************************************/
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/* SD_CONTROLLER */
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/******************************************************************************/
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#define SD_CONTROLLER_BASE 0xa0000000
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/*$$TYPEDEFS*/
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/******************************************************************************/
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/* */
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/* T Y P E D E F S */
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/* */
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/******************************************************************************/
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#ifdef INCLUDED_FROM_C_FILE
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#define LOAD_INFO_STR
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typedef struct load_info
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{
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unsigned long boardtype; //
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unsigned long decompressed_crc; // Filled in by ext. program for generating SRecord file
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unsigned long compressed_crc; // Filled in by ext. program for generating SRecord file
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unsigned long decompressed_size; // Filled in by ext. program for generating SRecord file
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unsigned long compressed_size; // Filled in by ext. program for generating SRecord file
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unsigned long extra_pad[23]; // Extra padding
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unsigned char boardName[12]; //
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unsigned char caaName[20]; //
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unsigned char caaRev[8]; //
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unsigned char addInfo[16]; //
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} LOAD_INFO;
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typedef unsigned char BYTE; /* 8 bits */
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typedef unsigned short WORD; /* 16 bits */
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typedef unsigned long LONG_WORD; /* 32 bits */
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#endif
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#ifndef REG
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#define REG register
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#endif
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