URL https://opencores.org/ocsvn/sdcard_mass_storage_controller/sdcard_mass_storage_controller/trunk

Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [sw/] [sdc_fifo/] [main.c] - Diff between revs 86 and 87

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Rev 86	Rev 87
Line 61...	Line 61...

`#include "orsocdef.h"`	`#include "orsocdef.h"`
`#include "board.h"`	`#include "board.h"`
`#include "uart.h"`	`#include "uart.h"`
`#include "main.h"`	`#include "main.h"`
	`#define SD_REG(REG) REG32(SD_CONTROLLER_BASE+REG)`
`/$$PRIVATE MACROS/`	`/$$PRIVATE MACROS/`
`/******************************************************************************/`	`/******************************************************************************/`
`/* */`	`/* */`
`/* P R I V A T E M A C R O S */`	`/* P R I V A T E M A C R O S */`
`/* */`	`/* */`
Line 146...	Line 146...





	`//TO do`
	`// Always check if error in repose (CRC, CICE) etc`
	`// Always check for CICM (Command inhibit before senindg)`
	`// Timeout when polling`
	`// Divied into dividing Functions`
	`// Clean up`


`//SDC_DEFINES`
`#define BUSY 0x80`	`#define BUSY 0x80`
`#define CRC_TOKEN 0x29`	`#define CRC_TOKEN 0x29`
`#define SD_REG(REG) REG32(SD_CONTROLLER_BASE+REG)`
`//SDC_REGISTERS`	`//SDC_REGISTERS`
`#define TX_CMD_FIFO 0x00`	`#define TX_CMD_FIFO 0x00`
`#define RX_CMD_FIFO 0x04`	`#define RX_CMD_FIFO 0x04`
`#define TX_DATA_FIFO 0x08`	`#define TX_DATA_FIFO 0x08`
`#define RX_DATA_FIFO 0x0C`	`#define RX_DATA_FIFO 0x0C`
Line 227...	Line 232...
`return 0;`	`return 0;`
`}`	`}`



`bool cmd_trans_succesful (volatile unsigned char resp)`
`{`
`if ( (resp & 0x1) != 1 )`
`return 1;`
`else`
`return 0;`

`}`
`void write_0(int i)`
`{`
`while( i !=0){`
`SD_REG(TX_CMD_FIFO)=0;`
`i--;`
`}`

`}`
`int mmc_init()`	`int mmc_init()`

`{`	`{`

`volatile unsigned char rtn_reg=0;`	`volatile unsigned char rtn_reg=0;`

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Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [sw/] [sdc_fifo/] [main.c] - Diff between revs 86 and 87