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-- SDHC-SC-Core
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-- Secure Digital High Capacity Self Configuring Core
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--
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-- (C) Copyright 2010, Rainer Kastl
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-- All rights reserved.
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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-- * Redistributions of source code must retain the above copyright
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-- notice, this list of conditions and the following disclaimer.
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-- * Redistributions in binary form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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-- * Neither the name of the <organization> nor the
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-- names of its contributors may be used to endorse or promote products
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-- derived from this software without specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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-- ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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--
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-- File : Rs232Tx-Rtl-ea.vhdl
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-- Owner : Rainer Kastl
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-- Description : Rs232 Transmitter
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-- Links :
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--
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.Global.all;
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use work.Rs232.all;
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entity Rs232Tx is
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generic (
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gDataBitWidth : natural := 8
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);
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port (
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iClk : in std_ulogic;
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inResetAsync : in std_ulogic;
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iRs232Tx : in aiRs232Tx;
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oRs232Tx : out aoRs232Tx
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);
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end entity Rs232Tx;
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architecture Rtl of Rs232Tx is
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type aDataInputState is (
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CanAcceptNewData,
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FreshDataArrived,
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DataBufferBusy);
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type aRegion is (
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StartBit,
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DataBits,
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ParityBit,
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StopBit,
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StopBitAndIdle);
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type aRegSet is record
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DataInputState : aDataInputState;
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Region : aRegion;
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BitIdx : natural range 0 to gDataBitWidth;
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DataWasRead : std_ulogic;
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Data : std_ulogic_vector(gDataBitWidth - 1 downto 0);
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Tx : std_ulogic;
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end record aRegSet;
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constant cInitValR : aRegSet := (
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DataInputState => CanAcceptNewData,
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Region => StopBitAndIdle,
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BitIdx => 0,
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DataWasRead => cInactivated,
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Data => (others => '0'),
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Tx => cTxLineStopBitVal
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);
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signal R, NextR : aRegSet;
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begin
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Comb : process (R, iRs232Tx)
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variable parity : std_ulogic;
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begin
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NextR <= R;
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NextR.DataWasRead <= cInactivated;
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-- Parallel data input
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case R.DataInputState is
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when CanAcceptNewData =>
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-- We are waiting for data to be transmitted
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if (iRs232Tx.Transmit = cActivated and
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iRs232Tx.DataAvailable = cActivated) then
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NextR.Data <= iRs232Tx.Data;
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NextR.DataInputState <= FreshDataArrived;
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NextR.DataWasRead <= cActivated;
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end if;
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when FreshDataArrived =>
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-- We have loaded new data into the send register
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if (R.Region = StartBit) then
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NextR.DataInputState <= DataBufferBusy;
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end if;
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when DataBufferBusy =>
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-- The send register is still occupied.
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if (R.Region = StopBitAndIdle) then
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NextR.DataInputState <= CanAcceptNewData;
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end if;
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end case;
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-- Serial data output
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case R.Region is
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when StartBit =>
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NextR.Tx <= cTxLineStartBitVal;
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if (iRs232Tx.BitStrobe = cActivated) then
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NextR.Region <= DataBits;
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NextR.BitIdx <= 0;
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end if;
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when DataBits =>
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NextR.Tx <= R.Data(R.BitIdx);
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if (iRs232Tx.BitStrobe = cActivated) then
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if (R.BitIdx = gDataBitWidth - 1) then
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-- All bits sent
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NextR.Region <= ParityBit;
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else
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-- Send next bit
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NextR.BitIdx <= R.BitIdx + 1;
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end if;
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end if;
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when ParityBit =>
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-- Use even parity
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parity := R.Data(0);
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for i in 1 to gDataBitWidth-1 loop
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parity := parity xor R.Data(i);
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end loop;
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NextR.Tx <= parity;
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if (iRs232Tx.BitStrobe = cActivated) then
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NextR.Region <= StopBit;
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end if;
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when StopBit =>
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NextR.Tx <= cTxLineStopBitVal;
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if (iRs232Tx.BitStrobe = cActivated) then
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NextR.Region <= StopBitAndIdle;
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end if;
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when StopBitAndIdle =>
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NextR.Tx <= cTxLineStopBitVal;
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if (iRs232Tx.BitStrobe = cActivated) then
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if (R.DataInputState = FreshDataArrived) then
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NextR.Region <= StartBit;
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end if;
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end if;
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end case;
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end process Comb;
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Regs : process (iClk, inResetAsync)
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begin
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if (inResetAsync = cnActivated) then
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R <= cInitValR;
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elsif (iClk'event and iClk = '1') then
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R <= NextR;
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end if;
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end process Regs;
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-- Connect registers to ports
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oRs232Tx.DataWasRead <= R.DataWasRead;
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oRs232Tx.Tx <= R.Tx;
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end architecture Rtl;
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