| Line 18... |
Line 18... |
port (
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port (
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iClk : in std_ulogic; -- Clk, rising edge
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iClk : in std_ulogic; -- Clk, rising edge
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inResetAsync : in std_ulogic; -- Reset, asynchronous active low
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inResetAsync : in std_ulogic; -- Reset, asynchronous active low
|
|
|
iCmdContent: in aSdCmdContent; -- Content to send to card
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iCmdContent: in aSdCmdContent; -- Content to send to card
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ioCmd : inout std_ulogic -- Cmd line to and from card
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ioCmd : inout std_logic -- Cmd line to and from card
|
);
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);
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end entity SdCmd;
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end entity SdCmd;
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|
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architecture Rtl of SdCmd is
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architecture Rtl of SdCmd is
|
|
|
| Line 36... |
Line 36... |
|
|
-- State register
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-- State register
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CmdStateReg : process (iClk, inResetAsync)
|
CmdStateReg : process (iClk, inResetAsync)
|
begin
|
begin
|
if inResetAsync = cInactivated then
|
if inResetAsync = cInactivated then
|
State <= endbit;
|
State <= idle;
|
Counter <= to_unsigned(0, Counter'length);
|
Counter <= to_unsigned(0, Counter'length);
|
elsif iClk'event and iClk = cActivated then
|
elsif iClk'event and iClk = cActivated then
|
State <= NextState;
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State <= NextState;
|
|
Counter <= NextCounter;
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end if;
|
end if;
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end process CmdStateReg;
|
end process CmdStateReg;
|
|
|
-- Comb. process
|
-- Comb. process
|
NextStateAndOutput : process (iCmdContent, State)
|
NextStateAndOutput : process (iCmdContent, State, Counter)
|
|
|
procedure NextStateWhenAllSent (constant length : in natural; constant toState : in aSdCmdState) is
|
procedure NextStateWhenAllSent (constant length : in natural; constant toState : in aSdCmdState) is
|
begin
|
begin
|
if (NextCounter < length-1) then
|
if (NextCounter < length-1) then
|
NextCounter <= NextCounter + 1;
|
NextCounter <= NextCounter + 1;
|
| Line 79... |
Line 80... |
|
|
case State is
|
case State is
|
when idle =>
|
when idle =>
|
-- todo: implement Sync. with host
|
-- todo: implement Sync. with host
|
NextState <= startbit;
|
NextState <= startbit;
|
|
CrcDataIn <= cActivated;
|
|
CrcData <= cSdStartBit;
|
|
|
when startbit =>
|
when startbit =>
|
ioCmd <= cSdStartBit;
|
ioCmd <= cSdStartBit;
|
NextState <= transbit;
|
NextState <= transbit;
|
|
CrcDataIn <= cActivated;
|
|
CrcData <= cSdTransBitHost;
|
|
|
when transbit =>
|
when transbit =>
|
ioCmd <= cSdTransBitHost;
|
ioCmd <= cSdTransBitHost;
|
NextState <= cmdid;
|
NextState <= cmdid;
|
|
CrcDataIn <= cActivated;
|
|
CrcData <= iCmdContent.id(to_integer(NextCounter));
|
|
|
when cmdid =>
|
when cmdid =>
|
SendBitsAndCalcCrc(iCmdContent.id, arg);
|
-- SendBitsAndCalcCrc(iCmdContent.id, arg);
|
|
ioCmd <= iCmdContent.id(to_integer(NextCounter));
|
|
if (NextCounter < iCmdContent.id'length-2) then
|
|
CrcData <= iCmdContent.id(to_integer(NextCounter)+1);
|
|
else
|
|
CrcData <= iCmdContent.arg(0);
|
|
end if;
|
|
CrcDataIn <= cActivated;
|
|
NextStateWhenAllSent(iCmdContent.id'length, arg);
|
|
|
|
|
when arg =>
|
when arg =>
|
SendBitsAndCalcCrc(iCmdContent.arg, crc);
|
-- SendBitsAndCalcCrc(iCmdContent.arg, crc);
|
|
ioCmd <= iCmdContent.arg(to_integer(NextCounter));
|
|
if (NextCounter < iCmdContent.arg'length-2) then
|
|
CrcData <= iCmdContent.arg(to_integer(NextCounter)+1);
|
|
CrcDataIn <= cActivated;
|
|
else
|
|
CrcDataIn <= cInactivated;
|
|
end if;
|
|
NextStateWhenAllSent(iCmdContent.arg'length, crc);
|
|
|
when crc =>
|
when crc =>
|
ioCmd <= SerialCrc;
|
ioCmd <= SerialCrc;
|
NextStateWhenAllSent(crc7'length, endbit);
|
NextStateWhenAllSent(crc7'length-1, endbit);
|
|
|
when endbit =>
|
when endbit =>
|
ioCmd <= cSdEndBit;
|
ioCmd <= cSdEndBit;
|
NextState <= idle; -- todo: receive response
|
NextState <= idle; -- todo: receive response
|
|
|
