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https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
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port (
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port (
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iClk : in std_ulogic;
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iClk : in std_ulogic;
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inResetAsync : in std_ulogic;
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inResetAsync : in std_ulogic;
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-- SD Card
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-- SD Card
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ioCmd : inout std_logic -- Cmd line to and from card
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ioCmd : inout std_logic; -- Cmd line to and from card
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oClk : out std_ulogic;
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ioData : inout std_logic_vector(3 downto 0)
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);
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);
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end entity SdTop;
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end entity SdTop;
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architecture Rtl of SdTop is
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architecture Rtl of SdTop is
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signal ToController : aSdCmdToController;
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signal ToController : aSdCmdToController;
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signal FromController : aSdCmdFromController;
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signal FromController : aSdCmdFromController;
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begin
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begin
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ioData <= "ZZZZ";
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oClk <= iClk;
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SdController_inst: entity work.SdController(Rtl)
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SdController_inst: entity work.SdController(Rtl)
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port map (iClk => iClk,
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port map (iClk => iClk,
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inResetAsync => inResetAsync,
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inResetAsync => inResetAsync,
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iSdCmd => ToController,
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iSdCmd => ToController,
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