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[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_core.v] - Diff between revs 15 and 16

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  Author(s):
  Author(s):
      - Dinesh Annayya, dinesha@opencores.org
      - Dinesh Annayya, dinesha@opencores.org
  Version  : 1.0 - 8th Jan 2012
  Version  : 1.0 - 8th Jan 2012
 
                Initial version with 16/32 Bit SDRAM Support
 
           : 1.1 - 24th Jan 2012
 
                 8 Bit SDRAM Support is added
 
 
 
 
 Copyright (C) 2000 Authors and OPENCORES.ORG
 Copyright (C) 2000 Authors and OPENCORES.ORG
 
 
 This source file may be used and distributed without
 This source file may be used and distributed without
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// Global Variable
// Global Variable
// ----------------------------------------------
// ----------------------------------------------
input                   clk                 ; // SDRAM Clock 
input                   clk                 ; // SDRAM Clock 
input                   pad_clk             ; // SDRAM Clock from Pad, used for registering Read Data
input                   pad_clk             ; // SDRAM Clock from Pad, used for registering Read Data
input                   reset_n             ; // Reset Signal
input                   reset_n             ; // Reset Signal
input                   sdr_width           ; // 0 - 32 Bit SDR, 1 - 16 Bit SDR
input [1:0]             sdr_width           ; // 2'b00 - 32 Bit SDR, 2'b01 - 16 Bit SDR, 2'b1x - 8 Bit
input [1:0]             cfg_colbits         ; // 2'b00 - 8 Bit column address, 2'b01 - 9 Bit, 10 - 10 bit, 11 - 11Bits
input [1:0]             cfg_colbits         ; // 2'b00 - 8 Bit column address, 2'b01 - 9 Bit, 10 - 10 bit, 11 - 11Bits
 
 
 
 
//------------------------------------------------
//------------------------------------------------
// Request from app
// Request from app
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// synopsys translate_off 
// synopsys translate_off 
   wire [3:0]           sdr_cmd;
   wire [3:0]           sdr_cmd;
   assign sdr_cmd = {sdr_cs_n, sdr_ras_n, sdr_cas_n, sdr_we_n};
   assign sdr_cmd = {sdr_cs_n, sdr_ras_n, sdr_cas_n, sdr_we_n};
// synopsys translate_on 
// synopsys translate_on 
 
 
   assign sdr_den_n = sdr_width ? {2'b00,sdr_den_n_int[1:0]} : sdr_den_n_int;
   assign sdr_den_n = sdr_den_n_int ;
   assign sdr_dout = sdr_width ? {16'h0000,sdr_dout_int[15:0]} : sdr_dout_int;
   assign sdr_dout  = sdr_dout_int ;
 
 
 
 
   /****************************************************************************/
   /****************************************************************************/
   // Instantiate sdr_req_gen
   // Instantiate sdr_req_gen
   // This module takes requests from the app, chops them to burst booundaries
   // This module takes requests from the app, chops them to burst booundaries

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