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https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk
[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_req_gen.v] - Diff between revs 15 and 16
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Rev 15 |
Rev 16 |
Line 128... |
Line 128... |
output [11:0] r2b_raddr;
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output [11:0] r2b_raddr;
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output [11:0] r2b_caddr;
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output [11:0] r2b_caddr;
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output [APP_RW-1:0] r2b_len;
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output [APP_RW-1:0] r2b_len;
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input b2r_ack, b2r_arb_ok, sdr_init_done;
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input b2r_ack, b2r_arb_ok, sdr_init_done;
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//
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//
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input sdr_width;
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input [1:0] sdr_width; // 2'b00 - 32 Bit, 2'b01 - 16 Bit, 2'b1x - 8Bit
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/****************************************************************************/
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/****************************************************************************/
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// Internal Nets
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// Internal Nets
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`define REQ_IDLE 1'b0
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`define REQ_IDLE 1'b0
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(req_ld) ? next_req_len : lcl_req_len;
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(req_ld) ? next_req_len : lcl_req_len;
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curr_sdr_addr <= (req_ack) ? req_addr :
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curr_sdr_addr <= (req_ack) ? req_addr :
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(req_ld) ? next_sdr_addr : curr_sdr_addr;
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(req_ld) ? next_sdr_addr : curr_sdr_addr;
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sdr_addrs_mask <= (req_ack) ? (sdr_width ? {req_addr_mask,req_addr_mask[0]} : req_addr_mask) : sdr_addrs_mask;
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sdr_addrs_mask <= (req_ack) ?((sdr_width == 2'b00) ? req_addr_mask :
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(sdr_width == 2'b01) ? {req_addr_mask,req_addr_mask[0]} :
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{req_addr_mask,req_addr_mask[1:0]}) : sdr_addrs_mask;
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end // always @ (posedge clk)
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end // always @ (posedge clk)
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always @ (*) begin
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always @ (*) begin
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