| Line 104... |
Line 104... |
cfg_sdr_twr_d ,
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cfg_sdr_twr_d ,
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cfg_sdr_rfsh ,
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cfg_sdr_rfsh ,
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cfg_sdr_rfmax
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cfg_sdr_rfmax
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);
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);
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|
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parameter APP_AW = 30; // Application Address Width
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parameter APP_AW = 25; // Application Address Width
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parameter APP_DW = 32; // Application Data Width
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parameter APP_DW = 32; // Application Data Width
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parameter APP_BW = 4; // Application Byte Width
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parameter APP_BW = 4; // Application Byte Width
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parameter APP_RW = 9; // Application Request Width
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parameter APP_RW = 9; // Application Request Width
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|
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parameter SDR_DW = 16; // SDR Data Width
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parameter SDR_DW = 16; // SDR Data Width
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| Line 133... |
Line 133... |
input wb_rst_i ;
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input wb_rst_i ;
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input wb_clk_i ;
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input wb_clk_i ;
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|
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input wb_stb_i ;
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input wb_stb_i ;
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output wb_ack_o ;
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output wb_ack_o ;
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input [29:0] wb_addr_i ;
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input [25:0] wb_addr_i ;
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input wb_we_i ; // 1 - Write, 0 - Read
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input wb_we_i ; // 1 - Write, 0 - Read
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input [dw-1:0] wb_dat_i ;
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input [dw-1:0] wb_dat_i ;
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input [dw/8-1:0] wb_sel_i ; // Byte enable
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input [dw/8-1:0] wb_sel_i ; // Byte enable
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output [dw-1:0] wb_dat_o ;
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output [dw-1:0] wb_dat_o ;
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input wb_cyc_i ;
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input wb_cyc_i ;
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| Line 174... |
Line 174... |
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//--------------------------------------------
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//--------------------------------------------
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// SDRAM controller Interface
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// SDRAM controller Interface
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//--------------------------------------------
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//--------------------------------------------
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wire app_req ; // SDRAM request
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wire app_req ; // SDRAM request
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wire [29:0] app_req_addr ; // SDRAM Request Address
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wire [24:0] app_req_addr ; // SDRAM Request Address
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wire [bl-1:0] app_req_len ;
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wire [bl-1:0] app_req_len ;
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wire app_req_wr_n ; // 0 - Write, 1 -> Read
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wire app_req_wr_n ; // 0 - Write, 1 -> Read
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wire app_req_ack ; // SDRAM request Accepted
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wire app_req_ack ; // SDRAM request Accepted
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wire app_busy_n ; // 0 -> sdr busy
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wire app_busy_n ; // 0 -> sdr busy
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wire [dw/8-1:0] app_wr_en_n ; // Active low sdr byte-wise write data valid
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wire [dw/8-1:0] app_wr_en_n ; // Active low sdr byte-wise write data valid
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