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//---------------------------------------------------------------------
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//---------------------------------------------------------------------
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// Async Command FIFO. This block handle the clock domain change from
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// Async Command FIFO. This block handle the clock domain change from
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// Application layer to SDRAM Controller
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// Application layer to SDRAM Controller
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// ------------------------------------------------------------------
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// ------------------------------------------------------------------
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// Address + Burst Length + W/R Request
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// Address + Burst Length + W/R Request
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async_fifo #(.W(25+bl+1),.DP(4),.WR_FAST(1'b0), .RD_FAST(1'b1)) u_cmdfifo (
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async_fifo #(.W(25+bl+1),.DP(4),.WR_FAST(1'b0), .RD_FAST(1'b0)) u_cmdfifo (
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// Write Path Sys CLock Domain
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// Write Path Sys CLock Domain
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.wr_clk (wb_clk_i ),
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.wr_clk (wb_clk_i ),
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.wr_reset_n (!wb_rst_i ),
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.wr_reset_n (!wb_rst_i ),
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.wr_en (cmdfifo_wr ),
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.wr_en (cmdfifo_wr ),
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.wr_data ({burst_length,
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.wr_data ({burst_length,
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