| Line 44... |
Line 44... |
# Loading work.sdrc_bank_ctl
|
# Loading work.sdrc_bank_ctl
|
# Loading work.sdrc_bank_fsm
|
# Loading work.sdrc_bank_fsm
|
# Loading work.sdrc_xfr_ctl
|
# Loading work.sdrc_xfr_ctl
|
# Loading work.sdrc_bs_convert
|
# Loading work.sdrc_bs_convert
|
# Loading work.mt48lc2m32b2
|
# Loading work.mt48lc2m32b2
|
# ** Warning: (vsim-3015) ../tb/tb_core.sv(200): [PCDPC] - Port size (11 or 11) does not match connection size (12) for port 'Addr'. The port definition is at: ../model/mt48lc2m32b2.v(42).
|
# ** Warning: (vsim-3015) ../tb/tb_core.sv(199): [PCDPC] - Port size (11 or 11) does not match connection size (12) for port 'Addr'. The port definition is at: ../model/mt48lc2m32b2.v(42).
|
# Region: /tb_core/u_sdram32
|
# Region: /tb_core/u_sdram32
|
# do run.do
|
# do run.do
|
# tb_core.u_sdram32 : at time 10157.0 ns AREF : Auto Refresh
|
# tb_core.u_sdram32 : at time 10157.0 ns AREF : Auto Refresh
|
# tb_core.u_sdram32 : at time 10247.0 ns AREF : Auto Refresh
|
# tb_core.u_sdram32 : at time 10247.0 ns AREF : Auto Refresh
|
# tb_core.u_sdram32 : at time 10337.0 ns AREF : Auto Refresh
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# tb_core.u_sdram32 : at time 10337.0 ns AREF : Auto Refresh
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| Line 67... |
Line 67... |
# tb_core.u_sdram32 : at time 11507.0 ns LMR : Load Mode Register
|
# tb_core.u_sdram32 : at time 11507.0 ns LMR : Load Mode Register
|
# tb_core.u_sdram32 : CAS Latency = 3
|
# tb_core.u_sdram32 : CAS Latency = 3
|
# tb_core.u_sdram32 : Burst Length = 8
|
# tb_core.u_sdram32 : Burst Length = 8
|
# tb_core.u_sdram32 : Burst Type = Sequential
|
# tb_core.u_sdram32 : Burst Type = Sequential
|
# tb_core.u_sdram32 : Write Burst Mode = Programmed Burst Length
|
# tb_core.u_sdram32 : Write Burst Mode = Programmed Burst Length
|
# --------------------------------------
|
|
# Case-1: Single Write/Read Case
|
|
# --------------------------------------
|
|
# Write Address: 00040000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 12647.0 ns ACT : Bank = 0 Row = 64
|
|
# tb_core.u_sdram32 : at time 12677.0 ns WRITE: Bank = 0 Row = 64, Col = 0, Data = 12153524
|
|
# Status: Burst-No: 0 Write Address: 00040000 WriteData: 12153524
|
|
# tb_core.u_sdram32 : at time 12687.0 ns WRITE: Bank = 0 Row = 64, Col = 1, Data = c0895e81
|
|
# Status: Burst-No: 1 Write Address: 00040000 WriteData: c0895e81
|
|
# tb_core.u_sdram32 : at time 12697.0 ns WRITE: Bank = 0 Row = 64, Col = 2, Data = 8484d609
|
|
# Status: Burst-No: 2 Write Address: 00040000 WriteData: 8484d609
|
|
# tb_core.u_sdram32 : at time 12707.0 ns WRITE: Bank = 0 Row = 64, Col = 3, Data = b1f05663
|
|
# Status: Burst-No: 3 Write Address: 00040000 WriteData: b1f05663
|
|
# tb_core.u_sdram32 : at time 12717.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 13753.0 ns READ : Bank = 0 Row = 64, Col = 0, Data = 12153524
|
|
# tb_core.u_sdram32 : at time 13763.0 ns READ : Bank = 0 Row = 64, Col = 1, Data = c0895e81
|
|
# READ STATUS: Burst-No: 0 Addr: 00040000 Rxd: 12153524
|
|
# tb_core.u_sdram32 : at time 13767.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 13773.0 ns READ : Bank = 0 Row = 64, Col = 2, Data = 8484d609
|
|
# READ STATUS: Burst-No: 1 Addr: 00040002 Rxd: c0895e81
|
|
# tb_core.u_sdram32 : at time 13783.0 ns READ : Bank = 0 Row = 64, Col = 3, Data = b1f05663
|
|
# READ STATUS: Burst-No: 2 Addr: 00040004 Rxd: 8484d609
|
|
# READ STATUS: Burst-No: 3 Addr: 00040006 Rxd: b1f05663
|
|
# --------------------------------------
|
|
# Case-2: Repeat same transfer once again
|
|
# ----------------------------------------
|
|
# Write Address: 00040000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 13837.0 ns WRITE: Bank = 0 Row = 64, Col = 0, Data = 06b97b0d
|
|
# Status: Burst-No: 0 Write Address: 00040000 WriteData: 06b97b0d
|
|
# tb_core.u_sdram32 : at time 13847.0 ns WRITE: Bank = 0 Row = 64, Col = 1, Data = 46df998d
|
|
# Status: Burst-No: 1 Write Address: 00040000 WriteData: 46df998d
|
|
# tb_core.u_sdram32 : at time 13857.0 ns WRITE: Bank = 0 Row = 64, Col = 2, Data = b2c28465
|
|
# Status: Burst-No: 2 Write Address: 00040000 WriteData: b2c28465
|
|
# tb_core.u_sdram32 : at time 13867.0 ns WRITE: Bank = 0 Row = 64, Col = 3, Data = 89375212
|
|
# Status: Burst-No: 3 Write Address: 00040000 WriteData: 89375212
|
|
# tb_core.u_sdram32 : at time 13877.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 13913.0 ns READ : Bank = 0 Row = 64, Col = 0, Data = 06b97b0d
|
|
# tb_core.u_sdram32 : at time 13923.0 ns READ : Bank = 0 Row = 64, Col = 1, Data = 46df998d
|
|
# READ STATUS: Burst-No: 0 Addr: 00040000 Rxd: 06b97b0d
|
|
# tb_core.u_sdram32 : at time 13927.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 13933.0 ns READ : Bank = 0 Row = 64, Col = 2, Data = b2c28465
|
|
# READ STATUS: Burst-No: 1 Addr: 00040002 Rxd: 46df998d
|
|
# tb_core.u_sdram32 : at time 13943.0 ns READ : Bank = 0 Row = 64, Col = 3, Data = 89375212
|
|
# READ STATUS: Burst-No: 2 Addr: 00040004 Rxd: b2c28465
|
|
# READ STATUS: Burst-No: 3 Addr: 00040006 Rxd: 89375212
|
|
# Write Address: 00400000, Burst Size: 5
|
|
# tb_core.u_sdram32 : at time 14027.0 ns ACT : Bank = 0 Row = 1024
|
|
# tb_core.u_sdram32 : at time 14057.0 ns WRITE: Bank = 0 Row = 1024, Col = 0, Data = 00f3e301
|
|
# Status: Burst-No: 0 Write Address: 00400000 WriteData: 00f3e301
|
|
# tb_core.u_sdram32 : at time 14067.0 ns WRITE: Bank = 0 Row = 1024, Col = 1, Data = 06d7cd0d
|
|
# Status: Burst-No: 1 Write Address: 00400000 WriteData: 06d7cd0d
|
|
# tb_core.u_sdram32 : at time 14077.0 ns WRITE: Bank = 0 Row = 1024, Col = 2, Data = 3b23f176
|
|
# Status: Burst-No: 2 Write Address: 00400000 WriteData: 3b23f176
|
|
# tb_core.u_sdram32 : at time 14087.0 ns WRITE: Bank = 0 Row = 1024, Col = 3, Data = 1e8dcd3d
|
|
# Status: Burst-No: 3 Write Address: 00400000 WriteData: 1e8dcd3d
|
|
# tb_core.u_sdram32 : at time 14097.0 ns WRITE: Bank = 0 Row = 1024, Col = 4, Data = 76d457ed
|
|
# Status: Burst-No: 4 Write Address: 00400000 WriteData: 76d457ed
|
|
# tb_core.u_sdram32 : at time 14107.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 14143.0 ns READ : Bank = 0 Row = 1024, Col = 0, Data = 00f3e301
|
|
# tb_core.u_sdram32 : at time 14153.0 ns READ : Bank = 0 Row = 1024, Col = 1, Data = 06d7cd0d
|
|
# READ STATUS: Burst-No: 0 Addr: 00400000 Rxd: 00f3e301
|
|
# tb_core.u_sdram32 : at time 14163.0 ns READ : Bank = 0 Row = 1024, Col = 2, Data = 3b23f176
|
|
# tb_core.u_sdram32 : at time 14167.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 1 Addr: 00400002 Rxd: 06d7cd0d
|
|
# tb_core.u_sdram32 : at time 14173.0 ns READ : Bank = 0 Row = 1024, Col = 3, Data = 1e8dcd3d
|
|
# READ STATUS: Burst-No: 2 Addr: 00400004 Rxd: 3b23f176
|
|
# tb_core.u_sdram32 : at time 14183.0 ns READ : Bank = 0 Row = 1024, Col = 4, Data = 76d457ed
|
|
# READ STATUS: Burst-No: 3 Addr: 00400006 Rxd: 1e8dcd3d
|
|
# READ STATUS: Burst-No: 4 Addr: 00400008 Rxd: 76d457ed
|
|
# ----------------------------------------
|
# ----------------------------------------
|
# Case-3 Create a Page Cross Over
|
# Case-3 Create a Page Cross Over
|
# ----------------------------------------
|
# ----------------------------------------
|
# Write Address: 00040ffc, Burst Size: 8
|
# Write Address: 00040ffc, Burst Size: 8
|
# tb_core.u_sdram32 : at time 14267.0 ns ACT : Bank = 3 Row = 64
|
# tb_core.u_sdram32 : at time 12647.0 ns ACT : Bank = 3 Row = 64
|
# tb_core.u_sdram32 : at time 14297.0 ns WRITE: Bank = 3 Row = 64, Col = 255, Data = 462df78c
|
# tb_core.u_sdram32 : at time 12677.0 ns WRITE: Bank = 3 Row = 64, Col = 255, Data = 12153524
|
# Status: Burst-No: 0 Write Address: 00040ffc WriteData: 462df78c
|
# Status: Burst-No: 0 Write Address: 00040ffc WriteData: 12153524
|
# tb_core.u_sdram32 : at time 14307.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 12687.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 14317.0 ns ACT : Bank = 0 Row = 65
|
# tb_core.u_sdram32 : at time 12697.0 ns ACT : Bank = 0 Row = 65
|
# tb_core.u_sdram32 : at time 14347.0 ns WRITE: Bank = 0 Row = 65, Col = 0, Data = 7cfde9f9
|
# tb_core.u_sdram32 : at time 12727.0 ns WRITE: Bank = 0 Row = 65, Col = 0, Data = c0895e81
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# Status: Burst-No: 1 Write Address: 00040ffc WriteData: 7cfde9f9
|
# Status: Burst-No: 1 Write Address: 00040ffc WriteData: c0895e81
|
# tb_core.u_sdram32 : at time 14357.0 ns WRITE: Bank = 0 Row = 65, Col = 1, Data = e33724c6
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# tb_core.u_sdram32 : at time 12737.0 ns WRITE: Bank = 0 Row = 65, Col = 1, Data = 8484d609
|
# Status: Burst-No: 2 Write Address: 00040ffc WriteData: e33724c6
|
# Status: Burst-No: 2 Write Address: 00040ffc WriteData: 8484d609
|
# tb_core.u_sdram32 : at time 14367.0 ns WRITE: Bank = 0 Row = 65, Col = 2, Data = e2f784c5
|
# tb_core.u_sdram32 : at time 12747.0 ns WRITE: Bank = 0 Row = 65, Col = 2, Data = b1f05663
|
# Status: Burst-No: 3 Write Address: 00040ffc WriteData: e2f784c5
|
# Status: Burst-No: 3 Write Address: 00040ffc WriteData: b1f05663
|
# tb_core.u_sdram32 : at time 14377.0 ns WRITE: Bank = 0 Row = 65, Col = 3, Data = d513d2aa
|
# tb_core.u_sdram32 : at time 12757.0 ns WRITE: Bank = 0 Row = 65, Col = 3, Data = 06b97b0d
|
# Status: Burst-No: 4 Write Address: 00040ffc WriteData: d513d2aa
|
# Status: Burst-No: 4 Write Address: 00040ffc WriteData: 06b97b0d
|
# tb_core.u_sdram32 : at time 14387.0 ns WRITE: Bank = 0 Row = 65, Col = 4, Data = 72aff7e5
|
# tb_core.u_sdram32 : at time 12767.0 ns WRITE: Bank = 0 Row = 65, Col = 4, Data = 46df998d
|
# Status: Burst-No: 5 Write Address: 00040ffc WriteData: 72aff7e5
|
# Status: Burst-No: 5 Write Address: 00040ffc WriteData: 46df998d
|
# tb_core.u_sdram32 : at time 14397.0 ns WRITE: Bank = 0 Row = 65, Col = 5, Data = bbd27277
|
# tb_core.u_sdram32 : at time 12777.0 ns WRITE: Bank = 0 Row = 65, Col = 5, Data = b2c28465
|
# Status: Burst-No: 6 Write Address: 00040ffc WriteData: bbd27277
|
# Status: Burst-No: 6 Write Address: 00040ffc WriteData: b2c28465
|
# tb_core.u_sdram32 : at time 14407.0 ns WRITE: Bank = 0 Row = 65, Col = 6, Data = 8932d612
|
# tb_core.u_sdram32 : at time 12787.0 ns WRITE: Bank = 0 Row = 65, Col = 6, Data = 89375212
|
# Status: Burst-No: 7 Write Address: 00040ffc WriteData: 8932d612
|
# Status: Burst-No: 7 Write Address: 00040ffc WriteData: 89375212
|
# tb_core.u_sdram32 : at time 14417.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 12797.0 ns BST : Burst Terminate
|
# Write Address: 00400ff8, Burst Size: 15
|
# Write Address: 00400ff8, Burst Size: 15
|
# tb_core.u_sdram32 : at time 14467.0 ns ACT : Bank = 3 Row = 1024
|
# tb_core.u_sdram32 : at time 12847.0 ns ACT : Bank = 3 Row = 1024
|
# tb_core.u_sdram32 : at time 14497.0 ns WRITE: Bank = 3 Row = 1024, Col = 254, Data = 47ecdb8f
|
# tb_core.u_sdram32 : at time 12877.0 ns WRITE: Bank = 3 Row = 1024, Col = 254, Data = 00f3e301
|
# Status: Burst-No: 0 Write Address: 00400ff8 WriteData: 47ecdb8f
|
# Status: Burst-No: 0 Write Address: 00400ff8 WriteData: 00f3e301
|
# tb_core.u_sdram32 : at time 14507.0 ns ACT : Bank = 0 Row = 1025
|
# tb_core.u_sdram32 : at time 12887.0 ns ACT : Bank = 0 Row = 1025
|
# tb_core.u_sdram32 : at time 14507.0 ns WRITE: Bank = 3 Row = 1024, Col = 255, Data = 793069f2
|
# tb_core.u_sdram32 : at time 12887.0 ns WRITE: Bank = 3 Row = 1024, Col = 255, Data = 06d7cd0d
|
# Status: Burst-No: 1 Write Address: 00400ff8 WriteData: 793069f2
|
# Status: Burst-No: 1 Write Address: 00400ff8 WriteData: 06d7cd0d
|
# tb_core.u_sdram32 : at time 14517.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 12897.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 14537.0 ns WRITE: Bank = 0 Row = 1025, Col = 0, Data = e77696ce
|
# tb_core.u_sdram32 : at time 12917.0 ns WRITE: Bank = 0 Row = 1025, Col = 0, Data = 3b23f176
|
# Status: Burst-No: 2 Write Address: 00400ff8 WriteData: e77696ce
|
# Status: Burst-No: 2 Write Address: 00400ff8 WriteData: 3b23f176
|
# tb_core.u_sdram32 : at time 14547.0 ns WRITE: Bank = 0 Row = 1025, Col = 1, Data = f4007ae8
|
# tb_core.u_sdram32 : at time 12927.0 ns WRITE: Bank = 0 Row = 1025, Col = 1, Data = 1e8dcd3d
|
# Status: Burst-No: 3 Write Address: 00400ff8 WriteData: f4007ae8
|
# Status: Burst-No: 3 Write Address: 00400ff8 WriteData: 1e8dcd3d
|
# tb_core.u_sdram32 : at time 14557.0 ns WRITE: Bank = 0 Row = 1025, Col = 2, Data = e2ca4ec5
|
# tb_core.u_sdram32 : at time 12937.0 ns WRITE: Bank = 0 Row = 1025, Col = 2, Data = 76d457ed
|
# Status: Burst-No: 4 Write Address: 00400ff8 WriteData: e2ca4ec5
|
# Status: Burst-No: 4 Write Address: 00400ff8 WriteData: 76d457ed
|
# tb_core.u_sdram32 : at time 14567.0 ns WRITE: Bank = 0 Row = 1025, Col = 3, Data = 2e58495c
|
# tb_core.u_sdram32 : at time 12947.0 ns WRITE: Bank = 0 Row = 1025, Col = 3, Data = 462df78c
|
# Status: Burst-No: 5 Write Address: 00400ff8 WriteData: 2e58495c
|
# Status: Burst-No: 5 Write Address: 00400ff8 WriteData: 462df78c
|
# tb_core.u_sdram32 : at time 14577.0 ns WRITE: Bank = 0 Row = 1025, Col = 4, Data = de8e28bd
|
# tb_core.u_sdram32 : at time 12957.0 ns WRITE: Bank = 0 Row = 1025, Col = 4, Data = 7cfde9f9
|
# Status: Burst-No: 6 Write Address: 00400ff8 WriteData: de8e28bd
|
# Status: Burst-No: 6 Write Address: 00400ff8 WriteData: 7cfde9f9
|
# tb_core.u_sdram32 : at time 14587.0 ns WRITE: Bank = 0 Row = 1025, Col = 5, Data = 96ab582d
|
# tb_core.u_sdram32 : at time 12967.0 ns WRITE: Bank = 0 Row = 1025, Col = 5, Data = e33724c6
|
# Status: Burst-No: 7 Write Address: 00400ff8 WriteData: 96ab582d
|
# Status: Burst-No: 7 Write Address: 00400ff8 WriteData: e33724c6
|
# tb_core.u_sdram32 : at time 14597.0 ns WRITE: Bank = 0 Row = 1025, Col = 6, Data = b2a72665
|
# tb_core.u_sdram32 : at time 12977.0 ns WRITE: Bank = 0 Row = 1025, Col = 6, Data = e2f784c5
|
# Status: Burst-No: 8 Write Address: 00400ff8 WriteData: b2a72665
|
# Status: Burst-No: 8 Write Address: 00400ff8 WriteData: e2f784c5
|
# tb_core.u_sdram32 : at time 14607.0 ns WRITE: Bank = 0 Row = 1025, Col = 7, Data = b1ef6263
|
# tb_core.u_sdram32 : at time 12987.0 ns WRITE: Bank = 0 Row = 1025, Col = 7, Data = d513d2aa
|
# Status: Burst-No: 9 Write Address: 00400ff8 WriteData: b1ef6263
|
# Status: Burst-No: 9 Write Address: 00400ff8 WriteData: d513d2aa
|
# tb_core.u_sdram32 : at time 14617.0 ns WRITE: Bank = 0 Row = 1025, Col = 8, Data = 0573870a
|
# tb_core.u_sdram32 : at time 12997.0 ns WRITE: Bank = 0 Row = 1025, Col = 8, Data = 72aff7e5
|
# Status: Burst-No: 10 Write Address: 00400ff8 WriteData: 0573870a
|
# Status: Burst-No: 10 Write Address: 00400ff8 WriteData: 72aff7e5
|
# tb_core.u_sdram32 : at time 14627.0 ns WRITE: Bank = 0 Row = 1025, Col = 9, Data = c03b2280
|
# tb_core.u_sdram32 : at time 13007.0 ns WRITE: Bank = 0 Row = 1025, Col = 9, Data = bbd27277
|
# Status: Burst-No: 11 Write Address: 00400ff8 WriteData: c03b2280
|
# Status: Burst-No: 11 Write Address: 00400ff8 WriteData: bbd27277
|
# tb_core.u_sdram32 : at time 14637.0 ns WRITE: Bank = 0 Row = 1025, Col = 10, Data = 10642120
|
# tb_core.u_sdram32 : at time 13017.0 ns WRITE: Bank = 0 Row = 1025, Col = 10, Data = 8932d612
|
# Status: Burst-No: 12 Write Address: 00400ff8 WriteData: 10642120
|
# Status: Burst-No: 12 Write Address: 00400ff8 WriteData: 8932d612
|
# tb_core.u_sdram32 : at time 14647.0 ns WRITE: Bank = 0 Row = 1025, Col = 11, Data = 557845aa
|
# tb_core.u_sdram32 : at time 13027.0 ns WRITE: Bank = 0 Row = 1025, Col = 11, Data = 47ecdb8f
|
# Status: Burst-No: 13 Write Address: 00400ff8 WriteData: 557845aa
|
# Status: Burst-No: 13 Write Address: 00400ff8 WriteData: 47ecdb8f
|
# tb_core.u_sdram32 : at time 14657.0 ns WRITE: Bank = 0 Row = 1025, Col = 12, Data = cecccc9d
|
# tb_core.u_sdram32 : at time 13037.0 ns WRITE: Bank = 0 Row = 1025, Col = 12, Data = 793069f2
|
# Status: Burst-No: 14 Write Address: 00400ff8 WriteData: cecccc9d
|
# Status: Burst-No: 14 Write Address: 00400ff8 WriteData: 793069f2
|
# tb_core.u_sdram32 : at time 14667.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 13047.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 14707.0 ns ACT : Bank = 3 Row = 64
|
# tb_core.u_sdram32 : at time 13087.0 ns ACT : Bank = 3 Row = 64
|
# tb_core.u_sdram32 : at time 14747.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 13127.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 14757.0 ns ACT : Bank = 0 Row = 65
|
# tb_core.u_sdram32 : at time 13137.0 ns ACT : Bank = 0 Row = 65
|
# tb_core.u_sdram32 : at time 14763.0 ns READ : Bank = 3 Row = 64, Col = 255, Data = 462df78c
|
# tb_core.u_sdram32 : at time 13143.0 ns READ : Bank = 3 Row = 64, Col = 255, Data = 12153524
|
# READ STATUS: Burst-No: 0 Addr: 00040ffc Rxd: 462df78c
|
# READ STATUS: Burst-No: 0 Addr: 00040ffc Rxd: 12153524
|
# tb_core.u_sdram32 : at time 14813.0 ns READ : Bank = 0 Row = 65, Col = 0, Data = 7cfde9f9
|
# tb_core.u_sdram32 : at time 13193.0 ns READ : Bank = 0 Row = 65, Col = 0, Data = c0895e81
|
# tb_core.u_sdram32 : at time 14823.0 ns READ : Bank = 0 Row = 65, Col = 1, Data = e33724c6
|
# tb_core.u_sdram32 : at time 13203.0 ns READ : Bank = 0 Row = 65, Col = 1, Data = 8484d609
|
# READ STATUS: Burst-No: 1 Addr: 00040ffe Rxd: 7cfde9f9
|
# READ STATUS: Burst-No: 1 Addr: 00040ffe Rxd: c0895e81
|
# tb_core.u_sdram32 : at time 14833.0 ns READ : Bank = 0 Row = 65, Col = 2, Data = e2f784c5
|
# tb_core.u_sdram32 : at time 13213.0 ns READ : Bank = 0 Row = 65, Col = 2, Data = b1f05663
|
# READ STATUS: Burst-No: 2 Addr: 00041000 Rxd: e33724c6
|
# READ STATUS: Burst-No: 2 Addr: 00041000 Rxd: 8484d609
|
# tb_core.u_sdram32 : at time 14843.0 ns READ : Bank = 0 Row = 65, Col = 3, Data = d513d2aa
|
# tb_core.u_sdram32 : at time 13223.0 ns READ : Bank = 0 Row = 65, Col = 3, Data = 06b97b0d
|
# READ STATUS: Burst-No: 3 Addr: 00041002 Rxd: e2f784c5
|
# READ STATUS: Burst-No: 3 Addr: 00041002 Rxd: b1f05663
|
# tb_core.u_sdram32 : at time 14853.0 ns READ : Bank = 0 Row = 65, Col = 4, Data = 72aff7e5
|
# tb_core.u_sdram32 : at time 13233.0 ns READ : Bank = 0 Row = 65, Col = 4, Data = 46df998d
|
# tb_core.u_sdram32 : at time 14857.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 13237.0 ns BST : Burst Terminate
|
# READ STATUS: Burst-No: 4 Addr: 00041004 Rxd: d513d2aa
|
# READ STATUS: Burst-No: 4 Addr: 00041004 Rxd: 06b97b0d
|
# tb_core.u_sdram32 : at time 14863.0 ns READ : Bank = 0 Row = 65, Col = 5, Data = bbd27277
|
# tb_core.u_sdram32 : at time 13243.0 ns READ : Bank = 0 Row = 65, Col = 5, Data = b2c28465
|
# READ STATUS: Burst-No: 5 Addr: 00041006 Rxd: 72aff7e5
|
# READ STATUS: Burst-No: 5 Addr: 00041006 Rxd: 46df998d
|
# tb_core.u_sdram32 : at time 14873.0 ns READ : Bank = 0 Row = 65, Col = 6, Data = 8932d612
|
# tb_core.u_sdram32 : at time 13253.0 ns READ : Bank = 0 Row = 65, Col = 6, Data = 89375212
|
# READ STATUS: Burst-No: 6 Addr: 00041008 Rxd: bbd27277
|
# READ STATUS: Burst-No: 6 Addr: 00041008 Rxd: b2c28465
|
# READ STATUS: Burst-No: 7 Addr: 0004100a Rxd: 8932d612
|
# READ STATUS: Burst-No: 7 Addr: 0004100a Rxd: 89375212
|
# tb_core.u_sdram32 : at time 14947.0 ns ACT : Bank = 3 Row = 1024
|
# tb_core.u_sdram32 : at time 13327.0 ns ACT : Bank = 3 Row = 1024
|
# tb_core.u_sdram32 : at time 14987.0 ns ACT : Bank = 0 Row = 1025
|
# tb_core.u_sdram32 : at time 13367.0 ns ACT : Bank = 0 Row = 1025
|
# tb_core.u_sdram32 : at time 14997.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 13377.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 15003.0 ns READ : Bank = 3 Row = 1024, Col = 254, Data = 47ecdb8f
|
# tb_core.u_sdram32 : at time 13383.0 ns READ : Bank = 3 Row = 1024, Col = 254, Data = 00f3e301
|
# tb_core.u_sdram32 : at time 15013.0 ns READ : Bank = 3 Row = 1024, Col = 255, Data = 793069f2
|
# tb_core.u_sdram32 : at time 13393.0 ns READ : Bank = 3 Row = 1024, Col = 255, Data = 06d7cd0d
|
# READ STATUS: Burst-No: 0 Addr: 00400ff8 Rxd: 47ecdb8f
|
# READ STATUS: Burst-No: 0 Addr: 00400ff8 Rxd: 00f3e301
|
# READ STATUS: Burst-No: 1 Addr: 00400ffa Rxd: 793069f2
|
# READ STATUS: Burst-No: 1 Addr: 00400ffa Rxd: 06d7cd0d
|
# tb_core.u_sdram32 : at time 15043.0 ns READ : Bank = 0 Row = 1025, Col = 0, Data = e77696ce
|
# tb_core.u_sdram32 : at time 13423.0 ns READ : Bank = 0 Row = 1025, Col = 0, Data = 3b23f176
|
# tb_core.u_sdram32 : at time 15053.0 ns READ : Bank = 0 Row = 1025, Col = 1, Data = f4007ae8
|
# tb_core.u_sdram32 : at time 13433.0 ns READ : Bank = 0 Row = 1025, Col = 1, Data = 1e8dcd3d
|
# READ STATUS: Burst-No: 2 Addr: 00400ffc Rxd: e77696ce
|
# READ STATUS: Burst-No: 2 Addr: 00400ffc Rxd: 3b23f176
|
# tb_core.u_sdram32 : at time 15063.0 ns READ : Bank = 0 Row = 1025, Col = 2, Data = e2ca4ec5
|
# tb_core.u_sdram32 : at time 13443.0 ns READ : Bank = 0 Row = 1025, Col = 2, Data = 76d457ed
|
# READ STATUS: Burst-No: 3 Addr: 00400ffe Rxd: f4007ae8
|
# READ STATUS: Burst-No: 3 Addr: 00400ffe Rxd: 1e8dcd3d
|
# tb_core.u_sdram32 : at time 15073.0 ns READ : Bank = 0 Row = 1025, Col = 3, Data = 2e58495c
|
# tb_core.u_sdram32 : at time 13453.0 ns READ : Bank = 0 Row = 1025, Col = 3, Data = 462df78c
|
# READ STATUS: Burst-No: 4 Addr: 00401000 Rxd: e2ca4ec5
|
# READ STATUS: Burst-No: 4 Addr: 00401000 Rxd: 76d457ed
|
# tb_core.u_sdram32 : at time 15083.0 ns READ : Bank = 0 Row = 1025, Col = 4, Data = de8e28bd
|
# tb_core.u_sdram32 : at time 13463.0 ns READ : Bank = 0 Row = 1025, Col = 4, Data = 7cfde9f9
|
# READ STATUS: Burst-No: 5 Addr: 00401002 Rxd: 2e58495c
|
# READ STATUS: Burst-No: 5 Addr: 00401002 Rxd: 462df78c
|
# tb_core.u_sdram32 : at time 15093.0 ns READ : Bank = 0 Row = 1025, Col = 5, Data = 96ab582d
|
# tb_core.u_sdram32 : at time 13473.0 ns READ : Bank = 0 Row = 1025, Col = 5, Data = e33724c6
|
# READ STATUS: Burst-No: 6 Addr: 00401004 Rxd: de8e28bd
|
# READ STATUS: Burst-No: 6 Addr: 00401004 Rxd: 7cfde9f9
|
# tb_core.u_sdram32 : at time 15103.0 ns READ : Bank = 0 Row = 1025, Col = 6, Data = b2a72665
|
# tb_core.u_sdram32 : at time 13483.0 ns READ : Bank = 0 Row = 1025, Col = 6, Data = e2f784c5
|
# READ STATUS: Burst-No: 7 Addr: 00401006 Rxd: 96ab582d
|
# READ STATUS: Burst-No: 7 Addr: 00401006 Rxd: e33724c6
|
# tb_core.u_sdram32 : at time 15113.0 ns READ : Bank = 0 Row = 1025, Col = 7, Data = b1ef6263
|
# tb_core.u_sdram32 : at time 13493.0 ns READ : Bank = 0 Row = 1025, Col = 7, Data = d513d2aa
|
# READ STATUS: Burst-No: 8 Addr: 00401008 Rxd: b2a72665
|
# READ STATUS: Burst-No: 8 Addr: 00401008 Rxd: e2f784c5
|
# tb_core.u_sdram32 : at time 15123.0 ns READ : Bank = 0 Row = 1025, Col = 8, Data = 0573870a
|
# tb_core.u_sdram32 : at time 13503.0 ns READ : Bank = 0 Row = 1025, Col = 8, Data = 72aff7e5
|
# READ STATUS: Burst-No: 9 Addr: 0040100a Rxd: b1ef6263
|
# READ STATUS: Burst-No: 9 Addr: 0040100a Rxd: d513d2aa
|
# tb_core.u_sdram32 : at time 15133.0 ns READ : Bank = 0 Row = 1025, Col = 9, Data = c03b2280
|
# tb_core.u_sdram32 : at time 13513.0 ns READ : Bank = 0 Row = 1025, Col = 9, Data = bbd27277
|
# READ STATUS: Burst-No: 10 Addr: 0040100c Rxd: 0573870a
|
# READ STATUS: Burst-No: 10 Addr: 0040100c Rxd: 72aff7e5
|
# tb_core.u_sdram32 : at time 15143.0 ns READ : Bank = 0 Row = 1025, Col = 10, Data = 10642120
|
# tb_core.u_sdram32 : at time 13523.0 ns READ : Bank = 0 Row = 1025, Col = 10, Data = 8932d612
|
# tb_core.u_sdram32 : at time 15147.0 ns BST : Burst Terminate
|
# tb_core.u_sdram32 : at time 13527.0 ns BST : Burst Terminate
|
# READ STATUS: Burst-No: 11 Addr: 0040100e Rxd: c03b2280
|
# READ STATUS: Burst-No: 11 Addr: 0040100e Rxd: bbd27277
|
# tb_core.u_sdram32 : at time 15153.0 ns READ : Bank = 0 Row = 1025, Col = 11, Data = 557845aa
|
# tb_core.u_sdram32 : at time 13533.0 ns READ : Bank = 0 Row = 1025, Col = 11, Data = 47ecdb8f
|
# READ STATUS: Burst-No: 12 Addr: 00401010 Rxd: 10642120
|
# READ STATUS: Burst-No: 12 Addr: 00401010 Rxd: 8932d612
|
# tb_core.u_sdram32 : at time 15163.0 ns READ : Bank = 0 Row = 1025, Col = 12, Data = cecccc9d
|
# tb_core.u_sdram32 : at time 13543.0 ns READ : Bank = 0 Row = 1025, Col = 12, Data = 793069f2
|
# READ STATUS: Burst-No: 13 Addr: 00401012 Rxd: 557845aa
|
# READ STATUS: Burst-No: 13 Addr: 00401012 Rxd: 47ecdb8f
|
# READ STATUS: Burst-No: 14 Addr: 00401014 Rxd: cecccc9d
|
# READ STATUS: Burst-No: 14 Addr: 00401014 Rxd: 793069f2
|
# ----------------------------------------
|
|
# Case:4 4 Write & 4 Read
|
|
# ----------------------------------------
|
|
# Write Address: 00040000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 15247.0 ns ACT : Bank = 0 Row = 64
|
|
# tb_core.u_sdram32 : at time 15277.0 ns WRITE: Bank = 0 Row = 64, Col = 0, Data = cb203e96
|
|
# Status: Burst-No: 0 Write Address: 00040000 WriteData: cb203e96
|
|
# tb_core.u_sdram32 : at time 15287.0 ns WRITE: Bank = 0 Row = 64, Col = 1, Data = 8983b813
|
|
# Status: Burst-No: 1 Write Address: 00040000 WriteData: 8983b813
|
|
# tb_core.u_sdram32 : at time 15297.0 ns WRITE: Bank = 0 Row = 64, Col = 2, Data = 86bc380d
|
|
# Status: Burst-No: 2 Write Address: 00040000 WriteData: 86bc380d
|
|
# tb_core.u_sdram32 : at time 15307.0 ns WRITE: Bank = 0 Row = 64, Col = 3, Data = a9a7d653
|
|
# Status: Burst-No: 3 Write Address: 00040000 WriteData: a9a7d653
|
|
# tb_core.u_sdram32 : at time 15317.0 ns BST : Burst Terminate
|
|
# Write Address: 00050000, Burst Size: 5
|
|
# tb_core.u_sdram32 : at time 15367.0 ns ACT : Bank = 0 Row = 80
|
|
# tb_core.u_sdram32 : at time 15397.0 ns WRITE: Bank = 0 Row = 80, Col = 0, Data = 359fdd6b
|
|
# Status: Burst-No: 0 Write Address: 00050000 WriteData: 359fdd6b
|
|
# tb_core.u_sdram32 : at time 15407.0 ns WRITE: Bank = 0 Row = 80, Col = 1, Data = eaa62ad5
|
|
# Status: Burst-No: 1 Write Address: 00050000 WriteData: eaa62ad5
|
|
# tb_core.u_sdram32 : at time 15417.0 ns WRITE: Bank = 0 Row = 80, Col = 2, Data = 81174a02
|
|
# Status: Burst-No: 2 Write Address: 00050000 WriteData: 81174a02
|
|
# tb_core.u_sdram32 : at time 15427.0 ns WRITE: Bank = 0 Row = 80, Col = 3, Data = d7563eae
|
|
# Status: Burst-No: 3 Write Address: 00050000 WriteData: d7563eae
|
|
# tb_core.u_sdram32 : at time 15437.0 ns WRITE: Bank = 0 Row = 80, Col = 4, Data = 0effe91d
|
|
# Status: Burst-No: 4 Write Address: 00050000 WriteData: 0effe91d
|
|
# tb_core.u_sdram32 : at time 15447.0 ns BST : Burst Terminate
|
|
# Write Address: 00060000, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 15497.0 ns ACT : Bank = 0 Row = 96
|
|
# tb_core.u_sdram32 : at time 15527.0 ns WRITE: Bank = 0 Row = 96, Col = 0, Data = e7c572cf
|
|
# Status: Burst-No: 0 Write Address: 00060000 WriteData: e7c572cf
|
|
# tb_core.u_sdram32 : at time 15537.0 ns WRITE: Bank = 0 Row = 96, Col = 1, Data = 11844923
|
|
# Status: Burst-No: 1 Write Address: 00060000 WriteData: 11844923
|
|
# tb_core.u_sdram32 : at time 15547.0 ns WRITE: Bank = 0 Row = 96, Col = 2, Data = 0509650a
|
|
# Status: Burst-No: 2 Write Address: 00060000 WriteData: 0509650a
|
|
# tb_core.u_sdram32 : at time 15557.0 ns WRITE: Bank = 0 Row = 96, Col = 3, Data = e5730aca
|
|
# Status: Burst-No: 3 Write Address: 00060000 WriteData: e5730aca
|
|
# tb_core.u_sdram32 : at time 15567.0 ns WRITE: Bank = 0 Row = 96, Col = 4, Data = 9e314c3c
|
|
# Status: Burst-No: 4 Write Address: 00060000 WriteData: 9e314c3c
|
|
# tb_core.u_sdram32 : at time 15577.0 ns WRITE: Bank = 0 Row = 96, Col = 5, Data = 7968bdf2
|
|
# Status: Burst-No: 5 Write Address: 00060000 WriteData: 7968bdf2
|
|
# tb_core.u_sdram32 : at time 15587.0 ns BST : Burst Terminate
|
|
# Write Address: 00070000, Burst Size: 7
|
|
# tb_core.u_sdram32 : at time 15637.0 ns ACT : Bank = 0 Row = 112
|
|
# tb_core.u_sdram32 : at time 15667.0 ns WRITE: Bank = 0 Row = 112, Col = 0, Data = 452e618a
|
|
# Status: Burst-No: 0 Write Address: 00070000 WriteData: 452e618a
|
|
# tb_core.u_sdram32 : at time 15677.0 ns WRITE: Bank = 0 Row = 112, Col = 1, Data = 20c4b341
|
|
# Status: Burst-No: 1 Write Address: 00070000 WriteData: 20c4b341
|
|
# tb_core.u_sdram32 : at time 15687.0 ns WRITE: Bank = 0 Row = 112, Col = 2, Data = ec4b34d8
|
|
# Status: Burst-No: 2 Write Address: 00070000 WriteData: ec4b34d8
|
|
# tb_core.u_sdram32 : at time 15697.0 ns WRITE: Bank = 0 Row = 112, Col = 3, Data = 3c20f378
|
|
# Status: Burst-No: 3 Write Address: 00070000 WriteData: 3c20f378
|
|
# tb_core.u_sdram32 : at time 15707.0 ns WRITE: Bank = 0 Row = 112, Col = 4, Data = c48a1289
|
|
# Status: Burst-No: 4 Write Address: 00070000 WriteData: c48a1289
|
|
# tb_core.u_sdram32 : at time 15717.0 ns WRITE: Bank = 0 Row = 112, Col = 5, Data = 75c50deb
|
|
# Status: Burst-No: 5 Write Address: 00070000 WriteData: 75c50deb
|
|
# tb_core.u_sdram32 : at time 15727.0 ns WRITE: Bank = 0 Row = 112, Col = 6, Data = 5b0265b6
|
|
# Status: Burst-No: 6 Write Address: 00070000 WriteData: 5b0265b6
|
|
# tb_core.u_sdram32 : at time 15737.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 15777.0 ns ACT : Bank = 0 Row = 64
|
|
# tb_core.u_sdram32 : at time 15833.0 ns READ : Bank = 0 Row = 64, Col = 0, Data = cb203e96
|
|
# tb_core.u_sdram32 : at time 15843.0 ns READ : Bank = 0 Row = 64, Col = 1, Data = 8983b813
|
|
# READ STATUS: Burst-No: 0 Addr: 00040000 Rxd: cb203e96
|
|
# tb_core.u_sdram32 : at time 15847.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 15853.0 ns READ : Bank = 0 Row = 64, Col = 2, Data = 86bc380d
|
|
# READ STATUS: Burst-No: 1 Addr: 00040002 Rxd: 8983b813
|
|
# tb_core.u_sdram32 : at time 15863.0 ns READ : Bank = 0 Row = 64, Col = 3, Data = a9a7d653
|
|
# READ STATUS: Burst-No: 2 Addr: 00040004 Rxd: 86bc380d
|
|
# READ STATUS: Burst-No: 3 Addr: 00040006 Rxd: a9a7d653
|
|
# tb_core.u_sdram32 : at time 15937.0 ns ACT : Bank = 0 Row = 80
|
|
# tb_core.u_sdram32 : at time 15993.0 ns READ : Bank = 0 Row = 80, Col = 0, Data = 359fdd6b
|
|
# tb_core.u_sdram32 : at time 16003.0 ns READ : Bank = 0 Row = 80, Col = 1, Data = eaa62ad5
|
|
# READ STATUS: Burst-No: 0 Addr: 00050000 Rxd: 359fdd6b
|
|
# tb_core.u_sdram32 : at time 16013.0 ns READ : Bank = 0 Row = 80, Col = 2, Data = 81174a02
|
|
# tb_core.u_sdram32 : at time 16017.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 1 Addr: 00050002 Rxd: eaa62ad5
|
|
# tb_core.u_sdram32 : at time 16023.0 ns READ : Bank = 0 Row = 80, Col = 3, Data = d7563eae
|
|
# READ STATUS: Burst-No: 2 Addr: 00050004 Rxd: 81174a02
|
|
# tb_core.u_sdram32 : at time 16033.0 ns READ : Bank = 0 Row = 80, Col = 4, Data = 0effe91d
|
|
# READ STATUS: Burst-No: 3 Addr: 00050006 Rxd: d7563eae
|
|
# READ STATUS: Burst-No: 4 Addr: 00050008 Rxd: 0effe91d
|
|
# tb_core.u_sdram32 : at time 16107.0 ns ACT : Bank = 0 Row = 96
|
|
# tb_core.u_sdram32 : at time 16163.0 ns READ : Bank = 0 Row = 96, Col = 0, Data = e7c572cf
|
|
# tb_core.u_sdram32 : at time 16173.0 ns READ : Bank = 0 Row = 96, Col = 1, Data = 11844923
|
|
# READ STATUS: Burst-No: 0 Addr: 00060000 Rxd: e7c572cf
|
|
# tb_core.u_sdram32 : at time 16183.0 ns READ : Bank = 0 Row = 96, Col = 2, Data = 0509650a
|
|
# READ STATUS: Burst-No: 1 Addr: 00060002 Rxd: 11844923
|
|
# tb_core.u_sdram32 : at time 16193.0 ns READ : Bank = 0 Row = 96, Col = 3, Data = e5730aca
|
|
# tb_core.u_sdram32 : at time 16197.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 00060004 Rxd: 0509650a
|
|
# tb_core.u_sdram32 : at time 16203.0 ns READ : Bank = 0 Row = 96, Col = 4, Data = 9e314c3c
|
|
# READ STATUS: Burst-No: 3 Addr: 00060006 Rxd: e5730aca
|
|
# tb_core.u_sdram32 : at time 16213.0 ns READ : Bank = 0 Row = 96, Col = 5, Data = 7968bdf2
|
|
# READ STATUS: Burst-No: 4 Addr: 00060008 Rxd: 9e314c3c
|
|
# READ STATUS: Burst-No: 5 Addr: 0006000a Rxd: 7968bdf2
|
|
# tb_core.u_sdram32 : at time 16287.0 ns ACT : Bank = 0 Row = 112
|
|
# tb_core.u_sdram32 : at time 16343.0 ns READ : Bank = 0 Row = 112, Col = 0, Data = 452e618a
|
|
# tb_core.u_sdram32 : at time 16353.0 ns READ : Bank = 0 Row = 112, Col = 1, Data = 20c4b341
|
|
# READ STATUS: Burst-No: 0 Addr: 00070000 Rxd: 452e618a
|
|
# tb_core.u_sdram32 : at time 16363.0 ns READ : Bank = 0 Row = 112, Col = 2, Data = ec4b34d8
|
|
# READ STATUS: Burst-No: 1 Addr: 00070002 Rxd: 20c4b341
|
|
# tb_core.u_sdram32 : at time 16373.0 ns READ : Bank = 0 Row = 112, Col = 3, Data = 3c20f378
|
|
# READ STATUS: Burst-No: 2 Addr: 00070004 Rxd: ec4b34d8
|
|
# tb_core.u_sdram32 : at time 16383.0 ns READ : Bank = 0 Row = 112, Col = 4, Data = c48a1289
|
|
# tb_core.u_sdram32 : at time 16387.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 3 Addr: 00070006 Rxd: 3c20f378
|
|
# tb_core.u_sdram32 : at time 16393.0 ns READ : Bank = 0 Row = 112, Col = 5, Data = 75c50deb
|
|
# READ STATUS: Burst-No: 4 Addr: 00070008 Rxd: c48a1289
|
|
# tb_core.u_sdram32 : at time 16403.0 ns READ : Bank = 0 Row = 112, Col = 6, Data = 5b0265b6
|
|
# READ STATUS: Burst-No: 5 Addr: 0007000a Rxd: 75c50deb
|
|
# READ STATUS: Burst-No: 6 Addr: 0007000c Rxd: 5b0265b6
|
|
# ---------------------------------------
|
|
# Case:5 16 Write & 16 Read With Different Bank and Row
|
|
# ---------------------------------------
|
|
# Write Address: 00000000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 16487.0 ns ACT : Bank = 0 Row = 0
|
|
# tb_core.u_sdram32 : at time 16517.0 ns WRITE: Bank = 0 Row = 0, Col = 0, Data = 634bf9c6
|
|
# Status: Burst-No: 0 Write Address: 00000000 WriteData: 634bf9c6
|
|
# tb_core.u_sdram32 : at time 16527.0 ns WRITE: Bank = 0 Row = 0, Col = 1, Data = 571513ae
|
|
# Status: Burst-No: 1 Write Address: 00000000 WriteData: 571513ae
|
|
# tb_core.u_sdram32 : at time 16537.0 ns WRITE: Bank = 0 Row = 0, Col = 2, Data = de7502bc
|
|
# Status: Burst-No: 2 Write Address: 00000000 WriteData: de7502bc
|
|
# tb_core.u_sdram32 : at time 16547.0 ns WRITE: Bank = 0 Row = 0, Col = 3, Data = 150fdd2a
|
|
# Status: Burst-No: 3 Write Address: 00000000 WriteData: 150fdd2a
|
|
# tb_core.u_sdram32 : at time 16557.0 ns BST : Burst Terminate
|
|
# Write Address: 00000400, Burst Size: 5
|
|
# tb_core.u_sdram32 : at time 16607.0 ns ACT : Bank = 1 Row = 0
|
|
# tb_core.u_sdram32 : at time 16637.0 ns WRITE: Bank = 1 Row = 0, Col = 0, Data = 85d79a0b
|
|
# Status: Burst-No: 0 Write Address: 00000400 WriteData: 85d79a0b
|
|
# tb_core.u_sdram32 : at time 16647.0 ns WRITE: Bank = 1 Row = 0, Col = 1, Data = b897be71
|
|
# Status: Burst-No: 1 Write Address: 00000400 WriteData: b897be71
|
|
# tb_core.u_sdram32 : at time 16657.0 ns WRITE: Bank = 1 Row = 0, Col = 2, Data = 42f24185
|
|
# Status: Burst-No: 2 Write Address: 00000400 WriteData: 42f24185
|
|
# tb_core.u_sdram32 : at time 16667.0 ns WRITE: Bank = 1 Row = 0, Col = 3, Data = 27f2554f
|
|
# Status: Burst-No: 3 Write Address: 00000400 WriteData: 27f2554f
|
|
# tb_core.u_sdram32 : at time 16677.0 ns WRITE: Bank = 1 Row = 0, Col = 4, Data = 9dcc603b
|
|
# Status: Burst-No: 4 Write Address: 00000400 WriteData: 9dcc603b
|
|
# tb_core.u_sdram32 : at time 16687.0 ns BST : Burst Terminate
|
|
# Write Address: 00000800, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 16737.0 ns ACT : Bank = 2 Row = 0
|
|
# tb_core.u_sdram32 : at time 16767.0 ns WRITE: Bank = 2 Row = 0, Col = 0, Data = 1d06333a
|
|
# Status: Burst-No: 0 Write Address: 00000800 WriteData: 1d06333a
|
|
# tb_core.u_sdram32 : at time 16777.0 ns WRITE: Bank = 2 Row = 0, Col = 1, Data = bf23327e
|
|
# Status: Burst-No: 1 Write Address: 00000800 WriteData: bf23327e
|
|
# tb_core.u_sdram32 : at time 16787.0 ns WRITE: Bank = 2 Row = 0, Col = 2, Data = 0aaa4b15
|
|
# Status: Burst-No: 2 Write Address: 00000800 WriteData: 0aaa4b15
|
|
# tb_core.u_sdram32 : at time 16797.0 ns WRITE: Bank = 2 Row = 0, Col = 3, Data = 78d99bf1
|
|
# Status: Burst-No: 3 Write Address: 00000800 WriteData: 78d99bf1
|
|
# tb_core.u_sdram32 : at time 16807.0 ns WRITE: Bank = 2 Row = 0, Col = 4, Data = 6c9c4bd9
|
|
# Status: Burst-No: 4 Write Address: 00000800 WriteData: 6c9c4bd9
|
|
# tb_core.u_sdram32 : at time 16817.0 ns WRITE: Bank = 2 Row = 0, Col = 5, Data = 31230762
|
|
# Status: Burst-No: 5 Write Address: 00000800 WriteData: 31230762
|
|
# tb_core.u_sdram32 : at time 16827.0 ns BST : Burst Terminate
|
|
# Write Address: 00000c00, Burst Size: 7
|
|
# tb_core.u_sdram32 : at time 16877.0 ns ACT : Bank = 3 Row = 0
|
|
# tb_core.u_sdram32 : at time 16907.0 ns WRITE: Bank = 3 Row = 0, Col = 0, Data = 2635fb4c
|
|
# Status: Burst-No: 0 Write Address: 00000c00 WriteData: 2635fb4c
|
|
# tb_core.u_sdram32 : at time 16917.0 ns WRITE: Bank = 3 Row = 0, Col = 1, Data = 4fa1559f
|
|
# Status: Burst-No: 1 Write Address: 00000c00 WriteData: 4fa1559f
|
|
# tb_core.u_sdram32 : at time 16927.0 ns WRITE: Bank = 3 Row = 0, Col = 2, Data = 47b9a18f
|
|
# Status: Burst-No: 2 Write Address: 00000c00 WriteData: 47b9a18f
|
|
# tb_core.u_sdram32 : at time 16937.0 ns WRITE: Bank = 3 Row = 0, Col = 3, Data = 7c6da9f8
|
|
# Status: Burst-No: 3 Write Address: 00000c00 WriteData: 7c6da9f8
|
|
# tb_core.u_sdram32 : at time 16947.0 ns WRITE: Bank = 3 Row = 0, Col = 4, Data = dbcd60b7
|
|
# Status: Burst-No: 4 Write Address: 00000c00 WriteData: dbcd60b7
|
|
# tb_core.u_sdram32 : at time 16957.0 ns WRITE: Bank = 3 Row = 0, Col = 5, Data = cfc4569f
|
|
# Status: Burst-No: 5 Write Address: 00000c00 WriteData: cfc4569f
|
|
# tb_core.u_sdram32 : at time 16967.0 ns WRITE: Bank = 3 Row = 0, Col = 6, Data = ae7d945c
|
|
# Status: Burst-No: 6 Write Address: 00000c00 WriteData: ae7d945c
|
|
# tb_core.u_sdram32 : at time 16977.0 ns BST : Burst Terminate
|
|
# Write Address: 00001000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 17027.0 ns ACT : Bank = 0 Row = 1
|
|
# tb_core.u_sdram32 : at time 17057.0 ns WRITE: Bank = 0 Row = 1, Col = 0, Data = adcbc05b
|
|
# Status: Burst-No: 0 Write Address: 00001000 WriteData: adcbc05b
|
|
# tb_core.u_sdram32 : at time 17067.0 ns WRITE: Bank = 0 Row = 1, Col = 1, Data = 44de3789
|
|
# Status: Burst-No: 1 Write Address: 00001000 WriteData: 44de3789
|
|
# tb_core.u_sdram32 : at time 17077.0 ns WRITE: Bank = 0 Row = 1, Col = 2, Data = a4ae3249
|
|
# Status: Burst-No: 2 Write Address: 00001000 WriteData: a4ae3249
|
|
# tb_core.u_sdram32 : at time 17087.0 ns WRITE: Bank = 0 Row = 1, Col = 3, Data = e8233ed0
|
|
# Status: Burst-No: 3 Write Address: 00001000 WriteData: e8233ed0
|
|
# tb_core.u_sdram32 : at time 17097.0 ns BST : Burst Terminate
|
|
# Write Address: 00001400, Burst Size: 5
|
|
# tb_core.u_sdram32 : at time 17147.0 ns ACT : Bank = 1 Row = 1
|
|
# tb_core.u_sdram32 : at time 17177.0 ns WRITE: Bank = 1 Row = 1, Col = 0, Data = ebfec0d7
|
|
# Status: Burst-No: 0 Write Address: 00001400 WriteData: ebfec0d7
|
|
# tb_core.u_sdram32 : at time 17187.0 ns WRITE: Bank = 1 Row = 1, Col = 1, Data = a8c7fc51
|
|
# Status: Burst-No: 1 Write Address: 00001400 WriteData: a8c7fc51
|
|
# tb_core.u_sdram32 : at time 17197.0 ns WRITE: Bank = 1 Row = 1, Col = 2, Data = 4b212f96
|
|
# Status: Burst-No: 2 Write Address: 00001400 WriteData: 4b212f96
|
|
# tb_core.u_sdram32 : at time 17207.0 ns WRITE: Bank = 1 Row = 1, Col = 3, Data = 061d7f0c
|
|
# Status: Burst-No: 3 Write Address: 00001400 WriteData: 061d7f0c
|
|
# tb_core.u_sdram32 : at time 17217.0 ns WRITE: Bank = 1 Row = 1, Col = 4, Data = e12ccec2
|
|
# Status: Burst-No: 4 Write Address: 00001400 WriteData: e12ccec2
|
|
# tb_core.u_sdram32 : at time 17227.0 ns BST : Burst Terminate
|
|
# Write Address: 00001800, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 17277.0 ns ACT : Bank = 2 Row = 1
|
|
# tb_core.u_sdram32 : at time 17307.0 ns WRITE: Bank = 2 Row = 1, Col = 0, Data = 6457edc8
|
|
# Status: Burst-No: 0 Write Address: 00001800 WriteData: 6457edc8
|
|
# tb_core.u_sdram32 : at time 17317.0 ns WRITE: Bank = 2 Row = 1, Col = 1, Data = bb825a77
|
|
# Status: Burst-No: 1 Write Address: 00001800 WriteData: bb825a77
|
|
# tb_core.u_sdram32 : at time 17327.0 ns WRITE: Bank = 2 Row = 1, Col = 2, Data = 1ef2ed3d
|
|
# Status: Burst-No: 2 Write Address: 00001800 WriteData: 1ef2ed3d
|
|
# tb_core.u_sdram32 : at time 17337.0 ns WRITE: Bank = 2 Row = 1, Col = 3, Data = 090cdb12
|
|
# Status: Burst-No: 3 Write Address: 00001800 WriteData: 090cdb12
|
|
# tb_core.u_sdram32 : at time 17347.0 ns WRITE: Bank = 2 Row = 1, Col = 4, Data = bf05007e
|
|
# Status: Burst-No: 4 Write Address: 00001800 WriteData: bf05007e
|
|
# tb_core.u_sdram32 : at time 17357.0 ns WRITE: Bank = 2 Row = 1, Col = 5, Data = 36e5816d
|
|
# Status: Burst-No: 5 Write Address: 00001800 WriteData: 36e5816d
|
|
# tb_core.u_sdram32 : at time 17367.0 ns BST : Burst Terminate
|
|
# Write Address: 00001c00, Burst Size: 7
|
|
# tb_core.u_sdram32 : at time 17417.0 ns ACT : Bank = 3 Row = 1
|
|
# tb_core.u_sdram32 : at time 17447.0 ns WRITE: Bank = 3 Row = 1, Col = 0, Data = 1cd9e739
|
|
# Status: Burst-No: 0 Write Address: 00001c00 WriteData: 1cd9e739
|
|
# tb_core.u_sdram32 : at time 17457.0 ns WRITE: Bank = 3 Row = 1, Col = 1, Data = 0fd28f1f
|
|
# Status: Burst-No: 1 Write Address: 00001c00 WriteData: 0fd28f1f
|
|
# tb_core.u_sdram32 : at time 17467.0 ns WRITE: Bank = 3 Row = 1, Col = 2, Data = e9ebf6d3
|
|
# Status: Burst-No: 2 Write Address: 00001c00 WriteData: e9ebf6d3
|
|
# tb_core.u_sdram32 : at time 17477.0 ns WRITE: Bank = 3 Row = 1, Col = 3, Data = 42d92f85
|
|
# Status: Burst-No: 3 Write Address: 00001c00 WriteData: 42d92f85
|
|
# tb_core.u_sdram32 : at time 17487.0 ns WRITE: Bank = 3 Row = 1, Col = 4, Data = bc148878
|
|
# Status: Burst-No: 4 Write Address: 00001c00 WriteData: bc148878
|
|
# tb_core.u_sdram32 : at time 17497.0 ns WRITE: Bank = 3 Row = 1, Col = 5, Data = 2dda595b
|
|
# Status: Burst-No: 5 Write Address: 00001c00 WriteData: 2dda595b
|
|
# tb_core.u_sdram32 : at time 17507.0 ns WRITE: Bank = 3 Row = 1, Col = 6, Data = 248b4b49
|
|
# Status: Burst-No: 6 Write Address: 00001c00 WriteData: 248b4b49
|
|
# tb_core.u_sdram32 : at time 17517.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 17557.0 ns ACT : Bank = 0 Row = 0
|
|
# tb_core.u_sdram32 : at time 17613.0 ns READ : Bank = 0 Row = 0, Col = 0, Data = 634bf9c6
|
|
# tb_core.u_sdram32 : at time 17623.0 ns READ : Bank = 0 Row = 0, Col = 1, Data = 571513ae
|
|
# READ STATUS: Burst-No: 0 Addr: 00000000 Rxd: 634bf9c6
|
|
# tb_core.u_sdram32 : at time 17627.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 17633.0 ns READ : Bank = 0 Row = 0, Col = 2, Data = de7502bc
|
|
# READ STATUS: Burst-No: 1 Addr: 00000002 Rxd: 571513ae
|
|
# tb_core.u_sdram32 : at time 17643.0 ns READ : Bank = 0 Row = 0, Col = 3, Data = 150fdd2a
|
|
# READ STATUS: Burst-No: 2 Addr: 00000004 Rxd: de7502bc
|
|
# READ STATUS: Burst-No: 3 Addr: 00000006 Rxd: 150fdd2a
|
|
# tb_core.u_sdram32 : at time 17717.0 ns ACT : Bank = 1 Row = 0
|
|
# tb_core.u_sdram32 : at time 17773.0 ns READ : Bank = 1 Row = 0, Col = 0, Data = 85d79a0b
|
|
# tb_core.u_sdram32 : at time 17783.0 ns READ : Bank = 1 Row = 0, Col = 1, Data = b897be71
|
|
# READ STATUS: Burst-No: 0 Addr: 00000400 Rxd: 85d79a0b
|
|
# tb_core.u_sdram32 : at time 17793.0 ns READ : Bank = 1 Row = 0, Col = 2, Data = 42f24185
|
|
# tb_core.u_sdram32 : at time 17797.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 1 Addr: 00000402 Rxd: b897be71
|
|
# tb_core.u_sdram32 : at time 17803.0 ns READ : Bank = 1 Row = 0, Col = 3, Data = 27f2554f
|
|
# READ STATUS: Burst-No: 2 Addr: 00000404 Rxd: 42f24185
|
|
# tb_core.u_sdram32 : at time 17813.0 ns READ : Bank = 1 Row = 0, Col = 4, Data = 9dcc603b
|
|
# READ STATUS: Burst-No: 3 Addr: 00000406 Rxd: 27f2554f
|
|
# READ STATUS: Burst-No: 4 Addr: 00000408 Rxd: 9dcc603b
|
|
# tb_core.u_sdram32 : at time 17887.0 ns ACT : Bank = 2 Row = 0
|
|
# tb_core.u_sdram32 : at time 17943.0 ns READ : Bank = 2 Row = 0, Col = 0, Data = 1d06333a
|
|
# tb_core.u_sdram32 : at time 17953.0 ns READ : Bank = 2 Row = 0, Col = 1, Data = bf23327e
|
|
# READ STATUS: Burst-No: 0 Addr: 00000800 Rxd: 1d06333a
|
|
# tb_core.u_sdram32 : at time 17963.0 ns READ : Bank = 2 Row = 0, Col = 2, Data = 0aaa4b15
|
|
# READ STATUS: Burst-No: 1 Addr: 00000802 Rxd: bf23327e
|
|
# tb_core.u_sdram32 : at time 17973.0 ns READ : Bank = 2 Row = 0, Col = 3, Data = 78d99bf1
|
|
# tb_core.u_sdram32 : at time 17977.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 00000804 Rxd: 0aaa4b15
|
|
# tb_core.u_sdram32 : at time 17983.0 ns READ : Bank = 2 Row = 0, Col = 4, Data = 6c9c4bd9
|
|
# READ STATUS: Burst-No: 3 Addr: 00000806 Rxd: 78d99bf1
|
|
# tb_core.u_sdram32 : at time 17993.0 ns READ : Bank = 2 Row = 0, Col = 5, Data = 31230762
|
|
# READ STATUS: Burst-No: 4 Addr: 00000808 Rxd: 6c9c4bd9
|
|
# READ STATUS: Burst-No: 5 Addr: 0000080a Rxd: 31230762
|
|
# tb_core.u_sdram32 : at time 18067.0 ns ACT : Bank = 3 Row = 0
|
|
# tb_core.u_sdram32 : at time 18123.0 ns READ : Bank = 3 Row = 0, Col = 0, Data = 2635fb4c
|
|
# tb_core.u_sdram32 : at time 18133.0 ns READ : Bank = 3 Row = 0, Col = 1, Data = 4fa1559f
|
|
# READ STATUS: Burst-No: 0 Addr: 00000c00 Rxd: 2635fb4c
|
|
# tb_core.u_sdram32 : at time 18143.0 ns READ : Bank = 3 Row = 0, Col = 2, Data = 47b9a18f
|
|
# READ STATUS: Burst-No: 1 Addr: 00000c02 Rxd: 4fa1559f
|
|
# tb_core.u_sdram32 : at time 18153.0 ns READ : Bank = 3 Row = 0, Col = 3, Data = 7c6da9f8
|
|
# READ STATUS: Burst-No: 2 Addr: 00000c04 Rxd: 47b9a18f
|
|
# tb_core.u_sdram32 : at time 18163.0 ns READ : Bank = 3 Row = 0, Col = 4, Data = dbcd60b7
|
|
# tb_core.u_sdram32 : at time 18167.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 3 Addr: 00000c06 Rxd: 7c6da9f8
|
|
# tb_core.u_sdram32 : at time 18173.0 ns READ : Bank = 3 Row = 0, Col = 5, Data = cfc4569f
|
|
# READ STATUS: Burst-No: 4 Addr: 00000c08 Rxd: dbcd60b7
|
|
# tb_core.u_sdram32 : at time 18183.0 ns READ : Bank = 3 Row = 0, Col = 6, Data = ae7d945c
|
|
# READ STATUS: Burst-No: 5 Addr: 00000c0a Rxd: cfc4569f
|
|
# READ STATUS: Burst-No: 6 Addr: 00000c0c Rxd: ae7d945c
|
|
# tb_core.u_sdram32 : at time 18257.0 ns ACT : Bank = 0 Row = 1
|
|
# tb_core.u_sdram32 : at time 18313.0 ns READ : Bank = 0 Row = 1, Col = 0, Data = adcbc05b
|
|
# tb_core.u_sdram32 : at time 18323.0 ns READ : Bank = 0 Row = 1, Col = 1, Data = 44de3789
|
|
# READ STATUS: Burst-No: 0 Addr: 00001000 Rxd: adcbc05b
|
|
# tb_core.u_sdram32 : at time 18327.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 18333.0 ns READ : Bank = 0 Row = 1, Col = 2, Data = a4ae3249
|
|
# READ STATUS: Burst-No: 1 Addr: 00001002 Rxd: 44de3789
|
|
# tb_core.u_sdram32 : at time 18343.0 ns READ : Bank = 0 Row = 1, Col = 3, Data = e8233ed0
|
|
# READ STATUS: Burst-No: 2 Addr: 00001004 Rxd: a4ae3249
|
|
# READ STATUS: Burst-No: 3 Addr: 00001006 Rxd: e8233ed0
|
|
# tb_core.u_sdram32 : at time 18417.0 ns ACT : Bank = 1 Row = 1
|
|
# tb_core.u_sdram32 : at time 18473.0 ns READ : Bank = 1 Row = 1, Col = 0, Data = ebfec0d7
|
|
# tb_core.u_sdram32 : at time 18483.0 ns READ : Bank = 1 Row = 1, Col = 1, Data = a8c7fc51
|
|
# READ STATUS: Burst-No: 0 Addr: 00001400 Rxd: ebfec0d7
|
|
# tb_core.u_sdram32 : at time 18493.0 ns READ : Bank = 1 Row = 1, Col = 2, Data = 4b212f96
|
|
# tb_core.u_sdram32 : at time 18497.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 1 Addr: 00001402 Rxd: a8c7fc51
|
|
# tb_core.u_sdram32 : at time 18503.0 ns READ : Bank = 1 Row = 1, Col = 3, Data = 061d7f0c
|
|
# READ STATUS: Burst-No: 2 Addr: 00001404 Rxd: 4b212f96
|
|
# tb_core.u_sdram32 : at time 18513.0 ns READ : Bank = 1 Row = 1, Col = 4, Data = e12ccec2
|
|
# READ STATUS: Burst-No: 3 Addr: 00001406 Rxd: 061d7f0c
|
|
# READ STATUS: Burst-No: 4 Addr: 00001408 Rxd: e12ccec2
|
|
# tb_core.u_sdram32 : at time 18587.0 ns ACT : Bank = 2 Row = 1
|
|
# tb_core.u_sdram32 : at time 18643.0 ns READ : Bank = 2 Row = 1, Col = 0, Data = 6457edc8
|
|
# tb_core.u_sdram32 : at time 18653.0 ns READ : Bank = 2 Row = 1, Col = 1, Data = bb825a77
|
|
# READ STATUS: Burst-No: 0 Addr: 00001800 Rxd: 6457edc8
|
|
# tb_core.u_sdram32 : at time 18663.0 ns READ : Bank = 2 Row = 1, Col = 2, Data = 1ef2ed3d
|
|
# READ STATUS: Burst-No: 1 Addr: 00001802 Rxd: bb825a77
|
|
# tb_core.u_sdram32 : at time 18673.0 ns READ : Bank = 2 Row = 1, Col = 3, Data = 090cdb12
|
|
# tb_core.u_sdram32 : at time 18677.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 00001804 Rxd: 1ef2ed3d
|
|
# tb_core.u_sdram32 : at time 18683.0 ns READ : Bank = 2 Row = 1, Col = 4, Data = bf05007e
|
|
# READ STATUS: Burst-No: 3 Addr: 00001806 Rxd: 090cdb12
|
|
# tb_core.u_sdram32 : at time 18693.0 ns READ : Bank = 2 Row = 1, Col = 5, Data = 36e5816d
|
|
# READ STATUS: Burst-No: 4 Addr: 00001808 Rxd: bf05007e
|
|
# READ STATUS: Burst-No: 5 Addr: 0000180a Rxd: 36e5816d
|
|
# tb_core.u_sdram32 : at time 18767.0 ns ACT : Bank = 3 Row = 1
|
|
# tb_core.u_sdram32 : at time 18823.0 ns READ : Bank = 3 Row = 1, Col = 0, Data = 1cd9e739
|
|
# tb_core.u_sdram32 : at time 18833.0 ns READ : Bank = 3 Row = 1, Col = 1, Data = 0fd28f1f
|
|
# READ STATUS: Burst-No: 0 Addr: 00001c00 Rxd: 1cd9e739
|
|
# tb_core.u_sdram32 : at time 18843.0 ns READ : Bank = 3 Row = 1, Col = 2, Data = e9ebf6d3
|
|
# READ STATUS: Burst-No: 1 Addr: 00001c02 Rxd: 0fd28f1f
|
|
# tb_core.u_sdram32 : at time 18853.0 ns READ : Bank = 3 Row = 1, Col = 3, Data = 42d92f85
|
|
# READ STATUS: Burst-No: 2 Addr: 00001c04 Rxd: e9ebf6d3
|
|
# tb_core.u_sdram32 : at time 18863.0 ns READ : Bank = 3 Row = 1, Col = 4, Data = bc148878
|
|
# tb_core.u_sdram32 : at time 18867.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 3 Addr: 00001c06 Rxd: 42d92f85
|
|
# tb_core.u_sdram32 : at time 18873.0 ns READ : Bank = 3 Row = 1, Col = 5, Data = 2dda595b
|
|
# READ STATUS: Burst-No: 4 Addr: 00001c08 Rxd: bc148878
|
|
# tb_core.u_sdram32 : at time 18883.0 ns READ : Bank = 3 Row = 1, Col = 6, Data = 248b4b49
|
|
# READ STATUS: Burst-No: 5 Addr: 00001c0a Rxd: 2dda595b
|
|
# READ STATUS: Burst-No: 6 Addr: 00001c0c Rxd: 248b4b49
|
|
# Write Address: 00002000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 18967.0 ns ACT : Bank = 0 Row = 2
|
|
# tb_core.u_sdram32 : at time 18997.0 ns WRITE: Bank = 0 Row = 2, Col = 0, Data = 9ff2ae3f
|
|
# Status: Burst-No: 0 Write Address: 00002000 WriteData: 9ff2ae3f
|
|
# tb_core.u_sdram32 : at time 19007.0 ns WRITE: Bank = 0 Row = 2, Col = 1, Data = 150caf2a
|
|
# Status: Burst-No: 1 Write Address: 00002000 WriteData: 150caf2a
|
|
# tb_core.u_sdram32 : at time 19017.0 ns WRITE: Bank = 0 Row = 2, Col = 2, Data = 2c156358
|
|
# Status: Burst-No: 2 Write Address: 00002000 WriteData: 2c156358
|
|
# tb_core.u_sdram32 : at time 19027.0 ns WRITE: Bank = 0 Row = 2, Col = 3, Data = c33f3886
|
|
# Status: Burst-No: 3 Write Address: 00002000 WriteData: c33f3886
|
|
# tb_core.u_sdram32 : at time 19037.0 ns BST : Burst Terminate
|
|
# Write Address: 00002400, Burst Size: 5
|
|
# tb_core.u_sdram32 : at time 19087.0 ns ACT : Bank = 1 Row = 2
|
|
# tb_core.u_sdram32 : at time 19117.0 ns WRITE: Bank = 1 Row = 2, Col = 0, Data = c71a0c8e
|
|
# Status: Burst-No: 0 Write Address: 00002400 WriteData: c71a0c8e
|
|
# tb_core.u_sdram32 : at time 19127.0 ns WRITE: Bank = 1 Row = 2, Col = 1, Data = ce2ff29c
|
|
# Status: Burst-No: 1 Write Address: 00002400 WriteData: ce2ff29c
|
|
# tb_core.u_sdram32 : at time 19137.0 ns WRITE: Bank = 1 Row = 2, Col = 2, Data = 7d3599fa
|
|
# Status: Burst-No: 2 Write Address: 00002400 WriteData: 7d3599fa
|
|
# tb_core.u_sdram32 : at time 19147.0 ns WRITE: Bank = 1 Row = 2, Col = 3, Data = 937dbc26
|
|
# Status: Burst-No: 3 Write Address: 00002400 WriteData: 937dbc26
|
|
# tb_core.u_sdram32 : at time 19157.0 ns WRITE: Bank = 1 Row = 2, Col = 4, Data = 39961773
|
|
# Status: Burst-No: 4 Write Address: 00002400 WriteData: 39961773
|
|
# tb_core.u_sdram32 : at time 19167.0 ns BST : Burst Terminate
|
|
# Write Address: 00002800, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 19217.0 ns ACT : Bank = 2 Row = 2
|
|
# tb_core.u_sdram32 : at time 19247.0 ns WRITE: Bank = 2 Row = 2, Col = 0, Data = d18bb4a3
|
|
# Status: Burst-No: 0 Write Address: 00002800 WriteData: d18bb4a3
|
|
# tb_core.u_sdram32 : at time 19257.0 ns WRITE: Bank = 2 Row = 2, Col = 1, Data = 9799a82f
|
|
# Status: Burst-No: 1 Write Address: 00002800 WriteData: 9799a82f
|
|
# tb_core.u_sdram32 : at time 19267.0 ns WRITE: Bank = 2 Row = 2, Col = 2, Data = d9d292b3
|
|
# Status: Burst-No: 2 Write Address: 00002800 WriteData: d9d292b3
|
|
# tb_core.u_sdram32 : at time 19277.0 ns WRITE: Bank = 2 Row = 2, Col = 3, Data = afd8565f
|
|
# Status: Burst-No: 3 Write Address: 00002800 WriteData: afd8565f
|
|
# tb_core.u_sdram32 : at time 19287.0 ns WRITE: Bank = 2 Row = 2, Col = 4, Data = 22290d44
|
|
# Status: Burst-No: 4 Write Address: 00002800 WriteData: 22290d44
|
|
# tb_core.u_sdram32 : at time 19297.0 ns WRITE: Bank = 2 Row = 2, Col = 5, Data = 7bf8fdf7
|
|
# Status: Burst-No: 5 Write Address: 00002800 WriteData: 7bf8fdf7
|
|
# tb_core.u_sdram32 : at time 19307.0 ns BST : Burst Terminate
|
|
# Write Address: 00002c00, Burst Size: 7
|
|
# tb_core.u_sdram32 : at time 19357.0 ns ACT : Bank = 3 Row = 2
|
|
# tb_core.u_sdram32 : at time 19387.0 ns WRITE: Bank = 3 Row = 2, Col = 0, Data = e59b36cb
|
|
# Status: Burst-No: 0 Write Address: 00002c00 WriteData: e59b36cb
|
|
# tb_core.u_sdram32 : at time 19397.0 ns WRITE: Bank = 3 Row = 2, Col = 1, Data = f3091ae6
|
|
# Status: Burst-No: 1 Write Address: 00002c00 WriteData: f3091ae6
|
|
# tb_core.u_sdram32 : at time 19407.0 ns WRITE: Bank = 3 Row = 2, Col = 2, Data = 2d28db5a
|
|
# Status: Burst-No: 2 Write Address: 00002c00 WriteData: 2d28db5a
|
|
# tb_core.u_sdram32 : at time 19417.0 ns WRITE: Bank = 3 Row = 2, Col = 3, Data = 14cfc129
|
|
# Status: Burst-No: 3 Write Address: 00002c00 WriteData: 14cfc129
|
|
# tb_core.u_sdram32 : at time 19427.0 ns WRITE: Bank = 3 Row = 2, Col = 4, Data = f682e2ed
|
|
# Status: Burst-No: 4 Write Address: 00002c00 WriteData: f682e2ed
|
|
# tb_core.u_sdram32 : at time 19437.0 ns WRITE: Bank = 3 Row = 2, Col = 5, Data = ed536cda
|
|
# Status: Burst-No: 5 Write Address: 00002c00 WriteData: ed536cda
|
|
# tb_core.u_sdram32 : at time 19447.0 ns WRITE: Bank = 3 Row = 2, Col = 6, Data = b29fb665
|
|
# Status: Burst-No: 6 Write Address: 00002c00 WriteData: b29fb665
|
|
# tb_core.u_sdram32 : at time 19457.0 ns BST : Burst Terminate
|
|
# Write Address: 00003000, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 19507.0 ns ACT : Bank = 0 Row = 3
|
|
# tb_core.u_sdram32 : at time 19537.0 ns WRITE: Bank = 0 Row = 3, Col = 0, Data = da8ae2b5
|
|
# Status: Burst-No: 0 Write Address: 00003000 WriteData: da8ae2b5
|
|
# tb_core.u_sdram32 : at time 19547.0 ns WRITE: Bank = 0 Row = 3, Col = 1, Data = efbe94df
|
|
# Status: Burst-No: 1 Write Address: 00003000 WriteData: efbe94df
|
|
# tb_core.u_sdram32 : at time 19557.0 ns WRITE: Bank = 0 Row = 3, Col = 2, Data = 3cf11979
|
|
# Status: Burst-No: 2 Write Address: 00003000 WriteData: 3cf11979
|
|
# tb_core.u_sdram32 : at time 19567.0 ns WRITE: Bank = 0 Row = 3, Col = 3, Data = 2231ff44
|
|
# Status: Burst-No: 3 Write Address: 00003000 WriteData: 2231ff44
|
|
# tb_core.u_sdram32 : at time 19577.0 ns BST : Burst Terminate
|
|
# Write Address: 00003400, Burst Size: 5
|
|
# tb_core.u_sdram32 : at time 19627.0 ns ACT : Bank = 1 Row = 3
|
|
# tb_core.u_sdram32 : at time 19657.0 ns WRITE: Bank = 1 Row = 3, Col = 0, Data = e8740cd0
|
|
# Status: Burst-No: 0 Write Address: 00003400 WriteData: e8740cd0
|
|
# tb_core.u_sdram32 : at time 19667.0 ns WRITE: Bank = 1 Row = 3, Col = 1, Data = 15090b2a
|
|
# Status: Burst-No: 1 Write Address: 00003400 WriteData: 15090b2a
|
|
# tb_core.u_sdram32 : at time 19677.0 ns WRITE: Bank = 1 Row = 3, Col = 2, Data = 55f6adab
|
|
# Status: Burst-No: 2 Write Address: 00003400 WriteData: 55f6adab
|
|
# tb_core.u_sdram32 : at time 19687.0 ns WRITE: Bank = 1 Row = 3, Col = 3, Data = 076fcf0e
|
|
# Status: Burst-No: 3 Write Address: 00003400 WriteData: 076fcf0e
|
|
# tb_core.u_sdram32 : at time 19697.0 ns WRITE: Bank = 1 Row = 3, Col = 4, Data = 6e5daddc
|
|
# Status: Burst-No: 4 Write Address: 00003400 WriteData: 6e5daddc
|
|
# tb_core.u_sdram32 : at time 19707.0 ns BST : Burst Terminate
|
|
# Write Address: 00003800, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 19757.0 ns ACT : Bank = 2 Row = 3
|
|
# tb_core.u_sdram32 : at time 19787.0 ns WRITE: Bank = 2 Row = 3, Col = 0, Data = cd5ebc9a
|
|
# Status: Burst-No: 0 Write Address: 00003800 WriteData: cd5ebc9a
|
|
# tb_core.u_sdram32 : at time 19797.0 ns WRITE: Bank = 2 Row = 3, Col = 1, Data = fedf72fd
|
|
# Status: Burst-No: 1 Write Address: 00003800 WriteData: fedf72fd
|
|
# tb_core.u_sdram32 : at time 19807.0 ns WRITE: Bank = 2 Row = 3, Col = 2, Data = e1f102c3
|
|
# Status: Burst-No: 2 Write Address: 00003800 WriteData: e1f102c3
|
|
# tb_core.u_sdram32 : at time 19817.0 ns WRITE: Bank = 2 Row = 3, Col = 3, Data = 2b0eed56
|
|
# Status: Burst-No: 3 Write Address: 00003800 WriteData: 2b0eed56
|
|
# tb_core.u_sdram32 : at time 19827.0 ns WRITE: Bank = 2 Row = 3, Col = 4, Data = 2779e94e
|
|
# Status: Burst-No: 4 Write Address: 00003800 WriteData: 2779e94e
|
|
# tb_core.u_sdram32 : at time 19837.0 ns WRITE: Bank = 2 Row = 3, Col = 5, Data = b3d97667
|
|
# Status: Burst-No: 5 Write Address: 00003800 WriteData: b3d97667
|
|
# tb_core.u_sdram32 : at time 19847.0 ns BST : Burst Terminate
|
|
# Write Address: 00003c00, Burst Size: 7
|
|
# tb_core.u_sdram32 : at time 19897.0 ns ACT : Bank = 3 Row = 3
|
|
# tb_core.u_sdram32 : at time 19927.0 ns WRITE: Bank = 3 Row = 3, Col = 0, Data = 8531340a
|
|
# Status: Burst-No: 0 Write Address: 00003c00 WriteData: 8531340a
|
|
# tb_core.u_sdram32 : at time 19937.0 ns WRITE: Bank = 3 Row = 3, Col = 1, Data = 5b6fb9b6
|
|
# Status: Burst-No: 1 Write Address: 00003c00 WriteData: 5b6fb9b6
|
|
# tb_core.u_sdram32 : at time 19947.0 ns WRITE: Bank = 3 Row = 3, Col = 2, Data = 9c0e8a38
|
|
# Status: Burst-No: 2 Write Address: 00003c00 WriteData: 9c0e8a38
|
|
# tb_core.u_sdram32 : at time 19957.0 ns WRITE: Bank = 3 Row = 3, Col = 3, Data = 3cd18779
|
|
# Status: Burst-No: 3 Write Address: 00003c00 WriteData: 3cd18779
|
|
# tb_core.u_sdram32 : at time 19967.0 ns WRITE: Bank = 3 Row = 3, Col = 4, Data = dc2bc4b8
|
|
# Status: Burst-No: 4 Write Address: 00003c00 WriteData: dc2bc4b8
|
|
# tb_core.u_sdram32 : at time 19977.0 ns WRITE: Bank = 3 Row = 3, Col = 5, Data = 4a74bf94
|
|
# Status: Burst-No: 5 Write Address: 00003c00 WriteData: 4a74bf94
|
|
# tb_core.u_sdram32 : at time 19987.0 ns WRITE: Bank = 3 Row = 3, Col = 6, Data = 49c65d93
|
|
# Status: Burst-No: 6 Write Address: 00003c00 WriteData: 49c65d93
|
|
# tb_core.u_sdram32 : at time 19997.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 20037.0 ns ACT : Bank = 0 Row = 2
|
|
# tb_core.u_sdram32 : at time 20093.0 ns READ : Bank = 0 Row = 2, Col = 0, Data = 9ff2ae3f
|
|
# tb_core.u_sdram32 : at time 20103.0 ns READ : Bank = 0 Row = 2, Col = 1, Data = 150caf2a
|
|
# READ STATUS: Burst-No: 0 Addr: 00002000 Rxd: 9ff2ae3f
|
|
# tb_core.u_sdram32 : at time 20107.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 20113.0 ns READ : Bank = 0 Row = 2, Col = 2, Data = 2c156358
|
|
# READ STATUS: Burst-No: 1 Addr: 00002002 Rxd: 150caf2a
|
|
# tb_core.u_sdram32 : at time 20123.0 ns READ : Bank = 0 Row = 2, Col = 3, Data = c33f3886
|
|
# READ STATUS: Burst-No: 2 Addr: 00002004 Rxd: 2c156358
|
|
# READ STATUS: Burst-No: 3 Addr: 00002006 Rxd: c33f3886
|
|
# tb_core.u_sdram32 : at time 20197.0 ns ACT : Bank = 1 Row = 2
|
|
# tb_core.u_sdram32 : at time 20253.0 ns READ : Bank = 1 Row = 2, Col = 0, Data = c71a0c8e
|
|
# tb_core.u_sdram32 : at time 20263.0 ns READ : Bank = 1 Row = 2, Col = 1, Data = ce2ff29c
|
|
# READ STATUS: Burst-No: 0 Addr: 00002400 Rxd: c71a0c8e
|
|
# tb_core.u_sdram32 : at time 20273.0 ns READ : Bank = 1 Row = 2, Col = 2, Data = 7d3599fa
|
|
# tb_core.u_sdram32 : at time 20277.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 1 Addr: 00002402 Rxd: ce2ff29c
|
|
# tb_core.u_sdram32 : at time 20283.0 ns READ : Bank = 1 Row = 2, Col = 3, Data = 937dbc26
|
|
# READ STATUS: Burst-No: 2 Addr: 00002404 Rxd: 7d3599fa
|
|
# tb_core.u_sdram32 : at time 20293.0 ns READ : Bank = 1 Row = 2, Col = 4, Data = 39961773
|
|
# READ STATUS: Burst-No: 3 Addr: 00002406 Rxd: 937dbc26
|
|
# READ STATUS: Burst-No: 4 Addr: 00002408 Rxd: 39961773
|
|
# tb_core.u_sdram32 : at time 20367.0 ns ACT : Bank = 2 Row = 2
|
|
# tb_core.u_sdram32 : at time 20423.0 ns READ : Bank = 2 Row = 2, Col = 0, Data = d18bb4a3
|
|
# tb_core.u_sdram32 : at time 20433.0 ns READ : Bank = 2 Row = 2, Col = 1, Data = 9799a82f
|
|
# READ STATUS: Burst-No: 0 Addr: 00002800 Rxd: d18bb4a3
|
|
# tb_core.u_sdram32 : at time 20443.0 ns READ : Bank = 2 Row = 2, Col = 2, Data = d9d292b3
|
|
# READ STATUS: Burst-No: 1 Addr: 00002802 Rxd: 9799a82f
|
|
# tb_core.u_sdram32 : at time 20453.0 ns READ : Bank = 2 Row = 2, Col = 3, Data = afd8565f
|
|
# tb_core.u_sdram32 : at time 20457.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 00002804 Rxd: d9d292b3
|
|
# tb_core.u_sdram32 : at time 20463.0 ns READ : Bank = 2 Row = 2, Col = 4, Data = 22290d44
|
|
# READ STATUS: Burst-No: 3 Addr: 00002806 Rxd: afd8565f
|
|
# tb_core.u_sdram32 : at time 20473.0 ns READ : Bank = 2 Row = 2, Col = 5, Data = 7bf8fdf7
|
|
# READ STATUS: Burst-No: 4 Addr: 00002808 Rxd: 22290d44
|
|
# READ STATUS: Burst-No: 5 Addr: 0000280a Rxd: 7bf8fdf7
|
|
# tb_core.u_sdram32 : at time 20547.0 ns ACT : Bank = 3 Row = 2
|
|
# tb_core.u_sdram32 : at time 20603.0 ns READ : Bank = 3 Row = 2, Col = 0, Data = e59b36cb
|
|
# tb_core.u_sdram32 : at time 20613.0 ns READ : Bank = 3 Row = 2, Col = 1, Data = f3091ae6
|
|
# READ STATUS: Burst-No: 0 Addr: 00002c00 Rxd: e59b36cb
|
|
# tb_core.u_sdram32 : at time 20623.0 ns READ : Bank = 3 Row = 2, Col = 2, Data = 2d28db5a
|
|
# READ STATUS: Burst-No: 1 Addr: 00002c02 Rxd: f3091ae6
|
|
# tb_core.u_sdram32 : at time 20633.0 ns READ : Bank = 3 Row = 2, Col = 3, Data = 14cfc129
|
|
# READ STATUS: Burst-No: 2 Addr: 00002c04 Rxd: 2d28db5a
|
|
# tb_core.u_sdram32 : at time 20643.0 ns READ : Bank = 3 Row = 2, Col = 4, Data = f682e2ed
|
|
# tb_core.u_sdram32 : at time 20647.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 3 Addr: 00002c06 Rxd: 14cfc129
|
|
# tb_core.u_sdram32 : at time 20653.0 ns READ : Bank = 3 Row = 2, Col = 5, Data = ed536cda
|
|
# READ STATUS: Burst-No: 4 Addr: 00002c08 Rxd: f682e2ed
|
|
# tb_core.u_sdram32 : at time 20663.0 ns READ : Bank = 3 Row = 2, Col = 6, Data = b29fb665
|
|
# READ STATUS: Burst-No: 5 Addr: 00002c0a Rxd: ed536cda
|
|
# READ STATUS: Burst-No: 6 Addr: 00002c0c Rxd: b29fb665
|
|
# tb_core.u_sdram32 : at time 20737.0 ns ACT : Bank = 0 Row = 3
|
|
# tb_core.u_sdram32 : at time 20793.0 ns READ : Bank = 0 Row = 3, Col = 0, Data = da8ae2b5
|
|
# tb_core.u_sdram32 : at time 20803.0 ns READ : Bank = 0 Row = 3, Col = 1, Data = efbe94df
|
|
# READ STATUS: Burst-No: 0 Addr: 00003000 Rxd: da8ae2b5
|
|
# tb_core.u_sdram32 : at time 20807.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 20813.0 ns READ : Bank = 0 Row = 3, Col = 2, Data = 3cf11979
|
|
# READ STATUS: Burst-No: 1 Addr: 00003002 Rxd: efbe94df
|
|
# tb_core.u_sdram32 : at time 20823.0 ns READ : Bank = 0 Row = 3, Col = 3, Data = 2231ff44
|
|
# READ STATUS: Burst-No: 2 Addr: 00003004 Rxd: 3cf11979
|
|
# READ STATUS: Burst-No: 3 Addr: 00003006 Rxd: 2231ff44
|
|
# tb_core.u_sdram32 : at time 20897.0 ns ACT : Bank = 1 Row = 3
|
|
# tb_core.u_sdram32 : at time 20953.0 ns READ : Bank = 1 Row = 3, Col = 0, Data = e8740cd0
|
|
# tb_core.u_sdram32 : at time 20963.0 ns READ : Bank = 1 Row = 3, Col = 1, Data = 15090b2a
|
|
# READ STATUS: Burst-No: 0 Addr: 00003400 Rxd: e8740cd0
|
|
# tb_core.u_sdram32 : at time 20973.0 ns READ : Bank = 1 Row = 3, Col = 2, Data = 55f6adab
|
|
# tb_core.u_sdram32 : at time 20977.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 1 Addr: 00003402 Rxd: 15090b2a
|
|
# tb_core.u_sdram32 : at time 20983.0 ns READ : Bank = 1 Row = 3, Col = 3, Data = 076fcf0e
|
|
# READ STATUS: Burst-No: 2 Addr: 00003404 Rxd: 55f6adab
|
|
# tb_core.u_sdram32 : at time 20993.0 ns READ : Bank = 1 Row = 3, Col = 4, Data = 6e5daddc
|
|
# READ STATUS: Burst-No: 3 Addr: 00003406 Rxd: 076fcf0e
|
|
# READ STATUS: Burst-No: 4 Addr: 00003408 Rxd: 6e5daddc
|
|
# tb_core.u_sdram32 : at time 21067.0 ns ACT : Bank = 2 Row = 3
|
|
# tb_core.u_sdram32 : at time 21123.0 ns READ : Bank = 2 Row = 3, Col = 0, Data = cd5ebc9a
|
|
# tb_core.u_sdram32 : at time 21133.0 ns READ : Bank = 2 Row = 3, Col = 1, Data = fedf72fd
|
|
# READ STATUS: Burst-No: 0 Addr: 00003800 Rxd: cd5ebc9a
|
|
# tb_core.u_sdram32 : at time 21143.0 ns READ : Bank = 2 Row = 3, Col = 2, Data = e1f102c3
|
|
# READ STATUS: Burst-No: 1 Addr: 00003802 Rxd: fedf72fd
|
|
# tb_core.u_sdram32 : at time 21153.0 ns READ : Bank = 2 Row = 3, Col = 3, Data = 2b0eed56
|
|
# tb_core.u_sdram32 : at time 21157.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 00003804 Rxd: e1f102c3
|
|
# tb_core.u_sdram32 : at time 21163.0 ns READ : Bank = 2 Row = 3, Col = 4, Data = 2779e94e
|
|
# READ STATUS: Burst-No: 3 Addr: 00003806 Rxd: 2b0eed56
|
|
# tb_core.u_sdram32 : at time 21173.0 ns READ : Bank = 2 Row = 3, Col = 5, Data = b3d97667
|
|
# READ STATUS: Burst-No: 4 Addr: 00003808 Rxd: 2779e94e
|
|
# READ STATUS: Burst-No: 5 Addr: 0000380a Rxd: b3d97667
|
|
# tb_core.u_sdram32 : at time 21247.0 ns ACT : Bank = 3 Row = 3
|
|
# tb_core.u_sdram32 : at time 21303.0 ns READ : Bank = 3 Row = 3, Col = 0, Data = 8531340a
|
|
# tb_core.u_sdram32 : at time 21313.0 ns READ : Bank = 3 Row = 3, Col = 1, Data = 5b6fb9b6
|
|
# READ STATUS: Burst-No: 0 Addr: 00003c00 Rxd: 8531340a
|
|
# tb_core.u_sdram32 : at time 21323.0 ns READ : Bank = 3 Row = 3, Col = 2, Data = 9c0e8a38
|
|
# READ STATUS: Burst-No: 1 Addr: 00003c02 Rxd: 5b6fb9b6
|
|
# tb_core.u_sdram32 : at time 21333.0 ns READ : Bank = 3 Row = 3, Col = 3, Data = 3cd18779
|
|
# READ STATUS: Burst-No: 2 Addr: 00003c04 Rxd: 9c0e8a38
|
|
# tb_core.u_sdram32 : at time 21343.0 ns READ : Bank = 3 Row = 3, Col = 4, Data = dc2bc4b8
|
|
# tb_core.u_sdram32 : at time 21347.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 3 Addr: 00003c06 Rxd: 3cd18779
|
|
# tb_core.u_sdram32 : at time 21353.0 ns READ : Bank = 3 Row = 3, Col = 5, Data = 4a74bf94
|
|
# READ STATUS: Burst-No: 4 Addr: 00003c08 Rxd: dc2bc4b8
|
|
# tb_core.u_sdram32 : at time 21363.0 ns READ : Bank = 3 Row = 3, Col = 6, Data = 49c65d93
|
|
# READ STATUS: Burst-No: 5 Addr: 00003c0a Rxd: 4a74bf94
|
|
# READ STATUS: Burst-No: 6 Addr: 00003c0c Rxd: 49c65d93
|
|
# ---------------------------------------------------
|
|
# Case: 6 Random 2 write and 2 read random
|
|
# ---------------------------------------------------
|
|
# Write Address: 003f2c04, Burst Size: 26
|
|
# tb_core.u_sdram32 : at time 21447.0 ns ACT : Bank = 3 Row = 1010
|
|
# tb_core.u_sdram32 : at time 21477.0 ns WRITE: Bank = 3 Row = 1010, Col = 1, Data = 6dcb69db
|
|
# Status: Burst-No: 0 Write Address: 003f2c04 WriteData: 6dcb69db
|
|
# tb_core.u_sdram32 : at time 21487.0 ns WRITE: Bank = 3 Row = 1010, Col = 2, Data = a6fcde4d
|
|
# Status: Burst-No: 1 Write Address: 003f2c04 WriteData: a6fcde4d
|
|
# tb_core.u_sdram32 : at time 21497.0 ns WRITE: Bank = 3 Row = 1010, Col = 3, Data = 6cb0b7d9
|
|
# Status: Burst-No: 2 Write Address: 003f2c04 WriteData: 6cb0b7d9
|
|
# tb_core.u_sdram32 : at time 21507.0 ns WRITE: Bank = 3 Row = 1010, Col = 4, Data = b6a4266d
|
|
# Status: Burst-No: 3 Write Address: 003f2c04 WriteData: b6a4266d
|
|
# tb_core.u_sdram32 : at time 21517.0 ns WRITE: Bank = 3 Row = 1010, Col = 5, Data = bb45e276
|
|
# Status: Burst-No: 4 Write Address: 003f2c04 WriteData: bb45e276
|
|
# tb_core.u_sdram32 : at time 21527.0 ns WRITE: Bank = 3 Row = 1010, Col = 6, Data = 653b49ca
|
|
# Status: Burst-No: 5 Write Address: 003f2c04 WriteData: 653b49ca
|
|
# tb_core.u_sdram32 : at time 21537.0 ns WRITE: Bank = 3 Row = 1010, Col = 7, Data = 5b172db6
|
|
# Status: Burst-No: 6 Write Address: 003f2c04 WriteData: 5b172db6
|
|
# tb_core.u_sdram32 : at time 21547.0 ns WRITE: Bank = 3 Row = 1010, Col = 8, Data = 4a937195
|
|
# Status: Burst-No: 7 Write Address: 003f2c04 WriteData: 4a937195
|
|
# tb_core.u_sdram32 : at time 21557.0 ns WRITE: Bank = 3 Row = 1010, Col = 9, Data = a3071a46
|
|
# Status: Burst-No: 8 Write Address: 003f2c04 WriteData: a3071a46
|
|
# tb_core.u_sdram32 : at time 21567.0 ns WRITE: Bank = 3 Row = 1010, Col = 10, Data = 02749b04
|
|
# Status: Burst-No: 9 Write Address: 003f2c04 WriteData: 02749b04
|
|
# tb_core.u_sdram32 : at time 21577.0 ns WRITE: Bank = 3 Row = 1010, Col = 11, Data = 7bd261f7
|
|
# Status: Burst-No: 10 Write Address: 003f2c04 WriteData: 7bd261f7
|
|
# tb_core.u_sdram32 : at time 21587.0 ns WRITE: Bank = 3 Row = 1010, Col = 12, Data = 34980769
|
|
# Status: Burst-No: 11 Write Address: 003f2c04 WriteData: 34980769
|
|
# tb_core.u_sdram32 : at time 21597.0 ns WRITE: Bank = 3 Row = 1010, Col = 13, Data = da6ebab4
|
|
# Status: Burst-No: 12 Write Address: 003f2c04 WriteData: da6ebab4
|
|
# tb_core.u_sdram32 : at time 21607.0 ns WRITE: Bank = 3 Row = 1010, Col = 14, Data = 44018d88
|
|
# Status: Burst-No: 13 Write Address: 003f2c04 WriteData: 44018d88
|
|
# tb_core.u_sdram32 : at time 21617.0 ns WRITE: Bank = 3 Row = 1010, Col = 15, Data = 147cd928
|
|
# Status: Burst-No: 14 Write Address: 003f2c04 WriteData: 147cd928
|
|
# tb_core.u_sdram32 : at time 21627.0 ns WRITE: Bank = 3 Row = 1010, Col = 16, Data = 9690042d
|
|
# Status: Burst-No: 15 Write Address: 003f2c04 WriteData: 9690042d
|
|
# tb_core.u_sdram32 : at time 21637.0 ns WRITE: Bank = 3 Row = 1010, Col = 17, Data = e3c530c7
|
|
# Status: Burst-No: 16 Write Address: 003f2c04 WriteData: e3c530c7
|
|
# tb_core.u_sdram32 : at time 21647.0 ns WRITE: Bank = 3 Row = 1010, Col = 18, Data = 975c9c2e
|
|
# Status: Burst-No: 17 Write Address: 003f2c04 WriteData: 975c9c2e
|
|
# tb_core.u_sdram32 : at time 21657.0 ns WRITE: Bank = 3 Row = 1010, Col = 19, Data = 8477e408
|
|
# Status: Burst-No: 18 Write Address: 003f2c04 WriteData: 8477e408
|
|
# tb_core.u_sdram32 : at time 21667.0 ns WRITE: Bank = 3 Row = 1010, Col = 20, Data = 0e41451c
|
|
# Status: Burst-No: 19 Write Address: 003f2c04 WriteData: 0e41451c
|
|
# tb_core.u_sdram32 : at time 21677.0 ns WRITE: Bank = 3 Row = 1010, Col = 21, Data = fea7a6fd
|
|
# Status: Burst-No: 20 Write Address: 003f2c04 WriteData: fea7a6fd
|
|
# tb_core.u_sdram32 : at time 21687.0 ns WRITE: Bank = 3 Row = 1010, Col = 22, Data = 149e0729
|
|
# Status: Burst-No: 21 Write Address: 003f2c04 WriteData: 149e0729
|
|
# tb_core.u_sdram32 : at time 21697.0 ns WRITE: Bank = 3 Row = 1010, Col = 23, Data = 8e37901c
|
|
# Status: Burst-No: 22 Write Address: 003f2c04 WriteData: 8e37901c
|
|
# tb_core.u_sdram32 : at time 21707.0 ns WRITE: Bank = 3 Row = 1010, Col = 24, Data = 43356786
|
|
# Status: Burst-No: 23 Write Address: 003f2c04 WriteData: 43356786
|
|
# tb_core.u_sdram32 : at time 21717.0 ns WRITE: Bank = 3 Row = 1010, Col = 25, Data = ed3408da
|
|
# Status: Burst-No: 24 Write Address: 003f2c04 WriteData: ed3408da
|
|
# tb_core.u_sdram32 : at time 21727.0 ns WRITE: Bank = 3 Row = 1010, Col = 26, Data = 9eb7c63d
|
|
# Status: Burst-No: 25 Write Address: 003f2c04 WriteData: 9eb7c63d
|
|
# tb_core.u_sdram32 : at time 21737.0 ns BST : Burst Terminate
|
|
# Write Address: 000ea766, Burst Size: 49
|
|
# tb_core.u_sdram32 : at time 21877.0 ns ACT : Bank = 1 Row = 234
|
|
# tb_core.u_sdram32 : at time 21907.0 ns WRITE: Bank = 1 Row = 234, Col = 217, Data = b9f50473
|
|
# Status: Burst-No: 0 Write Address: 000ea766 WriteData: b9f50473
|
|
# tb_core.u_sdram32 : at time 21917.0 ns ACT : Bank = 2 Row = 234
|
|
# tb_core.u_sdram32 : at time 21917.0 ns WRITE: Bank = 1 Row = 234, Col = 218, Data = 5d7199ba
|
|
# Status: Burst-No: 1 Write Address: 000ea766 WriteData: 5d7199ba
|
|
# tb_core.u_sdram32 : at time 21927.0 ns WRITE: Bank = 1 Row = 234, Col = 219, Data = 2f3ab35e
|
|
# Status: Burst-No: 2 Write Address: 000ea766 WriteData: 2f3ab35e
|
|
# tb_core.u_sdram32 : at time 21937.0 ns WRITE: Bank = 1 Row = 234, Col = 220, Data = 7d4779fa
|
|
# Status: Burst-No: 3 Write Address: 000ea766 WriteData: 7d4779fa
|
|
# tb_core.u_sdram32 : at time 21947.0 ns WRITE: Bank = 1 Row = 234, Col = 221, Data = 6a8e05d5
|
|
# Status: Burst-No: 4 Write Address: 000ea766 WriteData: 6a8e05d5
|
|
# tb_core.u_sdram32 : at time 21957.0 ns WRITE: Bank = 1 Row = 234, Col = 222, Data = 8d24f61a
|
|
# Status: Burst-No: 5 Write Address: 000ea766 WriteData: 8d24f61a
|
|
# tb_core.u_sdram32 : at time 21967.0 ns WRITE: Bank = 1 Row = 234, Col = 223, Data = dcf000b9
|
|
# Status: Burst-No: 6 Write Address: 000ea766 WriteData: dcf000b9
|
|
# tb_core.u_sdram32 : at time 21977.0 ns WRITE: Bank = 1 Row = 234, Col = 224, Data = 1b876137
|
|
# Status: Burst-No: 7 Write Address: 000ea766 WriteData: 1b876137
|
|
# tb_core.u_sdram32 : at time 21987.0 ns WRITE: Bank = 1 Row = 234, Col = 225, Data = 4b273796
|
|
# Status: Burst-No: 8 Write Address: 000ea766 WriteData: 4b273796
|
|
# tb_core.u_sdram32 : at time 21997.0 ns WRITE: Bank = 1 Row = 234, Col = 226, Data = 603921c0
|
|
# Status: Burst-No: 9 Write Address: 000ea766 WriteData: 603921c0
|
|
# tb_core.u_sdram32 : at time 22007.0 ns WRITE: Bank = 1 Row = 234, Col = 227, Data = 13259f26
|
|
# Status: Burst-No: 10 Write Address: 000ea766 WriteData: 13259f26
|
|
# tb_core.u_sdram32 : at time 22017.0 ns WRITE: Bank = 1 Row = 234, Col = 228, Data = db461ab6
|
|
# Status: Burst-No: 11 Write Address: 000ea766 WriteData: db461ab6
|
|
# tb_core.u_sdram32 : at time 22027.0 ns WRITE: Bank = 1 Row = 234, Col = 229, Data = 3e99837d
|
|
# Status: Burst-No: 12 Write Address: 000ea766 WriteData: 3e99837d
|
|
# tb_core.u_sdram32 : at time 22037.0 ns WRITE: Bank = 1 Row = 234, Col = 230, Data = 6e5f0fdc
|
|
# Status: Burst-No: 13 Write Address: 000ea766 WriteData: 6e5f0fdc
|
|
# tb_core.u_sdram32 : at time 22047.0 ns WRITE: Bank = 1 Row = 234, Col = 231, Data = 43615786
|
|
# Status: Burst-No: 14 Write Address: 000ea766 WriteData: 43615786
|
|
# tb_core.u_sdram32 : at time 22057.0 ns WRITE: Bank = 1 Row = 234, Col = 232, Data = 3c03ff78
|
|
# Status: Burst-No: 15 Write Address: 000ea766 WriteData: 3c03ff78
|
|
# tb_core.u_sdram32 : at time 22067.0 ns WRITE: Bank = 1 Row = 234, Col = 233, Data = 3f5a9b7e
|
|
# Status: Burst-No: 16 Write Address: 000ea766 WriteData: 3f5a9b7e
|
|
# tb_core.u_sdram32 : at time 22077.0 ns WRITE: Bank = 1 Row = 234, Col = 234, Data = ed8d80db
|
|
# Status: Burst-No: 17 Write Address: 000ea766 WriteData: ed8d80db
|
|
# tb_core.u_sdram32 : at time 22087.0 ns WRITE: Bank = 1 Row = 234, Col = 235, Data = e7c3b6cf
|
|
# Status: Burst-No: 18 Write Address: 000ea766 WriteData: e7c3b6cf
|
|
# tb_core.u_sdram32 : at time 22097.0 ns WRITE: Bank = 1 Row = 234, Col = 236, Data = 3ced2b79
|
|
# Status: Burst-No: 19 Write Address: 000ea766 WriteData: 3ced2b79
|
|
# tb_core.u_sdram32 : at time 22107.0 ns WRITE: Bank = 1 Row = 234, Col = 237, Data = fd28e4fa
|
|
# Status: Burst-No: 20 Write Address: 000ea766 WriteData: fd28e4fa
|
|
# tb_core.u_sdram32 : at time 22117.0 ns WRITE: Bank = 1 Row = 234, Col = 238, Data = b0bcee61
|
|
# Status: Burst-No: 21 Write Address: 000ea766 WriteData: b0bcee61
|
|
# tb_core.u_sdram32 : at time 22127.0 ns WRITE: Bank = 1 Row = 234, Col = 239, Data = 0b940917
|
|
# Status: Burst-No: 22 Write Address: 000ea766 WriteData: 0b940917
|
|
# tb_core.u_sdram32 : at time 22137.0 ns WRITE: Bank = 1 Row = 234, Col = 240, Data = d0f578a1
|
|
# Status: Burst-No: 23 Write Address: 000ea766 WriteData: d0f578a1
|
|
# tb_core.u_sdram32 : at time 22147.0 ns WRITE: Bank = 1 Row = 234, Col = 241, Data = 43779186
|
|
# Status: Burst-No: 24 Write Address: 000ea766 WriteData: 43779186
|
|
# tb_core.u_sdram32 : at time 22157.0 ns WRITE: Bank = 1 Row = 234, Col = 242, Data = a8639650
|
|
# Status: Burst-No: 25 Write Address: 000ea766 WriteData: a8639650
|
|
# tb_core.u_sdram32 : at time 22167.0 ns WRITE: Bank = 1 Row = 234, Col = 243, Data = 7a8c59f5
|
|
# Status: Burst-No: 26 Write Address: 000ea766 WriteData: 7a8c59f5
|
|
# tb_core.u_sdram32 : at time 22177.0 ns WRITE: Bank = 1 Row = 234, Col = 244, Data = 9ab48835
|
|
# Status: Burst-No: 27 Write Address: 000ea766 WriteData: 9ab48835
|
|
# tb_core.u_sdram32 : at time 22187.0 ns WRITE: Bank = 1 Row = 234, Col = 245, Data = 949a8a29
|
|
# Status: Burst-No: 28 Write Address: 000ea766 WriteData: 949a8a29
|
|
# tb_core.u_sdram32 : at time 22197.0 ns WRITE: Bank = 1 Row = 234, Col = 246, Data = 60b175c1
|
|
# Status: Burst-No: 29 Write Address: 000ea766 WriteData: 60b175c1
|
|
# tb_core.u_sdram32 : at time 22207.0 ns WRITE: Bank = 1 Row = 234, Col = 247, Data = e2e574c5
|
|
# Status: Burst-No: 30 Write Address: 000ea766 WriteData: e2e574c5
|
|
# tb_core.u_sdram32 : at time 22217.0 ns WRITE: Bank = 1 Row = 234, Col = 248, Data = cc01b498
|
|
# Status: Burst-No: 31 Write Address: 000ea766 WriteData: cc01b498
|
|
# tb_core.u_sdram32 : at time 22227.0 ns WRITE: Bank = 1 Row = 234, Col = 249, Data = 25b27b4b
|
|
# Status: Burst-No: 32 Write Address: 000ea766 WriteData: 25b27b4b
|
|
# tb_core.u_sdram32 : at time 22237.0 ns WRITE: Bank = 1 Row = 234, Col = 250, Data = b98c4273
|
|
# Status: Burst-No: 33 Write Address: 000ea766 WriteData: b98c4273
|
|
# tb_core.u_sdram32 : at time 22247.0 ns WRITE: Bank = 1 Row = 234, Col = 251, Data = f622e6ec
|
|
# Status: Burst-No: 34 Write Address: 000ea766 WriteData: f622e6ec
|
|
# tb_core.u_sdram32 : at time 22257.0 ns WRITE: Bank = 1 Row = 234, Col = 252, Data = c550168a
|
|
# Status: Burst-No: 35 Write Address: 000ea766 WriteData: c550168a
|
|
# tb_core.u_sdram32 : at time 22267.0 ns WRITE: Bank = 1 Row = 234, Col = 253, Data = 2758d14e
|
|
# Status: Burst-No: 36 Write Address: 000ea766 WriteData: 2758d14e
|
|
# tb_core.u_sdram32 : at time 22277.0 ns WRITE: Bank = 1 Row = 234, Col = 254, Data = d44b80a8
|
|
# Status: Burst-No: 37 Write Address: 000ea766 WriteData: d44b80a8
|
|
# tb_core.u_sdram32 : at time 22287.0 ns WRITE: Bank = 1 Row = 234, Col = 255, Data = 549efda9
|
|
# Status: Burst-No: 38 Write Address: 000ea766 WriteData: 549efda9
|
|
# tb_core.u_sdram32 : at time 22297.0 ns WRITE: Bank = 2 Row = 234, Col = 0, Data = d0ca8ca1
|
|
# Status: Burst-No: 39 Write Address: 000ea766 WriteData: d0ca8ca1
|
|
# tb_core.u_sdram32 : at time 22307.0 ns WRITE: Bank = 2 Row = 234, Col = 1, Data = 070bb90e
|
|
# Status: Burst-No: 40 Write Address: 000ea766 WriteData: 070bb90e
|
|
# tb_core.u_sdram32 : at time 22317.0 ns WRITE: Bank = 2 Row = 234, Col = 2, Data = f33466e6
|
|
# Status: Burst-No: 41 Write Address: 000ea766 WriteData: f33466e6
|
|
# tb_core.u_sdram32 : at time 22327.0 ns WRITE: Bank = 2 Row = 234, Col = 3, Data = cfd6c09f
|
|
# Status: Burst-No: 42 Write Address: 000ea766 WriteData: cfd6c09f
|
|
# tb_core.u_sdram32 : at time 22337.0 ns WRITE: Bank = 2 Row = 234, Col = 4, Data = 152fb52a
|
|
# Status: Burst-No: 43 Write Address: 000ea766 WriteData: 152fb52a
|
|
# tb_core.u_sdram32 : at time 22347.0 ns WRITE: Bank = 2 Row = 234, Col = 5, Data = 155a1d2a
|
|
# Status: Burst-No: 44 Write Address: 000ea766 WriteData: 155a1d2a
|
|
# tb_core.u_sdram32 : at time 22357.0 ns WRITE: Bank = 2 Row = 234, Col = 6, Data = c6b5f48d
|
|
# Status: Burst-No: 45 Write Address: 000ea766 WriteData: c6b5f48d
|
|
# tb_core.u_sdram32 : at time 22367.0 ns WRITE: Bank = 2 Row = 234, Col = 7, Data = 4f75ff9e
|
|
# Status: Burst-No: 46 Write Address: 000ea766 WriteData: 4f75ff9e
|
|
# tb_core.u_sdram32 : at time 22377.0 ns WRITE: Bank = 2 Row = 234, Col = 8, Data = 9c6de638
|
|
# Status: Burst-No: 47 Write Address: 000ea766 WriteData: 9c6de638
|
|
# tb_core.u_sdram32 : at time 22387.0 ns WRITE: Bank = 2 Row = 234, Col = 9, Data = bccfa879
|
|
# Status: Burst-No: 48 Write Address: 000ea766 WriteData: bccfa879
|
|
# tb_core.u_sdram32 : at time 22397.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 22533.0 ns READ : Bank = 3 Row = 1010, Col = 1, Data = 6dcb69db
|
|
# tb_core.u_sdram32 : at time 22543.0 ns READ : Bank = 3 Row = 1010, Col = 2, Data = a6fcde4d
|
|
# READ STATUS: Burst-No: 0 Addr: 003f2c04 Rxd: 6dcb69db
|
|
# tb_core.u_sdram32 : at time 22553.0 ns READ : Bank = 3 Row = 1010, Col = 3, Data = 6cb0b7d9
|
|
# READ STATUS: Burst-No: 1 Addr: 003f2c06 Rxd: a6fcde4d
|
|
# tb_core.u_sdram32 : at time 22563.0 ns READ : Bank = 3 Row = 1010, Col = 4, Data = b6a4266d
|
|
# READ STATUS: Burst-No: 2 Addr: 003f2c08 Rxd: 6cb0b7d9
|
|
# tb_core.u_sdram32 : at time 22573.0 ns READ : Bank = 3 Row = 1010, Col = 5, Data = bb45e276
|
|
# READ STATUS: Burst-No: 3 Addr: 003f2c0a Rxd: b6a4266d
|
|
# tb_core.u_sdram32 : at time 22583.0 ns READ : Bank = 3 Row = 1010, Col = 6, Data = 653b49ca
|
|
# READ STATUS: Burst-No: 4 Addr: 003f2c0c Rxd: bb45e276
|
|
# tb_core.u_sdram32 : at time 22593.0 ns READ : Bank = 3 Row = 1010, Col = 7, Data = 5b172db6
|
|
# READ STATUS: Burst-No: 5 Addr: 003f2c0e Rxd: 653b49ca
|
|
# tb_core.u_sdram32 : at time 22603.0 ns READ : Bank = 3 Row = 1010, Col = 8, Data = 4a937195
|
|
# READ STATUS: Burst-No: 6 Addr: 003f2c10 Rxd: 5b172db6
|
|
# tb_core.u_sdram32 : at time 22613.0 ns READ : Bank = 3 Row = 1010, Col = 9, Data = a3071a46
|
|
# READ STATUS: Burst-No: 7 Addr: 003f2c12 Rxd: 4a937195
|
|
# tb_core.u_sdram32 : at time 22623.0 ns READ : Bank = 3 Row = 1010, Col = 10, Data = 02749b04
|
|
# READ STATUS: Burst-No: 8 Addr: 003f2c14 Rxd: a3071a46
|
|
# tb_core.u_sdram32 : at time 22633.0 ns READ : Bank = 3 Row = 1010, Col = 11, Data = 7bd261f7
|
|
# READ STATUS: Burst-No: 9 Addr: 003f2c16 Rxd: 02749b04
|
|
# tb_core.u_sdram32 : at time 22643.0 ns READ : Bank = 3 Row = 1010, Col = 12, Data = 34980769
|
|
# READ STATUS: Burst-No: 10 Addr: 003f2c18 Rxd: 7bd261f7
|
|
# tb_core.u_sdram32 : at time 22653.0 ns READ : Bank = 3 Row = 1010, Col = 13, Data = da6ebab4
|
|
# READ STATUS: Burst-No: 11 Addr: 003f2c1a Rxd: 34980769
|
|
# tb_core.u_sdram32 : at time 22663.0 ns READ : Bank = 3 Row = 1010, Col = 14, Data = 44018d88
|
|
# READ STATUS: Burst-No: 12 Addr: 003f2c1c Rxd: da6ebab4
|
|
# tb_core.u_sdram32 : at time 22673.0 ns READ : Bank = 3 Row = 1010, Col = 15, Data = 147cd928
|
|
# READ STATUS: Burst-No: 13 Addr: 003f2c1e Rxd: 44018d88
|
|
# tb_core.u_sdram32 : at time 22683.0 ns READ : Bank = 3 Row = 1010, Col = 16, Data = 9690042d
|
|
# READ STATUS: Burst-No: 14 Addr: 003f2c20 Rxd: 147cd928
|
|
# tb_core.u_sdram32 : at time 22693.0 ns READ : Bank = 3 Row = 1010, Col = 17, Data = e3c530c7
|
|
# READ STATUS: Burst-No: 15 Addr: 003f2c22 Rxd: 9690042d
|
|
# tb_core.u_sdram32 : at time 22703.0 ns READ : Bank = 3 Row = 1010, Col = 18, Data = 975c9c2e
|
|
# READ STATUS: Burst-No: 16 Addr: 003f2c24 Rxd: e3c530c7
|
|
# tb_core.u_sdram32 : at time 22713.0 ns READ : Bank = 3 Row = 1010, Col = 19, Data = 8477e408
|
|
# READ STATUS: Burst-No: 17 Addr: 003f2c26 Rxd: 975c9c2e
|
|
# tb_core.u_sdram32 : at time 22723.0 ns READ : Bank = 3 Row = 1010, Col = 20, Data = 0e41451c
|
|
# READ STATUS: Burst-No: 18 Addr: 003f2c28 Rxd: 8477e408
|
|
# tb_core.u_sdram32 : at time 22733.0 ns READ : Bank = 3 Row = 1010, Col = 21, Data = fea7a6fd
|
|
# READ STATUS: Burst-No: 19 Addr: 003f2c2a Rxd: 0e41451c
|
|
# tb_core.u_sdram32 : at time 22743.0 ns READ : Bank = 3 Row = 1010, Col = 22, Data = 149e0729
|
|
# READ STATUS: Burst-No: 20 Addr: 003f2c2c Rxd: fea7a6fd
|
|
# tb_core.u_sdram32 : at time 22753.0 ns READ : Bank = 3 Row = 1010, Col = 23, Data = 8e37901c
|
|
# READ STATUS: Burst-No: 21 Addr: 003f2c2e Rxd: 149e0729
|
|
# tb_core.u_sdram32 : at time 22763.0 ns READ : Bank = 3 Row = 1010, Col = 24, Data = 43356786
|
|
# tb_core.u_sdram32 : at time 22767.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 22 Addr: 003f2c30 Rxd: 8e37901c
|
|
# tb_core.u_sdram32 : at time 22773.0 ns READ : Bank = 3 Row = 1010, Col = 25, Data = ed3408da
|
|
# READ STATUS: Burst-No: 23 Addr: 003f2c32 Rxd: 43356786
|
|
# tb_core.u_sdram32 : at time 22783.0 ns READ : Bank = 3 Row = 1010, Col = 26, Data = 9eb7c63d
|
|
# READ STATUS: Burst-No: 24 Addr: 003f2c34 Rxd: ed3408da
|
|
# READ STATUS: Burst-No: 25 Addr: 003f2c36 Rxd: 9eb7c63d
|
|
# tb_core.u_sdram32 : at time 22953.0 ns READ : Bank = 1 Row = 234, Col = 217, Data = b9f50473
|
|
# tb_core.u_sdram32 : at time 22963.0 ns READ : Bank = 1 Row = 234, Col = 218, Data = 5d7199ba
|
|
# READ STATUS: Burst-No: 0 Addr: 000ea766 Rxd: b9f50473
|
|
# tb_core.u_sdram32 : at time 22973.0 ns READ : Bank = 1 Row = 234, Col = 219, Data = 2f3ab35e
|
|
# READ STATUS: Burst-No: 1 Addr: 000ea768 Rxd: 5d7199ba
|
|
# tb_core.u_sdram32 : at time 22983.0 ns READ : Bank = 1 Row = 234, Col = 220, Data = 7d4779fa
|
|
# READ STATUS: Burst-No: 2 Addr: 000ea76a Rxd: 2f3ab35e
|
|
# tb_core.u_sdram32 : at time 22993.0 ns READ : Bank = 1 Row = 234, Col = 221, Data = 6a8e05d5
|
|
# READ STATUS: Burst-No: 3 Addr: 000ea76c Rxd: 7d4779fa
|
|
# tb_core.u_sdram32 : at time 23003.0 ns READ : Bank = 1 Row = 234, Col = 222, Data = 8d24f61a
|
|
# READ STATUS: Burst-No: 4 Addr: 000ea76e Rxd: 6a8e05d5
|
|
# tb_core.u_sdram32 : at time 23013.0 ns READ : Bank = 1 Row = 234, Col = 223, Data = dcf000b9
|
|
# READ STATUS: Burst-No: 5 Addr: 000ea770 Rxd: 8d24f61a
|
|
# tb_core.u_sdram32 : at time 23023.0 ns READ : Bank = 1 Row = 234, Col = 224, Data = 1b876137
|
|
# READ STATUS: Burst-No: 6 Addr: 000ea772 Rxd: dcf000b9
|
|
# tb_core.u_sdram32 : at time 23033.0 ns READ : Bank = 1 Row = 234, Col = 225, Data = 4b273796
|
|
# READ STATUS: Burst-No: 7 Addr: 000ea774 Rxd: 1b876137
|
|
# tb_core.u_sdram32 : at time 23043.0 ns READ : Bank = 1 Row = 234, Col = 226, Data = 603921c0
|
|
# READ STATUS: Burst-No: 8 Addr: 000ea776 Rxd: 4b273796
|
|
# tb_core.u_sdram32 : at time 23053.0 ns READ : Bank = 1 Row = 234, Col = 227, Data = 13259f26
|
|
# READ STATUS: Burst-No: 9 Addr: 000ea778 Rxd: 603921c0
|
|
# tb_core.u_sdram32 : at time 23063.0 ns READ : Bank = 1 Row = 234, Col = 228, Data = db461ab6
|
|
# READ STATUS: Burst-No: 10 Addr: 000ea77a Rxd: 13259f26
|
|
# tb_core.u_sdram32 : at time 23073.0 ns READ : Bank = 1 Row = 234, Col = 229, Data = 3e99837d
|
|
# READ STATUS: Burst-No: 11 Addr: 000ea77c Rxd: db461ab6
|
|
# tb_core.u_sdram32 : at time 23083.0 ns READ : Bank = 1 Row = 234, Col = 230, Data = 6e5f0fdc
|
|
# READ STATUS: Burst-No: 12 Addr: 000ea77e Rxd: 3e99837d
|
|
# tb_core.u_sdram32 : at time 23093.0 ns READ : Bank = 1 Row = 234, Col = 231, Data = 43615786
|
|
# READ STATUS: Burst-No: 13 Addr: 000ea780 Rxd: 6e5f0fdc
|
|
# tb_core.u_sdram32 : at time 23103.0 ns READ : Bank = 1 Row = 234, Col = 232, Data = 3c03ff78
|
|
# READ STATUS: Burst-No: 14 Addr: 000ea782 Rxd: 43615786
|
|
# tb_core.u_sdram32 : at time 23113.0 ns READ : Bank = 1 Row = 234, Col = 233, Data = 3f5a9b7e
|
|
# READ STATUS: Burst-No: 15 Addr: 000ea784 Rxd: 3c03ff78
|
|
# tb_core.u_sdram32 : at time 23123.0 ns READ : Bank = 1 Row = 234, Col = 234, Data = ed8d80db
|
|
# READ STATUS: Burst-No: 16 Addr: 000ea786 Rxd: 3f5a9b7e
|
|
# tb_core.u_sdram32 : at time 23133.0 ns READ : Bank = 1 Row = 234, Col = 235, Data = e7c3b6cf
|
|
# READ STATUS: Burst-No: 17 Addr: 000ea788 Rxd: ed8d80db
|
|
# tb_core.u_sdram32 : at time 23143.0 ns READ : Bank = 1 Row = 234, Col = 236, Data = 3ced2b79
|
|
# READ STATUS: Burst-No: 18 Addr: 000ea78a Rxd: e7c3b6cf
|
|
# tb_core.u_sdram32 : at time 23153.0 ns READ : Bank = 1 Row = 234, Col = 237, Data = fd28e4fa
|
|
# READ STATUS: Burst-No: 19 Addr: 000ea78c Rxd: 3ced2b79
|
|
# tb_core.u_sdram32 : at time 23163.0 ns READ : Bank = 1 Row = 234, Col = 238, Data = b0bcee61
|
|
# READ STATUS: Burst-No: 20 Addr: 000ea78e Rxd: fd28e4fa
|
|
# tb_core.u_sdram32 : at time 23173.0 ns READ : Bank = 1 Row = 234, Col = 239, Data = 0b940917
|
|
# READ STATUS: Burst-No: 21 Addr: 000ea790 Rxd: b0bcee61
|
|
# tb_core.u_sdram32 : at time 23183.0 ns READ : Bank = 1 Row = 234, Col = 240, Data = d0f578a1
|
|
# READ STATUS: Burst-No: 22 Addr: 000ea792 Rxd: 0b940917
|
|
# tb_core.u_sdram32 : at time 23193.0 ns READ : Bank = 1 Row = 234, Col = 241, Data = 43779186
|
|
# READ STATUS: Burst-No: 23 Addr: 000ea794 Rxd: d0f578a1
|
|
# tb_core.u_sdram32 : at time 23203.0 ns READ : Bank = 1 Row = 234, Col = 242, Data = a8639650
|
|
# READ STATUS: Burst-No: 24 Addr: 000ea796 Rxd: 43779186
|
|
# tb_core.u_sdram32 : at time 23213.0 ns READ : Bank = 1 Row = 234, Col = 243, Data = 7a8c59f5
|
|
# READ STATUS: Burst-No: 25 Addr: 000ea798 Rxd: a8639650
|
|
# tb_core.u_sdram32 : at time 23223.0 ns READ : Bank = 1 Row = 234, Col = 244, Data = 9ab48835
|
|
# READ STATUS: Burst-No: 26 Addr: 000ea79a Rxd: 7a8c59f5
|
|
# tb_core.u_sdram32 : at time 23233.0 ns READ : Bank = 1 Row = 234, Col = 245, Data = 949a8a29
|
|
# READ STATUS: Burst-No: 27 Addr: 000ea79c Rxd: 9ab48835
|
|
# tb_core.u_sdram32 : at time 23243.0 ns READ : Bank = 1 Row = 234, Col = 246, Data = 60b175c1
|
|
# READ STATUS: Burst-No: 28 Addr: 000ea79e Rxd: 949a8a29
|
|
# tb_core.u_sdram32 : at time 23253.0 ns READ : Bank = 1 Row = 234, Col = 247, Data = e2e574c5
|
|
# READ STATUS: Burst-No: 29 Addr: 000ea7a0 Rxd: 60b175c1
|
|
# tb_core.u_sdram32 : at time 23263.0 ns READ : Bank = 1 Row = 234, Col = 248, Data = cc01b498
|
|
# READ STATUS: Burst-No: 30 Addr: 000ea7a2 Rxd: e2e574c5
|
|
# tb_core.u_sdram32 : at time 23273.0 ns READ : Bank = 1 Row = 234, Col = 249, Data = 25b27b4b
|
|
# READ STATUS: Burst-No: 31 Addr: 000ea7a4 Rxd: cc01b498
|
|
# tb_core.u_sdram32 : at time 23283.0 ns READ : Bank = 1 Row = 234, Col = 250, Data = b98c4273
|
|
# READ STATUS: Burst-No: 32 Addr: 000ea7a6 Rxd: 25b27b4b
|
|
# tb_core.u_sdram32 : at time 23293.0 ns READ : Bank = 1 Row = 234, Col = 251, Data = f622e6ec
|
|
# READ STATUS: Burst-No: 33 Addr: 000ea7a8 Rxd: b98c4273
|
|
# tb_core.u_sdram32 : at time 23303.0 ns READ : Bank = 1 Row = 234, Col = 252, Data = c550168a
|
|
# READ STATUS: Burst-No: 34 Addr: 000ea7aa Rxd: f622e6ec
|
|
# tb_core.u_sdram32 : at time 23313.0 ns READ : Bank = 1 Row = 234, Col = 253, Data = 2758d14e
|
|
# READ STATUS: Burst-No: 35 Addr: 000ea7ac Rxd: c550168a
|
|
# tb_core.u_sdram32 : at time 23323.0 ns READ : Bank = 1 Row = 234, Col = 254, Data = d44b80a8
|
|
# READ STATUS: Burst-No: 36 Addr: 000ea7ae Rxd: 2758d14e
|
|
# tb_core.u_sdram32 : at time 23333.0 ns READ : Bank = 1 Row = 234, Col = 255, Data = 549efda9
|
|
# READ STATUS: Burst-No: 37 Addr: 000ea7b0 Rxd: d44b80a8
|
|
# tb_core.u_sdram32 : at time 23343.0 ns READ : Bank = 2 Row = 234, Col = 0, Data = d0ca8ca1
|
|
# READ STATUS: Burst-No: 38 Addr: 000ea7b2 Rxd: 549efda9
|
|
# tb_core.u_sdram32 : at time 23353.0 ns READ : Bank = 2 Row = 234, Col = 1, Data = 070bb90e
|
|
# READ STATUS: Burst-No: 39 Addr: 000ea7b4 Rxd: d0ca8ca1
|
|
# tb_core.u_sdram32 : at time 23363.0 ns READ : Bank = 2 Row = 234, Col = 2, Data = f33466e6
|
|
# READ STATUS: Burst-No: 40 Addr: 000ea7b6 Rxd: 070bb90e
|
|
# tb_core.u_sdram32 : at time 23373.0 ns READ : Bank = 2 Row = 234, Col = 3, Data = cfd6c09f
|
|
# READ STATUS: Burst-No: 41 Addr: 000ea7b8 Rxd: f33466e6
|
|
# tb_core.u_sdram32 : at time 23383.0 ns READ : Bank = 2 Row = 234, Col = 4, Data = 152fb52a
|
|
# READ STATUS: Burst-No: 42 Addr: 000ea7ba Rxd: cfd6c09f
|
|
# tb_core.u_sdram32 : at time 23393.0 ns READ : Bank = 2 Row = 234, Col = 5, Data = 155a1d2a
|
|
# READ STATUS: Burst-No: 43 Addr: 000ea7bc Rxd: 152fb52a
|
|
# tb_core.u_sdram32 : at time 23403.0 ns READ : Bank = 2 Row = 234, Col = 6, Data = c6b5f48d
|
|
# READ STATUS: Burst-No: 44 Addr: 000ea7be Rxd: 155a1d2a
|
|
# tb_core.u_sdram32 : at time 23413.0 ns READ : Bank = 2 Row = 234, Col = 7, Data = 4f75ff9e
|
|
# tb_core.u_sdram32 : at time 23417.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 45 Addr: 000ea7c0 Rxd: c6b5f48d
|
|
# tb_core.u_sdram32 : at time 23423.0 ns READ : Bank = 2 Row = 234, Col = 8, Data = 9c6de638
|
|
# READ STATUS: Burst-No: 46 Addr: 000ea7c2 Rxd: 4f75ff9e
|
|
# tb_core.u_sdram32 : at time 23433.0 ns READ : Bank = 2 Row = 234, Col = 9, Data = bccfa879
|
|
# READ STATUS: Burst-No: 47 Addr: 000ea7c4 Rxd: 9c6de638
|
|
# READ STATUS: Burst-No: 48 Addr: 000ea7c6 Rxd: bccfa879
|
|
# Write Address: 0024e3c8, Burst Size: 11
|
|
# tb_core.u_sdram32 : at time 23607.0 ns ACT : Bank = 0 Row = 590
|
|
# tb_core.u_sdram32 : at time 23637.0 ns WRITE: Bank = 0 Row = 590, Col = 242, Data = 09ff4113
|
|
# Status: Burst-No: 0 Write Address: 0024e3c8 WriteData: 09ff4113
|
|
# tb_core.u_sdram32 : at time 23647.0 ns WRITE: Bank = 0 Row = 590, Col = 243, Data = 35a0c96b
|
|
# Status: Burst-No: 1 Write Address: 0024e3c8 WriteData: 35a0c96b
|
|
# tb_core.u_sdram32 : at time 23657.0 ns WRITE: Bank = 0 Row = 590, Col = 244, Data = e3b7aec7
|
|
# Status: Burst-No: 2 Write Address: 0024e3c8 WriteData: e3b7aec7
|
|
# tb_core.u_sdram32 : at time 23667.0 ns WRITE: Bank = 0 Row = 590, Col = 245, Data = 5b0bddb6
|
|
# Status: Burst-No: 3 Write Address: 0024e3c8 WriteData: 5b0bddb6
|
|
# tb_core.u_sdram32 : at time 23677.0 ns WRITE: Bank = 0 Row = 590, Col = 246, Data = 5d059dba
|
|
# Status: Burst-No: 4 Write Address: 0024e3c8 WriteData: 5d059dba
|
|
# tb_core.u_sdram32 : at time 23687.0 ns WRITE: Bank = 0 Row = 590, Col = 247, Data = 6216abc4
|
|
# Status: Burst-No: 5 Write Address: 0024e3c8 WriteData: 6216abc4
|
|
# tb_core.u_sdram32 : at time 23697.0 ns WRITE: Bank = 0 Row = 590, Col = 248, Data = 5c8295b9
|
|
# Status: Burst-No: 6 Write Address: 0024e3c8 WriteData: 5c8295b9
|
|
# tb_core.u_sdram32 : at time 23707.0 ns WRITE: Bank = 0 Row = 590, Col = 249, Data = 492fd392
|
|
# Status: Burst-No: 7 Write Address: 0024e3c8 WriteData: 492fd392
|
|
# tb_core.u_sdram32 : at time 23717.0 ns WRITE: Bank = 0 Row = 590, Col = 250, Data = da269ab4
|
|
# Status: Burst-No: 8 Write Address: 0024e3c8 WriteData: da269ab4
|
|
# tb_core.u_sdram32 : at time 23727.0 ns WRITE: Bank = 0 Row = 590, Col = 251, Data = 3fbb3b7f
|
|
# Status: Burst-No: 9 Write Address: 0024e3c8 WriteData: 3fbb3b7f
|
|
# tb_core.u_sdram32 : at time 23737.0 ns WRITE: Bank = 0 Row = 590, Col = 252, Data = c3339086
|
|
# Status: Burst-No: 10 Write Address: 0024e3c8 WriteData: c3339086
|
|
# tb_core.u_sdram32 : at time 23747.0 ns BST : Burst Terminate
|
|
# Write Address: 002df5fa, Burst Size: 51
|
|
# tb_core.u_sdram32 : at time 23887.0 ns ACT : Bank = 1 Row = 735
|
|
# tb_core.u_sdram32 : at time 23917.0 ns WRITE: Bank = 1 Row = 735, Col = 126, Data = 19452132
|
|
# Status: Burst-No: 0 Write Address: 002df5fa WriteData: 19452132
|
|
# tb_core.u_sdram32 : at time 23927.0 ns WRITE: Bank = 1 Row = 735, Col = 127, Data = dece5ebd
|
|
# Status: Burst-No: 1 Write Address: 002df5fa WriteData: dece5ebd
|
|
# tb_core.u_sdram32 : at time 23937.0 ns WRITE: Bank = 1 Row = 735, Col = 128, Data = 424fcd84
|
|
# Status: Burst-No: 2 Write Address: 002df5fa WriteData: 424fcd84
|
|
# tb_core.u_sdram32 : at time 23947.0 ns WRITE: Bank = 1 Row = 735, Col = 129, Data = f249a4e4
|
|
# Status: Burst-No: 3 Write Address: 002df5fa WriteData: f249a4e4
|
|
# tb_core.u_sdram32 : at time 23957.0 ns WRITE: Bank = 1 Row = 735, Col = 130, Data = 6543cfca
|
|
# Status: Burst-No: 4 Write Address: 002df5fa WriteData: 6543cfca
|
|
# tb_core.u_sdram32 : at time 23967.0 ns WRITE: Bank = 1 Row = 735, Col = 131, Data = 54a879a9
|
|
# Status: Burst-No: 5 Write Address: 002df5fa WriteData: 54a879a9
|
|
# tb_core.u_sdram32 : at time 23977.0 ns WRITE: Bank = 1 Row = 735, Col = 132, Data = d095a8a1
|
|
# Status: Burst-No: 6 Write Address: 002df5fa WriteData: d095a8a1
|
|
# tb_core.u_sdram32 : at time 23987.0 ns WRITE: Bank = 1 Row = 735, Col = 133, Data = 4765a98e
|
|
# Status: Burst-No: 7 Write Address: 002df5fa WriteData: 4765a98e
|
|
# tb_core.u_sdram32 : at time 23997.0 ns WRITE: Bank = 1 Row = 735, Col = 134, Data = fd8b6afb
|
|
# Status: Burst-No: 8 Write Address: 002df5fa WriteData: fd8b6afb
|
|
# tb_core.u_sdram32 : at time 24007.0 ns WRITE: Bank = 1 Row = 735, Col = 135, Data = 85e51e0b
|
|
# Status: Burst-No: 9 Write Address: 002df5fa WriteData: 85e51e0b
|
|
# tb_core.u_sdram32 : at time 24017.0 ns WRITE: Bank = 1 Row = 735, Col = 136, Data = f78290ef
|
|
# Status: Burst-No: 10 Write Address: 002df5fa WriteData: f78290ef
|
|
# tb_core.u_sdram32 : at time 24027.0 ns WRITE: Bank = 1 Row = 735, Col = 137, Data = 64c83dc9
|
|
# Status: Burst-No: 11 Write Address: 002df5fa WriteData: 64c83dc9
|
|
# tb_core.u_sdram32 : at time 24037.0 ns WRITE: Bank = 1 Row = 735, Col = 138, Data = 1b60e536
|
|
# Status: Burst-No: 12 Write Address: 002df5fa WriteData: 1b60e536
|
|
# tb_core.u_sdram32 : at time 24047.0 ns WRITE: Bank = 1 Row = 735, Col = 139, Data = bab14875
|
|
# Status: Burst-No: 13 Write Address: 002df5fa WriteData: bab14875
|
|
# tb_core.u_sdram32 : at time 24057.0 ns WRITE: Bank = 1 Row = 735, Col = 140, Data = c7e8568f
|
|
# Status: Burst-No: 14 Write Address: 002df5fa WriteData: c7e8568f
|
|
# tb_core.u_sdram32 : at time 24067.0 ns WRITE: Bank = 1 Row = 735, Col = 141, Data = 35cdbf6b
|
|
# Status: Burst-No: 15 Write Address: 002df5fa WriteData: 35cdbf6b
|
|
# tb_core.u_sdram32 : at time 24077.0 ns WRITE: Bank = 1 Row = 735, Col = 142, Data = 4465e788
|
|
# Status: Burst-No: 16 Write Address: 002df5fa WriteData: 4465e788
|
|
# tb_core.u_sdram32 : at time 24087.0 ns WRITE: Bank = 1 Row = 735, Col = 143, Data = d73fb4ae
|
|
# Status: Burst-No: 17 Write Address: 002df5fa WriteData: d73fb4ae
|
|
# tb_core.u_sdram32 : at time 24097.0 ns WRITE: Bank = 1 Row = 735, Col = 144, Data = 4df3819b
|
|
# Status: Burst-No: 18 Write Address: 002df5fa WriteData: 4df3819b
|
|
# tb_core.u_sdram32 : at time 24107.0 ns WRITE: Bank = 1 Row = 735, Col = 145, Data = 493e4592
|
|
# Status: Burst-No: 19 Write Address: 002df5fa WriteData: 493e4592
|
|
# tb_core.u_sdram32 : at time 24117.0 ns WRITE: Bank = 1 Row = 735, Col = 146, Data = 1444df28
|
|
# Status: Burst-No: 20 Write Address: 002df5fa WriteData: 1444df28
|
|
# tb_core.u_sdram32 : at time 24127.0 ns WRITE: Bank = 1 Row = 735, Col = 147, Data = 9684e02d
|
|
# Status: Burst-No: 21 Write Address: 002df5fa WriteData: 9684e02d
|
|
# tb_core.u_sdram32 : at time 24137.0 ns WRITE: Bank = 1 Row = 735, Col = 148, Data = 25b75f4b
|
|
# Status: Burst-No: 22 Write Address: 002df5fa WriteData: 25b75f4b
|
|
# tb_core.u_sdram32 : at time 24147.0 ns WRITE: Bank = 1 Row = 735, Col = 149, Data = e169b0c2
|
|
# Status: Burst-No: 23 Write Address: 002df5fa WriteData: e169b0c2
|
|
# tb_core.u_sdram32 : at time 24157.0 ns WRITE: Bank = 1 Row = 735, Col = 150, Data = 8f1cf61e
|
|
# Status: Burst-No: 24 Write Address: 002df5fa WriteData: 8f1cf61e
|
|
# tb_core.u_sdram32 : at time 24167.0 ns WRITE: Bank = 1 Row = 735, Col = 151, Data = 06b3050d
|
|
# Status: Burst-No: 25 Write Address: 002df5fa WriteData: 06b3050d
|
|
# tb_core.u_sdram32 : at time 24177.0 ns WRITE: Bank = 1 Row = 735, Col = 152, Data = 7679fdec
|
|
# Status: Burst-No: 26 Write Address: 002df5fa WriteData: 7679fdec
|
|
# tb_core.u_sdram32 : at time 24187.0 ns WRITE: Bank = 1 Row = 735, Col = 153, Data = 0c039d18
|
|
# Status: Burst-No: 27 Write Address: 002df5fa WriteData: 0c039d18
|
|
# tb_core.u_sdram32 : at time 24197.0 ns WRITE: Bank = 1 Row = 735, Col = 154, Data = 68ae1bd1
|
|
# Status: Burst-No: 28 Write Address: 002df5fa WriteData: 68ae1bd1
|
|
# tb_core.u_sdram32 : at time 24207.0 ns WRITE: Bank = 1 Row = 735, Col = 155, Data = c3761c86
|
|
# Status: Burst-No: 29 Write Address: 002df5fa WriteData: c3761c86
|
|
# tb_core.u_sdram32 : at time 24217.0 ns WRITE: Bank = 1 Row = 735, Col = 156, Data = a0c02441
|
|
# Status: Burst-No: 30 Write Address: 002df5fa WriteData: a0c02441
|
|
# tb_core.u_sdram32 : at time 24227.0 ns WRITE: Bank = 1 Row = 735, Col = 157, Data = 9dbf643b
|
|
# Status: Burst-No: 31 Write Address: 002df5fa WriteData: 9dbf643b
|
|
# tb_core.u_sdram32 : at time 24237.0 ns WRITE: Bank = 1 Row = 735, Col = 158, Data = 6c44f9d8
|
|
# Status: Burst-No: 32 Write Address: 002df5fa WriteData: 6c44f9d8
|
|
# tb_core.u_sdram32 : at time 24247.0 ns WRITE: Bank = 1 Row = 735, Col = 159, Data = 29efe953
|
|
# Status: Burst-No: 33 Write Address: 002df5fa WriteData: 29efe953
|
|
# tb_core.u_sdram32 : at time 24257.0 ns WRITE: Bank = 1 Row = 735, Col = 160, Data = ab196256
|
|
# Status: Burst-No: 34 Write Address: 002df5fa WriteData: ab196256
|
|
# tb_core.u_sdram32 : at time 24267.0 ns WRITE: Bank = 1 Row = 735, Col = 161, Data = adac225b
|
|
# Status: Burst-No: 35 Write Address: 002df5fa WriteData: adac225b
|
|
# tb_core.u_sdram32 : at time 24277.0 ns WRITE: Bank = 1 Row = 735, Col = 162, Data = f166fae2
|
|
# Status: Burst-No: 36 Write Address: 002df5fa WriteData: f166fae2
|
|
# tb_core.u_sdram32 : at time 24287.0 ns WRITE: Bank = 1 Row = 735, Col = 163, Data = 8273e204
|
|
# Status: Burst-No: 37 Write Address: 002df5fa WriteData: 8273e204
|
|
# tb_core.u_sdram32 : at time 24297.0 ns WRITE: Bank = 1 Row = 735, Col = 164, Data = 39ac0373
|
|
# Status: Burst-No: 38 Write Address: 002df5fa WriteData: 39ac0373
|
|
# tb_core.u_sdram32 : at time 24307.0 ns WRITE: Bank = 1 Row = 735, Col = 165, Data = ec50b4d8
|
|
# Status: Burst-No: 39 Write Address: 002df5fa WriteData: ec50b4d8
|
|
# tb_core.u_sdram32 : at time 24317.0 ns WRITE: Bank = 1 Row = 735, Col = 166, Data = 093e4d12
|
|
# Status: Burst-No: 40 Write Address: 002df5fa WriteData: 093e4d12
|
|
# tb_core.u_sdram32 : at time 24327.0 ns WRITE: Bank = 1 Row = 735, Col = 167, Data = dc0344b8
|
|
# Status: Burst-No: 41 Write Address: 002df5fa WriteData: dc0344b8
|
|
# tb_core.u_sdram32 : at time 24337.0 ns WRITE: Bank = 1 Row = 735, Col = 168, Data = 9c811239
|
|
# Status: Burst-No: 42 Write Address: 002df5fa WriteData: 9c811239
|
|
# tb_core.u_sdram32 : at time 24347.0 ns WRITE: Bank = 1 Row = 735, Col = 169, Data = f287b6e5
|
|
# Status: Burst-No: 43 Write Address: 002df5fa WriteData: f287b6e5
|
|
# tb_core.u_sdram32 : at time 24357.0 ns WRITE: Bank = 1 Row = 735, Col = 170, Data = d0c5dca1
|
|
# Status: Burst-No: 44 Write Address: 002df5fa WriteData: d0c5dca1
|
|
# tb_core.u_sdram32 : at time 24367.0 ns WRITE: Bank = 1 Row = 735, Col = 171, Data = 15890f2b
|
|
# Status: Burst-No: 45 Write Address: 002df5fa WriteData: 15890f2b
|
|
# tb_core.u_sdram32 : at time 24377.0 ns WRITE: Bank = 1 Row = 735, Col = 172, Data = 40905d81
|
|
# Status: Burst-No: 46 Write Address: 002df5fa WriteData: 40905d81
|
|
# tb_core.u_sdram32 : at time 24387.0 ns WRITE: Bank = 1 Row = 735, Col = 173, Data = 641b85c8
|
|
# Status: Burst-No: 47 Write Address: 002df5fa WriteData: 641b85c8
|
|
# tb_core.u_sdram32 : at time 24397.0 ns WRITE: Bank = 1 Row = 735, Col = 174, Data = 13b55527
|
|
# Status: Burst-No: 48 Write Address: 002df5fa WriteData: 13b55527
|
|
# tb_core.u_sdram32 : at time 24407.0 ns WRITE: Bank = 1 Row = 735, Col = 175, Data = 50d5f9a1
|
|
# Status: Burst-No: 49 Write Address: 002df5fa WriteData: 50d5f9a1
|
|
# tb_core.u_sdram32 : at time 24417.0 ns WRITE: Bank = 1 Row = 735, Col = 176, Data = 8f8c6e1f
|
|
# Status: Burst-No: 50 Write Address: 002df5fa WriteData: 8f8c6e1f
|
|
# tb_core.u_sdram32 : at time 24427.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 24563.0 ns READ : Bank = 0 Row = 590, Col = 242, Data = 09ff4113
|
|
# tb_core.u_sdram32 : at time 24573.0 ns READ : Bank = 0 Row = 590, Col = 243, Data = 35a0c96b
|
|
# READ STATUS: Burst-No: 0 Addr: 0024e3c8 Rxd: 09ff4113
|
|
# tb_core.u_sdram32 : at time 24583.0 ns READ : Bank = 0 Row = 590, Col = 244, Data = e3b7aec7
|
|
# READ STATUS: Burst-No: 1 Addr: 0024e3ca Rxd: 35a0c96b
|
|
# tb_core.u_sdram32 : at time 24593.0 ns READ : Bank = 0 Row = 590, Col = 245, Data = 5b0bddb6
|
|
# READ STATUS: Burst-No: 2 Addr: 0024e3cc Rxd: e3b7aec7
|
|
# tb_core.u_sdram32 : at time 24603.0 ns READ : Bank = 0 Row = 590, Col = 246, Data = 5d059dba
|
|
# READ STATUS: Burst-No: 3 Addr: 0024e3ce Rxd: 5b0bddb6
|
|
# tb_core.u_sdram32 : at time 24613.0 ns READ : Bank = 0 Row = 590, Col = 247, Data = 6216abc4
|
|
# READ STATUS: Burst-No: 4 Addr: 0024e3d0 Rxd: 5d059dba
|
|
# tb_core.u_sdram32 : at time 24623.0 ns READ : Bank = 0 Row = 590, Col = 248, Data = 5c8295b9
|
|
# READ STATUS: Burst-No: 5 Addr: 0024e3d2 Rxd: 6216abc4
|
|
# tb_core.u_sdram32 : at time 24633.0 ns READ : Bank = 0 Row = 590, Col = 249, Data = 492fd392
|
|
# READ STATUS: Burst-No: 6 Addr: 0024e3d4 Rxd: 5c8295b9
|
|
# tb_core.u_sdram32 : at time 24643.0 ns READ : Bank = 0 Row = 590, Col = 250, Data = da269ab4
|
|
# tb_core.u_sdram32 : at time 24647.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 7 Addr: 0024e3d6 Rxd: 492fd392
|
|
# tb_core.u_sdram32 : at time 24653.0 ns READ : Bank = 0 Row = 590, Col = 251, Data = 3fbb3b7f
|
|
# READ STATUS: Burst-No: 8 Addr: 0024e3d8 Rxd: da269ab4
|
|
# tb_core.u_sdram32 : at time 24663.0 ns READ : Bank = 0 Row = 590, Col = 252, Data = c3339086
|
|
# READ STATUS: Burst-No: 9 Addr: 0024e3da Rxd: 3fbb3b7f
|
|
# READ STATUS: Burst-No: 10 Addr: 0024e3dc Rxd: c3339086
|
|
# tb_core.u_sdram32 : at time 24833.0 ns READ : Bank = 1 Row = 735, Col = 126, Data = 19452132
|
|
# tb_core.u_sdram32 : at time 24843.0 ns READ : Bank = 1 Row = 735, Col = 127, Data = dece5ebd
|
|
# READ STATUS: Burst-No: 0 Addr: 002df5fa Rxd: 19452132
|
|
# tb_core.u_sdram32 : at time 24853.0 ns READ : Bank = 1 Row = 735, Col = 128, Data = 424fcd84
|
|
# READ STATUS: Burst-No: 1 Addr: 002df5fc Rxd: dece5ebd
|
|
# tb_core.u_sdram32 : at time 24863.0 ns READ : Bank = 1 Row = 735, Col = 129, Data = f249a4e4
|
|
# READ STATUS: Burst-No: 2 Addr: 002df5fe Rxd: 424fcd84
|
|
# tb_core.u_sdram32 : at time 24873.0 ns READ : Bank = 1 Row = 735, Col = 130, Data = 6543cfca
|
|
# READ STATUS: Burst-No: 3 Addr: 002df600 Rxd: f249a4e4
|
|
# tb_core.u_sdram32 : at time 24883.0 ns READ : Bank = 1 Row = 735, Col = 131, Data = 54a879a9
|
|
# READ STATUS: Burst-No: 4 Addr: 002df602 Rxd: 6543cfca
|
|
# tb_core.u_sdram32 : at time 24893.0 ns READ : Bank = 1 Row = 735, Col = 132, Data = d095a8a1
|
|
# READ STATUS: Burst-No: 5 Addr: 002df604 Rxd: 54a879a9
|
|
# tb_core.u_sdram32 : at time 24903.0 ns READ : Bank = 1 Row = 735, Col = 133, Data = 4765a98e
|
|
# READ STATUS: Burst-No: 6 Addr: 002df606 Rxd: d095a8a1
|
|
# tb_core.u_sdram32 : at time 24913.0 ns READ : Bank = 1 Row = 735, Col = 134, Data = fd8b6afb
|
|
# READ STATUS: Burst-No: 7 Addr: 002df608 Rxd: 4765a98e
|
|
# tb_core.u_sdram32 : at time 24923.0 ns READ : Bank = 1 Row = 735, Col = 135, Data = 85e51e0b
|
|
# READ STATUS: Burst-No: 8 Addr: 002df60a Rxd: fd8b6afb
|
|
# tb_core.u_sdram32 : at time 24933.0 ns READ : Bank = 1 Row = 735, Col = 136, Data = f78290ef
|
|
# READ STATUS: Burst-No: 9 Addr: 002df60c Rxd: 85e51e0b
|
|
# tb_core.u_sdram32 : at time 24943.0 ns READ : Bank = 1 Row = 735, Col = 137, Data = 64c83dc9
|
|
# READ STATUS: Burst-No: 10 Addr: 002df60e Rxd: f78290ef
|
|
# tb_core.u_sdram32 : at time 24953.0 ns READ : Bank = 1 Row = 735, Col = 138, Data = 1b60e536
|
|
# READ STATUS: Burst-No: 11 Addr: 002df610 Rxd: 64c83dc9
|
|
# tb_core.u_sdram32 : at time 24963.0 ns READ : Bank = 1 Row = 735, Col = 139, Data = bab14875
|
|
# READ STATUS: Burst-No: 12 Addr: 002df612 Rxd: 1b60e536
|
|
# tb_core.u_sdram32 : at time 24973.0 ns READ : Bank = 1 Row = 735, Col = 140, Data = c7e8568f
|
|
# READ STATUS: Burst-No: 13 Addr: 002df614 Rxd: bab14875
|
|
# tb_core.u_sdram32 : at time 24983.0 ns READ : Bank = 1 Row = 735, Col = 141, Data = 35cdbf6b
|
|
# READ STATUS: Burst-No: 14 Addr: 002df616 Rxd: c7e8568f
|
|
# tb_core.u_sdram32 : at time 24993.0 ns READ : Bank = 1 Row = 735, Col = 142, Data = 4465e788
|
|
# READ STATUS: Burst-No: 15 Addr: 002df618 Rxd: 35cdbf6b
|
|
# tb_core.u_sdram32 : at time 25003.0 ns READ : Bank = 1 Row = 735, Col = 143, Data = d73fb4ae
|
|
# READ STATUS: Burst-No: 16 Addr: 002df61a Rxd: 4465e788
|
|
# tb_core.u_sdram32 : at time 25013.0 ns READ : Bank = 1 Row = 735, Col = 144, Data = 4df3819b
|
|
# READ STATUS: Burst-No: 17 Addr: 002df61c Rxd: d73fb4ae
|
|
# tb_core.u_sdram32 : at time 25023.0 ns READ : Bank = 1 Row = 735, Col = 145, Data = 493e4592
|
|
# READ STATUS: Burst-No: 18 Addr: 002df61e Rxd: 4df3819b
|
|
# tb_core.u_sdram32 : at time 25033.0 ns READ : Bank = 1 Row = 735, Col = 146, Data = 1444df28
|
|
# READ STATUS: Burst-No: 19 Addr: 002df620 Rxd: 493e4592
|
|
# tb_core.u_sdram32 : at time 25043.0 ns READ : Bank = 1 Row = 735, Col = 147, Data = 9684e02d
|
|
# READ STATUS: Burst-No: 20 Addr: 002df622 Rxd: 1444df28
|
|
# tb_core.u_sdram32 : at time 25053.0 ns READ : Bank = 1 Row = 735, Col = 148, Data = 25b75f4b
|
|
# READ STATUS: Burst-No: 21 Addr: 002df624 Rxd: 9684e02d
|
|
# tb_core.u_sdram32 : at time 25063.0 ns READ : Bank = 1 Row = 735, Col = 149, Data = e169b0c2
|
|
# READ STATUS: Burst-No: 22 Addr: 002df626 Rxd: 25b75f4b
|
|
# tb_core.u_sdram32 : at time 25073.0 ns READ : Bank = 1 Row = 735, Col = 150, Data = 8f1cf61e
|
|
# READ STATUS: Burst-No: 23 Addr: 002df628 Rxd: e169b0c2
|
|
# tb_core.u_sdram32 : at time 25083.0 ns READ : Bank = 1 Row = 735, Col = 151, Data = 06b3050d
|
|
# READ STATUS: Burst-No: 24 Addr: 002df62a Rxd: 8f1cf61e
|
|
# tb_core.u_sdram32 : at time 25093.0 ns READ : Bank = 1 Row = 735, Col = 152, Data = 7679fdec
|
|
# READ STATUS: Burst-No: 25 Addr: 002df62c Rxd: 06b3050d
|
|
# tb_core.u_sdram32 : at time 25103.0 ns READ : Bank = 1 Row = 735, Col = 153, Data = 0c039d18
|
|
# READ STATUS: Burst-No: 26 Addr: 002df62e Rxd: 7679fdec
|
|
# tb_core.u_sdram32 : at time 25113.0 ns READ : Bank = 1 Row = 735, Col = 154, Data = 68ae1bd1
|
|
# READ STATUS: Burst-No: 27 Addr: 002df630 Rxd: 0c039d18
|
|
# tb_core.u_sdram32 : at time 25123.0 ns READ : Bank = 1 Row = 735, Col = 155, Data = c3761c86
|
|
# READ STATUS: Burst-No: 28 Addr: 002df632 Rxd: 68ae1bd1
|
|
# tb_core.u_sdram32 : at time 25133.0 ns READ : Bank = 1 Row = 735, Col = 156, Data = a0c02441
|
|
# READ STATUS: Burst-No: 29 Addr: 002df634 Rxd: c3761c86
|
|
# tb_core.u_sdram32 : at time 25143.0 ns READ : Bank = 1 Row = 735, Col = 157, Data = 9dbf643b
|
|
# READ STATUS: Burst-No: 30 Addr: 002df636 Rxd: a0c02441
|
|
# tb_core.u_sdram32 : at time 25153.0 ns READ : Bank = 1 Row = 735, Col = 158, Data = 6c44f9d8
|
|
# READ STATUS: Burst-No: 31 Addr: 002df638 Rxd: 9dbf643b
|
|
# tb_core.u_sdram32 : at time 25163.0 ns READ : Bank = 1 Row = 735, Col = 159, Data = 29efe953
|
|
# READ STATUS: Burst-No: 32 Addr: 002df63a Rxd: 6c44f9d8
|
|
# tb_core.u_sdram32 : at time 25173.0 ns READ : Bank = 1 Row = 735, Col = 160, Data = ab196256
|
|
# READ STATUS: Burst-No: 33 Addr: 002df63c Rxd: 29efe953
|
|
# tb_core.u_sdram32 : at time 25183.0 ns READ : Bank = 1 Row = 735, Col = 161, Data = adac225b
|
|
# READ STATUS: Burst-No: 34 Addr: 002df63e Rxd: ab196256
|
|
# tb_core.u_sdram32 : at time 25193.0 ns READ : Bank = 1 Row = 735, Col = 162, Data = f166fae2
|
|
# READ STATUS: Burst-No: 35 Addr: 002df640 Rxd: adac225b
|
|
# tb_core.u_sdram32 : at time 25203.0 ns READ : Bank = 1 Row = 735, Col = 163, Data = 8273e204
|
|
# READ STATUS: Burst-No: 36 Addr: 002df642 Rxd: f166fae2
|
|
# tb_core.u_sdram32 : at time 25213.0 ns READ : Bank = 1 Row = 735, Col = 164, Data = 39ac0373
|
|
# READ STATUS: Burst-No: 37 Addr: 002df644 Rxd: 8273e204
|
|
# tb_core.u_sdram32 : at time 25223.0 ns READ : Bank = 1 Row = 735, Col = 165, Data = ec50b4d8
|
|
# READ STATUS: Burst-No: 38 Addr: 002df646 Rxd: 39ac0373
|
|
# tb_core.u_sdram32 : at time 25233.0 ns READ : Bank = 1 Row = 735, Col = 166, Data = 093e4d12
|
|
# READ STATUS: Burst-No: 39 Addr: 002df648 Rxd: ec50b4d8
|
|
# tb_core.u_sdram32 : at time 25243.0 ns READ : Bank = 1 Row = 735, Col = 167, Data = dc0344b8
|
|
# READ STATUS: Burst-No: 40 Addr: 002df64a Rxd: 093e4d12
|
|
# tb_core.u_sdram32 : at time 25253.0 ns READ : Bank = 1 Row = 735, Col = 168, Data = 9c811239
|
|
# READ STATUS: Burst-No: 41 Addr: 002df64c Rxd: dc0344b8
|
|
# tb_core.u_sdram32 : at time 25263.0 ns READ : Bank = 1 Row = 735, Col = 169, Data = f287b6e5
|
|
# READ STATUS: Burst-No: 42 Addr: 002df64e Rxd: 9c811239
|
|
# tb_core.u_sdram32 : at time 25273.0 ns READ : Bank = 1 Row = 735, Col = 170, Data = d0c5dca1
|
|
# READ STATUS: Burst-No: 43 Addr: 002df650 Rxd: f287b6e5
|
|
# tb_core.u_sdram32 : at time 25283.0 ns READ : Bank = 1 Row = 735, Col = 171, Data = 15890f2b
|
|
# READ STATUS: Burst-No: 44 Addr: 002df652 Rxd: d0c5dca1
|
|
# tb_core.u_sdram32 : at time 25293.0 ns READ : Bank = 1 Row = 735, Col = 172, Data = 40905d81
|
|
# READ STATUS: Burst-No: 45 Addr: 002df654 Rxd: 15890f2b
|
|
# tb_core.u_sdram32 : at time 25303.0 ns READ : Bank = 1 Row = 735, Col = 173, Data = 641b85c8
|
|
# READ STATUS: Burst-No: 46 Addr: 002df656 Rxd: 40905d81
|
|
# tb_core.u_sdram32 : at time 25313.0 ns READ : Bank = 1 Row = 735, Col = 174, Data = 13b55527
|
|
# tb_core.u_sdram32 : at time 25317.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 47 Addr: 002df658 Rxd: 641b85c8
|
|
# tb_core.u_sdram32 : at time 25323.0 ns READ : Bank = 1 Row = 735, Col = 175, Data = 50d5f9a1
|
|
# READ STATUS: Burst-No: 48 Addr: 002df65a Rxd: 13b55527
|
|
# tb_core.u_sdram32 : at time 25333.0 ns READ : Bank = 1 Row = 735, Col = 176, Data = 8f8c6e1f
|
|
# READ STATUS: Burst-No: 49 Addr: 002df65c Rxd: 50d5f9a1
|
|
# READ STATUS: Burst-No: 50 Addr: 002df65e Rxd: 8f8c6e1f
|
|
# Write Address: 00223a04, Burst Size: 25
|
|
# tb_core.u_sdram32 : at time 25507.0 ns ACT : Bank = 2 Row = 547
|
|
# tb_core.u_sdram32 : at time 25597.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 25687.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 25777.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 25867.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 25957.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 26047.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 26137.0 ns ACT : Bank = 2 Row = 547
|
|
# tb_core.u_sdram32 : at time 26167.0 ns WRITE: Bank = 2 Row = 547, Col = 129, Data = cb5c8096
|
|
# Status: Burst-No: 0 Write Address: 00223a04 WriteData: cb5c8096
|
|
# tb_core.u_sdram32 : at time 26177.0 ns WRITE: Bank = 2 Row = 547, Col = 130, Data = 0a6e9314
|
|
# Status: Burst-No: 1 Write Address: 00223a04 WriteData: 0a6e9314
|
|
# tb_core.u_sdram32 : at time 26187.0 ns WRITE: Bank = 2 Row = 547, Col = 131, Data = 8919b412
|
|
# Status: Burst-No: 2 Write Address: 00223a04 WriteData: 8919b412
|
|
# tb_core.u_sdram32 : at time 26197.0 ns WRITE: Bank = 2 Row = 547, Col = 132, Data = cb227096
|
|
# Status: Burst-No: 3 Write Address: 00223a04 WriteData: cb227096
|
|
# tb_core.u_sdram32 : at time 26207.0 ns WRITE: Bank = 2 Row = 547, Col = 133, Data = d8ace2b1
|
|
# Status: Burst-No: 4 Write Address: 00223a04 WriteData: d8ace2b1
|
|
# tb_core.u_sdram32 : at time 26217.0 ns WRITE: Bank = 2 Row = 547, Col = 134, Data = 2ac2d555
|
|
# Status: Burst-No: 5 Write Address: 00223a04 WriteData: 2ac2d555
|
|
# tb_core.u_sdram32 : at time 26227.0 ns WRITE: Bank = 2 Row = 547, Col = 135, Data = f6c38eed
|
|
# Status: Burst-No: 6 Write Address: 00223a04 WriteData: f6c38eed
|
|
# tb_core.u_sdram32 : at time 26237.0 ns WRITE: Bank = 2 Row = 547, Col = 136, Data = 158b2b2b
|
|
# Status: Burst-No: 7 Write Address: 00223a04 WriteData: 158b2b2b
|
|
# tb_core.u_sdram32 : at time 26247.0 ns WRITE: Bank = 2 Row = 547, Col = 137, Data = 7ab11bf5
|
|
# Status: Burst-No: 8 Write Address: 00223a04 WriteData: 7ab11bf5
|
|
# tb_core.u_sdram32 : at time 26257.0 ns WRITE: Bank = 2 Row = 547, Col = 138, Data = 56b403ad
|
|
# Status: Burst-No: 9 Write Address: 00223a04 WriteData: 56b403ad
|
|
# tb_core.u_sdram32 : at time 26267.0 ns WRITE: Bank = 2 Row = 547, Col = 139, Data = 93c12227
|
|
# Status: Burst-No: 10 Write Address: 00223a04 WriteData: 93c12227
|
|
# tb_core.u_sdram32 : at time 26277.0 ns WRITE: Bank = 2 Row = 547, Col = 140, Data = 4249ff84
|
|
# Status: Burst-No: 11 Write Address: 00223a04 WriteData: 4249ff84
|
|
# tb_core.u_sdram32 : at time 26287.0 ns WRITE: Bank = 2 Row = 547, Col = 141, Data = d3a8e4a7
|
|
# Status: Burst-No: 12 Write Address: 00223a04 WriteData: d3a8e4a7
|
|
# tb_core.u_sdram32 : at time 26297.0 ns WRITE: Bank = 2 Row = 547, Col = 142, Data = f3d7a6e7
|
|
# Status: Burst-No: 13 Write Address: 00223a04 WriteData: f3d7a6e7
|
|
# tb_core.u_sdram32 : at time 26307.0 ns WRITE: Bank = 2 Row = 547, Col = 143, Data = dcef90b9
|
|
# Status: Burst-No: 14 Write Address: 00223a04 WriteData: dcef90b9
|
|
# tb_core.u_sdram32 : at time 26317.0 ns WRITE: Bank = 2 Row = 547, Col = 144, Data = a4da5649
|
|
# Status: Burst-No: 15 Write Address: 00223a04 WriteData: a4da5649
|
|
# tb_core.u_sdram32 : at time 26327.0 ns WRITE: Bank = 2 Row = 547, Col = 145, Data = 6de5bbdb
|
|
# Status: Burst-No: 16 Write Address: 00223a04 WriteData: 6de5bbdb
|
|
# tb_core.u_sdram32 : at time 26337.0 ns WRITE: Bank = 2 Row = 547, Col = 146, Data = 64ba0fc9
|
|
# Status: Burst-No: 17 Write Address: 00223a04 WriteData: 64ba0fc9
|
|
# tb_core.u_sdram32 : at time 26347.0 ns WRITE: Bank = 2 Row = 547, Col = 147, Data = 2883b151
|
|
# Status: Burst-No: 18 Write Address: 00223a04 WriteData: 2883b151
|
|
# tb_core.u_sdram32 : at time 26357.0 ns WRITE: Bank = 2 Row = 547, Col = 148, Data = d0bc5ea1
|
|
# Status: Burst-No: 19 Write Address: 00223a04 WriteData: d0bc5ea1
|
|
# tb_core.u_sdram32 : at time 26367.0 ns WRITE: Bank = 2 Row = 547, Col = 149, Data = 1546dd2a
|
|
# Status: Burst-No: 20 Write Address: 00223a04 WriteData: 1546dd2a
|
|
# tb_core.u_sdram32 : at time 26377.0 ns WRITE: Bank = 2 Row = 547, Col = 150, Data = 7d2a45fa
|
|
# Status: Burst-No: 21 Write Address: 00223a04 WriteData: 7d2a45fa
|
|
# tb_core.u_sdram32 : at time 26387.0 ns WRITE: Bank = 2 Row = 547, Col = 151, Data = a2e62045
|
|
# Status: Burst-No: 22 Write Address: 00223a04 WriteData: a2e62045
|
|
# tb_core.u_sdram32 : at time 26397.0 ns WRITE: Bank = 2 Row = 547, Col = 152, Data = 41a10583
|
|
# Status: Burst-No: 23 Write Address: 00223a04 WriteData: 41a10583
|
|
# tb_core.u_sdram32 : at time 26407.0 ns WRITE: Bank = 2 Row = 547, Col = 153, Data = be75427c
|
|
# Status: Burst-No: 24 Write Address: 00223a04 WriteData: be75427c
|
|
# tb_core.u_sdram32 : at time 26417.0 ns BST : Burst Terminate
|
|
# Write Address: 00061472, Burst Size: 63
|
|
# tb_core.u_sdram32 : at time 26557.0 ns ACT : Bank = 1 Row = 97
|
|
# tb_core.u_sdram32 : at time 26587.0 ns WRITE: Bank = 1 Row = 97, Col = 28, Data = b455f268
|
|
# Status: Burst-No: 0 Write Address: 00061472 WriteData: b455f268
|
|
# tb_core.u_sdram32 : at time 26597.0 ns WRITE: Bank = 1 Row = 97, Col = 29, Data = b7dfaa6f
|
|
# Status: Burst-No: 1 Write Address: 00061472 WriteData: b7dfaa6f
|
|
# tb_core.u_sdram32 : at time 26607.0 ns WRITE: Bank = 1 Row = 97, Col = 30, Data = 43460d86
|
|
# Status: Burst-No: 2 Write Address: 00061472 WriteData: 43460d86
|
|
# tb_core.u_sdram32 : at time 26617.0 ns WRITE: Bank = 1 Row = 97, Col = 31, Data = 782321f0
|
|
# Status: Burst-No: 3 Write Address: 00061472 WriteData: 782321f0
|
|
# tb_core.u_sdram32 : at time 26627.0 ns WRITE: Bank = 1 Row = 97, Col = 32, Data = 1c719738
|
|
# Status: Burst-No: 4 Write Address: 00061472 WriteData: 1c719738
|
|
# tb_core.u_sdram32 : at time 26637.0 ns WRITE: Bank = 1 Row = 97, Col = 33, Data = 20769140
|
|
# Status: Burst-No: 5 Write Address: 00061472 WriteData: 20769140
|
|
# tb_core.u_sdram32 : at time 26647.0 ns WRITE: Bank = 1 Row = 97, Col = 34, Data = 94097628
|
|
# Status: Burst-No: 6 Write Address: 00061472 WriteData: 94097628
|
|
# tb_core.u_sdram32 : at time 26657.0 ns WRITE: Bank = 1 Row = 97, Col = 35, Data = 7b0da9f6
|
|
# Status: Burst-No: 7 Write Address: 00061472 WriteData: 7b0da9f6
|
|
# tb_core.u_sdram32 : at time 26667.0 ns WRITE: Bank = 1 Row = 97, Col = 36, Data = e2bf1ac5
|
|
# Status: Burst-No: 8 Write Address: 00061472 WriteData: e2bf1ac5
|
|
# tb_core.u_sdram32 : at time 26677.0 ns WRITE: Bank = 1 Row = 97, Col = 37, Data = 602831c0
|
|
# Status: Burst-No: 9 Write Address: 00061472 WriteData: 602831c0
|
|
# tb_core.u_sdram32 : at time 26687.0 ns WRITE: Bank = 1 Row = 97, Col = 38, Data = 3a625f74
|
|
# Status: Burst-No: 10 Write Address: 00061472 WriteData: 3a625f74
|
|
# tb_core.u_sdram32 : at time 26697.0 ns WRITE: Bank = 1 Row = 97, Col = 39, Data = 1cde7139
|
|
# Status: Burst-No: 11 Write Address: 00061472 WriteData: 1cde7139
|
|
# tb_core.u_sdram32 : at time 26707.0 ns WRITE: Bank = 1 Row = 97, Col = 40, Data = d86a6ab0
|
|
# Status: Burst-No: 12 Write Address: 00061472 WriteData: d86a6ab0
|
|
# tb_core.u_sdram32 : at time 26717.0 ns WRITE: Bank = 1 Row = 97, Col = 41, Data = 1e1c873c
|
|
# Status: Burst-No: 13 Write Address: 00061472 WriteData: 1e1c873c
|
|
# tb_core.u_sdram32 : at time 26727.0 ns WRITE: Bank = 1 Row = 97, Col = 42, Data = 1521932a
|
|
# Status: Burst-No: 14 Write Address: 00061472 WriteData: 1521932a
|
|
# tb_core.u_sdram32 : at time 26737.0 ns WRITE: Bank = 1 Row = 97, Col = 43, Data = 3124d362
|
|
# Status: Burst-No: 15 Write Address: 00061472 WriteData: 3124d362
|
|
# tb_core.u_sdram32 : at time 26747.0 ns WRITE: Bank = 1 Row = 97, Col = 44, Data = 0aec3515
|
|
# Status: Burst-No: 16 Write Address: 00061472 WriteData: 0aec3515
|
|
# tb_core.u_sdram32 : at time 26757.0 ns WRITE: Bank = 1 Row = 97, Col = 45, Data = f0b14ee1
|
|
# Status: Burst-No: 17 Write Address: 00061472 WriteData: f0b14ee1
|
|
# tb_core.u_sdram32 : at time 26767.0 ns WRITE: Bank = 1 Row = 97, Col = 46, Data = 0be29d17
|
|
# Status: Burst-No: 18 Write Address: 00061472 WriteData: 0be29d17
|
|
# tb_core.u_sdram32 : at time 26777.0 ns WRITE: Bank = 1 Row = 97, Col = 47, Data = a18bee43
|
|
# Status: Burst-No: 19 Write Address: 00061472 WriteData: a18bee43
|
|
# tb_core.u_sdram32 : at time 26787.0 ns WRITE: Bank = 1 Row = 97, Col = 48, Data = 64b5e3c9
|
|
# Status: Burst-No: 20 Write Address: 00061472 WriteData: 64b5e3c9
|
|
# tb_core.u_sdram32 : at time 26797.0 ns WRITE: Bank = 1 Row = 97, Col = 49, Data = c3360486
|
|
# Status: Burst-No: 21 Write Address: 00061472 WriteData: c3360486
|
|
# tb_core.u_sdram32 : at time 26807.0 ns WRITE: Bank = 1 Row = 97, Col = 50, Data = 1297cb25
|
|
# Status: Burst-No: 22 Write Address: 00061472 WriteData: 1297cb25
|
|
# tb_core.u_sdram32 : at time 26817.0 ns WRITE: Bank = 1 Row = 97, Col = 51, Data = 60f69dc1
|
|
# Status: Burst-No: 23 Write Address: 00061472 WriteData: 60f69dc1
|
|
# tb_core.u_sdram32 : at time 26827.0 ns WRITE: Bank = 1 Row = 97, Col = 52, Data = c69da28d
|
|
# Status: Burst-No: 24 Write Address: 00061472 WriteData: c69da28d
|
|
# tb_core.u_sdram32 : at time 26837.0 ns WRITE: Bank = 1 Row = 97, Col = 53, Data = ad67e25a
|
|
# Status: Burst-No: 25 Write Address: 00061472 WriteData: ad67e25a
|
|
# tb_core.u_sdram32 : at time 26847.0 ns WRITE: Bank = 1 Row = 97, Col = 54, Data = 03d62707
|
|
# Status: Burst-No: 26 Write Address: 00061472 WriteData: 03d62707
|
|
# tb_core.u_sdram32 : at time 26857.0 ns WRITE: Bank = 1 Row = 97, Col = 55, Data = 165b7b2c
|
|
# Status: Burst-No: 27 Write Address: 00061472 WriteData: 165b7b2c
|
|
# tb_core.u_sdram32 : at time 26867.0 ns WRITE: Bank = 1 Row = 97, Col = 56, Data = 060a5d0c
|
|
# Status: Burst-No: 28 Write Address: 00061472 WriteData: 060a5d0c
|
|
# tb_core.u_sdram32 : at time 26877.0 ns WRITE: Bank = 1 Row = 97, Col = 57, Data = b8ade671
|
|
# Status: Burst-No: 29 Write Address: 00061472 WriteData: b8ade671
|
|
# tb_core.u_sdram32 : at time 26887.0 ns WRITE: Bank = 1 Row = 97, Col = 58, Data = 9de17c3b
|
|
# Status: Burst-No: 30 Write Address: 00061472 WriteData: 9de17c3b
|
|
# tb_core.u_sdram32 : at time 26897.0 ns WRITE: Bank = 1 Row = 97, Col = 59, Data = 5b60e5b6
|
|
# Status: Burst-No: 31 Write Address: 00061472 WriteData: 5b60e5b6
|
|
# tb_core.u_sdram32 : at time 26907.0 ns WRITE: Bank = 1 Row = 97, Col = 60, Data = fbdfc2f7
|
|
# Status: Burst-No: 32 Write Address: 00061472 WriteData: fbdfc2f7
|
|
# tb_core.u_sdram32 : at time 26917.0 ns WRITE: Bank = 1 Row = 97, Col = 61, Data = cf14ce9e
|
|
# Status: Burst-No: 33 Write Address: 00061472 WriteData: cf14ce9e
|
|
# tb_core.u_sdram32 : at time 26927.0 ns WRITE: Bank = 1 Row = 97, Col = 62, Data = ae78585c
|
|
# Status: Burst-No: 34 Write Address: 00061472 WriteData: ae78585c
|
|
# tb_core.u_sdram32 : at time 26937.0 ns WRITE: Bank = 1 Row = 97, Col = 63, Data = 2ab8f755
|
|
# Status: Burst-No: 35 Write Address: 00061472 WriteData: 2ab8f755
|
|
# tb_core.u_sdram32 : at time 26947.0 ns WRITE: Bank = 1 Row = 97, Col = 64, Data = 902a3a20
|
|
# Status: Burst-No: 36 Write Address: 00061472 WriteData: 902a3a20
|
|
# tb_core.u_sdram32 : at time 26957.0 ns WRITE: Bank = 1 Row = 97, Col = 65, Data = d00b12a0
|
|
# Status: Burst-No: 37 Write Address: 00061472 WriteData: d00b12a0
|
|
# tb_core.u_sdram32 : at time 26967.0 ns WRITE: Bank = 1 Row = 97, Col = 66, Data = 39600972
|
|
# Status: Burst-No: 38 Write Address: 00061472 WriteData: 39600972
|
|
# tb_core.u_sdram32 : at time 26977.0 ns WRITE: Bank = 1 Row = 97, Col = 67, Data = da3d8cb4
|
|
# Status: Burst-No: 39 Write Address: 00061472 WriteData: da3d8cb4
|
|
# tb_core.u_sdram32 : at time 26987.0 ns WRITE: Bank = 1 Row = 97, Col = 68, Data = 6e8af5dd
|
|
# Status: Burst-No: 40 Write Address: 00061472 WriteData: 6e8af5dd
|
|
# tb_core.u_sdram32 : at time 26997.0 ns WRITE: Bank = 1 Row = 97, Col = 69, Data = 86dcf00d
|
|
# Status: Burst-No: 41 Write Address: 00061472 WriteData: 86dcf00d
|
|
# tb_core.u_sdram32 : at time 27007.0 ns WRITE: Bank = 1 Row = 97, Col = 70, Data = 25b0994b
|
|
# Status: Burst-No: 42 Write Address: 00061472 WriteData: 25b0994b
|
|
# tb_core.u_sdram32 : at time 27017.0 ns WRITE: Bank = 1 Row = 97, Col = 71, Data = bccc4279
|
|
# Status: Burst-No: 43 Write Address: 00061472 WriteData: bccc4279
|
|
# tb_core.u_sdram32 : at time 27027.0 ns WRITE: Bank = 1 Row = 97, Col = 72, Data = cf63da9e
|
|
# Status: Burst-No: 44 Write Address: 00061472 WriteData: cf63da9e
|
|
# tb_core.u_sdram32 : at time 27037.0 ns WRITE: Bank = 1 Row = 97, Col = 73, Data = fef064fd
|
|
# Status: Burst-No: 45 Write Address: 00061472 WriteData: fef064fd
|
|
# tb_core.u_sdram32 : at time 27047.0 ns WRITE: Bank = 1 Row = 97, Col = 74, Data = bde0d27b
|
|
# Status: Burst-No: 46 Write Address: 00061472 WriteData: bde0d27b
|
|
# tb_core.u_sdram32 : at time 27057.0 ns WRITE: Bank = 1 Row = 97, Col = 75, Data = 47e2738f
|
|
# Status: Burst-No: 47 Write Address: 00061472 WriteData: 47e2738f
|
|
# tb_core.u_sdram32 : at time 27067.0 ns WRITE: Bank = 1 Row = 97, Col = 76, Data = 81c39a03
|
|
# Status: Burst-No: 48 Write Address: 00061472 WriteData: 81c39a03
|
|
# tb_core.u_sdram32 : at time 27077.0 ns WRITE: Bank = 1 Row = 97, Col = 77, Data = 71c129e3
|
|
# Status: Burst-No: 49 Write Address: 00061472 WriteData: 71c129e3
|
|
# tb_core.u_sdram32 : at time 27087.0 ns WRITE: Bank = 1 Row = 97, Col = 78, Data = 0e92431d
|
|
# Status: Burst-No: 50 Write Address: 00061472 WriteData: 0e92431d
|
|
# tb_core.u_sdram32 : at time 27097.0 ns WRITE: Bank = 1 Row = 97, Col = 79, Data = 58f93db1
|
|
# Status: Burst-No: 51 Write Address: 00061472 WriteData: 58f93db1
|
|
# tb_core.u_sdram32 : at time 27107.0 ns WRITE: Bank = 1 Row = 97, Col = 80, Data = 22119f44
|
|
# Status: Burst-No: 52 Write Address: 00061472 WriteData: 22119f44
|
|
# tb_core.u_sdram32 : at time 27117.0 ns WRITE: Bank = 1 Row = 97, Col = 81, Data = ca9cbc95
|
|
# Status: Burst-No: 53 Write Address: 00061472 WriteData: ca9cbc95
|
|
# tb_core.u_sdram32 : at time 27127.0 ns WRITE: Bank = 1 Row = 97, Col = 82, Data = f01d34e0
|
|
# Status: Burst-No: 54 Write Address: 00061472 WriteData: f01d34e0
|
|
# tb_core.u_sdram32 : at time 27137.0 ns WRITE: Bank = 1 Row = 97, Col = 83, Data = f6a178ed
|
|
# Status: Burst-No: 55 Write Address: 00061472 WriteData: f6a178ed
|
|
# tb_core.u_sdram32 : at time 27147.0 ns WRITE: Bank = 1 Row = 97, Col = 84, Data = 297a1552
|
|
# Status: Burst-No: 56 Write Address: 00061472 WriteData: 297a1552
|
|
# tb_core.u_sdram32 : at time 27157.0 ns WRITE: Bank = 1 Row = 97, Col = 85, Data = 7c1e5bf8
|
|
# Status: Burst-No: 57 Write Address: 00061472 WriteData: 7c1e5bf8
|
|
# tb_core.u_sdram32 : at time 27167.0 ns WRITE: Bank = 1 Row = 97, Col = 86, Data = 46dcb78d
|
|
# Status: Burst-No: 58 Write Address: 00061472 WriteData: 46dcb78d
|
|
# tb_core.u_sdram32 : at time 27177.0 ns WRITE: Bank = 1 Row = 97, Col = 87, Data = a95fc452
|
|
# Status: Burst-No: 59 Write Address: 00061472 WriteData: a95fc452
|
|
# tb_core.u_sdram32 : at time 27187.0 ns WRITE: Bank = 1 Row = 97, Col = 88, Data = 4219e784
|
|
# Status: Burst-No: 60 Write Address: 00061472 WriteData: 4219e784
|
|
# tb_core.u_sdram32 : at time 27197.0 ns WRITE: Bank = 1 Row = 97, Col = 89, Data = 236afd46
|
|
# Status: Burst-No: 61 Write Address: 00061472 WriteData: 236afd46
|
|
# tb_core.u_sdram32 : at time 27207.0 ns WRITE: Bank = 1 Row = 97, Col = 90, Data = c63a928c
|
|
# Status: Burst-No: 62 Write Address: 00061472 WriteData: c63a928c
|
|
# tb_core.u_sdram32 : at time 27217.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 27353.0 ns READ : Bank = 2 Row = 547, Col = 129, Data = cb5c8096
|
|
# tb_core.u_sdram32 : at time 27363.0 ns READ : Bank = 2 Row = 547, Col = 130, Data = 0a6e9314
|
|
# READ STATUS: Burst-No: 0 Addr: 00223a04 Rxd: cb5c8096
|
|
# tb_core.u_sdram32 : at time 27373.0 ns READ : Bank = 2 Row = 547, Col = 131, Data = 8919b412
|
|
# READ STATUS: Burst-No: 1 Addr: 00223a06 Rxd: 0a6e9314
|
|
# tb_core.u_sdram32 : at time 27383.0 ns READ : Bank = 2 Row = 547, Col = 132, Data = cb227096
|
|
# READ STATUS: Burst-No: 2 Addr: 00223a08 Rxd: 8919b412
|
|
# tb_core.u_sdram32 : at time 27393.0 ns READ : Bank = 2 Row = 547, Col = 133, Data = d8ace2b1
|
|
# READ STATUS: Burst-No: 3 Addr: 00223a0a Rxd: cb227096
|
|
# tb_core.u_sdram32 : at time 27403.0 ns READ : Bank = 2 Row = 547, Col = 134, Data = 2ac2d555
|
|
# READ STATUS: Burst-No: 4 Addr: 00223a0c Rxd: d8ace2b1
|
|
# tb_core.u_sdram32 : at time 27413.0 ns READ : Bank = 2 Row = 547, Col = 135, Data = f6c38eed
|
|
# READ STATUS: Burst-No: 5 Addr: 00223a0e Rxd: 2ac2d555
|
|
# tb_core.u_sdram32 : at time 27423.0 ns READ : Bank = 2 Row = 547, Col = 136, Data = 158b2b2b
|
|
# READ STATUS: Burst-No: 6 Addr: 00223a10 Rxd: f6c38eed
|
|
# tb_core.u_sdram32 : at time 27433.0 ns READ : Bank = 2 Row = 547, Col = 137, Data = 7ab11bf5
|
|
# READ STATUS: Burst-No: 7 Addr: 00223a12 Rxd: 158b2b2b
|
|
# tb_core.u_sdram32 : at time 27443.0 ns READ : Bank = 2 Row = 547, Col = 138, Data = 56b403ad
|
|
# READ STATUS: Burst-No: 8 Addr: 00223a14 Rxd: 7ab11bf5
|
|
# tb_core.u_sdram32 : at time 27453.0 ns READ : Bank = 2 Row = 547, Col = 139, Data = 93c12227
|
|
# READ STATUS: Burst-No: 9 Addr: 00223a16 Rxd: 56b403ad
|
|
# tb_core.u_sdram32 : at time 27463.0 ns READ : Bank = 2 Row = 547, Col = 140, Data = 4249ff84
|
|
# READ STATUS: Burst-No: 10 Addr: 00223a18 Rxd: 93c12227
|
|
# tb_core.u_sdram32 : at time 27473.0 ns READ : Bank = 2 Row = 547, Col = 141, Data = d3a8e4a7
|
|
# READ STATUS: Burst-No: 11 Addr: 00223a1a Rxd: 4249ff84
|
|
# tb_core.u_sdram32 : at time 27483.0 ns READ : Bank = 2 Row = 547, Col = 142, Data = f3d7a6e7
|
|
# READ STATUS: Burst-No: 12 Addr: 00223a1c Rxd: d3a8e4a7
|
|
# tb_core.u_sdram32 : at time 27493.0 ns READ : Bank = 2 Row = 547, Col = 143, Data = dcef90b9
|
|
# READ STATUS: Burst-No: 13 Addr: 00223a1e Rxd: f3d7a6e7
|
|
# tb_core.u_sdram32 : at time 27503.0 ns READ : Bank = 2 Row = 547, Col = 144, Data = a4da5649
|
|
# READ STATUS: Burst-No: 14 Addr: 00223a20 Rxd: dcef90b9
|
|
# tb_core.u_sdram32 : at time 27513.0 ns READ : Bank = 2 Row = 547, Col = 145, Data = 6de5bbdb
|
|
# READ STATUS: Burst-No: 15 Addr: 00223a22 Rxd: a4da5649
|
|
# tb_core.u_sdram32 : at time 27523.0 ns READ : Bank = 2 Row = 547, Col = 146, Data = 64ba0fc9
|
|
# READ STATUS: Burst-No: 16 Addr: 00223a24 Rxd: 6de5bbdb
|
|
# tb_core.u_sdram32 : at time 27533.0 ns READ : Bank = 2 Row = 547, Col = 147, Data = 2883b151
|
|
# READ STATUS: Burst-No: 17 Addr: 00223a26 Rxd: 64ba0fc9
|
|
# tb_core.u_sdram32 : at time 27543.0 ns READ : Bank = 2 Row = 547, Col = 148, Data = d0bc5ea1
|
|
# READ STATUS: Burst-No: 18 Addr: 00223a28 Rxd: 2883b151
|
|
# tb_core.u_sdram32 : at time 27553.0 ns READ : Bank = 2 Row = 547, Col = 149, Data = 1546dd2a
|
|
# READ STATUS: Burst-No: 19 Addr: 00223a2a Rxd: d0bc5ea1
|
|
# tb_core.u_sdram32 : at time 27563.0 ns READ : Bank = 2 Row = 547, Col = 150, Data = 7d2a45fa
|
|
# READ STATUS: Burst-No: 20 Addr: 00223a2c Rxd: 1546dd2a
|
|
# tb_core.u_sdram32 : at time 27573.0 ns READ : Bank = 2 Row = 547, Col = 151, Data = a2e62045
|
|
# tb_core.u_sdram32 : at time 27577.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 21 Addr: 00223a2e Rxd: 7d2a45fa
|
|
# tb_core.u_sdram32 : at time 27583.0 ns READ : Bank = 2 Row = 547, Col = 152, Data = 41a10583
|
|
# READ STATUS: Burst-No: 22 Addr: 00223a30 Rxd: a2e62045
|
|
# tb_core.u_sdram32 : at time 27593.0 ns READ : Bank = 2 Row = 547, Col = 153, Data = be75427c
|
|
# READ STATUS: Burst-No: 23 Addr: 00223a32 Rxd: 41a10583
|
|
# READ STATUS: Burst-No: 24 Addr: 00223a34 Rxd: be75427c
|
|
# tb_core.u_sdram32 : at time 27763.0 ns READ : Bank = 1 Row = 97, Col = 28, Data = b455f268
|
|
# tb_core.u_sdram32 : at time 27773.0 ns READ : Bank = 1 Row = 97, Col = 29, Data = b7dfaa6f
|
|
# READ STATUS: Burst-No: 0 Addr: 00061472 Rxd: b455f268
|
|
# tb_core.u_sdram32 : at time 27783.0 ns READ : Bank = 1 Row = 97, Col = 30, Data = 43460d86
|
|
# READ STATUS: Burst-No: 1 Addr: 00061474 Rxd: b7dfaa6f
|
|
# tb_core.u_sdram32 : at time 27793.0 ns READ : Bank = 1 Row = 97, Col = 31, Data = 782321f0
|
|
# READ STATUS: Burst-No: 2 Addr: 00061476 Rxd: 43460d86
|
|
# tb_core.u_sdram32 : at time 27803.0 ns READ : Bank = 1 Row = 97, Col = 32, Data = 1c719738
|
|
# READ STATUS: Burst-No: 3 Addr: 00061478 Rxd: 782321f0
|
|
# tb_core.u_sdram32 : at time 27813.0 ns READ : Bank = 1 Row = 97, Col = 33, Data = 20769140
|
|
# READ STATUS: Burst-No: 4 Addr: 0006147a Rxd: 1c719738
|
|
# tb_core.u_sdram32 : at time 27823.0 ns READ : Bank = 1 Row = 97, Col = 34, Data = 94097628
|
|
# READ STATUS: Burst-No: 5 Addr: 0006147c Rxd: 20769140
|
|
# tb_core.u_sdram32 : at time 27833.0 ns READ : Bank = 1 Row = 97, Col = 35, Data = 7b0da9f6
|
|
# READ STATUS: Burst-No: 6 Addr: 0006147e Rxd: 94097628
|
|
# tb_core.u_sdram32 : at time 27843.0 ns READ : Bank = 1 Row = 97, Col = 36, Data = e2bf1ac5
|
|
# READ STATUS: Burst-No: 7 Addr: 00061480 Rxd: 7b0da9f6
|
|
# tb_core.u_sdram32 : at time 27853.0 ns READ : Bank = 1 Row = 97, Col = 37, Data = 602831c0
|
|
# READ STATUS: Burst-No: 8 Addr: 00061482 Rxd: e2bf1ac5
|
|
# tb_core.u_sdram32 : at time 27863.0 ns READ : Bank = 1 Row = 97, Col = 38, Data = 3a625f74
|
|
# READ STATUS: Burst-No: 9 Addr: 00061484 Rxd: 602831c0
|
|
# tb_core.u_sdram32 : at time 27873.0 ns READ : Bank = 1 Row = 97, Col = 39, Data = 1cde7139
|
|
# READ STATUS: Burst-No: 10 Addr: 00061486 Rxd: 3a625f74
|
|
# tb_core.u_sdram32 : at time 27883.0 ns READ : Bank = 1 Row = 97, Col = 40, Data = d86a6ab0
|
|
# READ STATUS: Burst-No: 11 Addr: 00061488 Rxd: 1cde7139
|
|
# tb_core.u_sdram32 : at time 27893.0 ns READ : Bank = 1 Row = 97, Col = 41, Data = 1e1c873c
|
|
# READ STATUS: Burst-No: 12 Addr: 0006148a Rxd: d86a6ab0
|
|
# tb_core.u_sdram32 : at time 27903.0 ns READ : Bank = 1 Row = 97, Col = 42, Data = 1521932a
|
|
# READ STATUS: Burst-No: 13 Addr: 0006148c Rxd: 1e1c873c
|
|
# tb_core.u_sdram32 : at time 27913.0 ns READ : Bank = 1 Row = 97, Col = 43, Data = 3124d362
|
|
# READ STATUS: Burst-No: 14 Addr: 0006148e Rxd: 1521932a
|
|
# tb_core.u_sdram32 : at time 27923.0 ns READ : Bank = 1 Row = 97, Col = 44, Data = 0aec3515
|
|
# READ STATUS: Burst-No: 15 Addr: 00061490 Rxd: 3124d362
|
|
# tb_core.u_sdram32 : at time 27933.0 ns READ : Bank = 1 Row = 97, Col = 45, Data = f0b14ee1
|
|
# READ STATUS: Burst-No: 16 Addr: 00061492 Rxd: 0aec3515
|
|
# tb_core.u_sdram32 : at time 27943.0 ns READ : Bank = 1 Row = 97, Col = 46, Data = 0be29d17
|
|
# READ STATUS: Burst-No: 17 Addr: 00061494 Rxd: f0b14ee1
|
|
# tb_core.u_sdram32 : at time 27953.0 ns READ : Bank = 1 Row = 97, Col = 47, Data = a18bee43
|
|
# READ STATUS: Burst-No: 18 Addr: 00061496 Rxd: 0be29d17
|
|
# tb_core.u_sdram32 : at time 27963.0 ns READ : Bank = 1 Row = 97, Col = 48, Data = 64b5e3c9
|
|
# READ STATUS: Burst-No: 19 Addr: 00061498 Rxd: a18bee43
|
|
# tb_core.u_sdram32 : at time 27973.0 ns READ : Bank = 1 Row = 97, Col = 49, Data = c3360486
|
|
# READ STATUS: Burst-No: 20 Addr: 0006149a Rxd: 64b5e3c9
|
|
# tb_core.u_sdram32 : at time 27983.0 ns READ : Bank = 1 Row = 97, Col = 50, Data = 1297cb25
|
|
# READ STATUS: Burst-No: 21 Addr: 0006149c Rxd: c3360486
|
|
# tb_core.u_sdram32 : at time 27993.0 ns READ : Bank = 1 Row = 97, Col = 51, Data = 60f69dc1
|
|
# READ STATUS: Burst-No: 22 Addr: 0006149e Rxd: 1297cb25
|
|
# tb_core.u_sdram32 : at time 28003.0 ns READ : Bank = 1 Row = 97, Col = 52, Data = c69da28d
|
|
# READ STATUS: Burst-No: 23 Addr: 000614a0 Rxd: 60f69dc1
|
|
# tb_core.u_sdram32 : at time 28013.0 ns READ : Bank = 1 Row = 97, Col = 53, Data = ad67e25a
|
|
# READ STATUS: Burst-No: 24 Addr: 000614a2 Rxd: c69da28d
|
|
# tb_core.u_sdram32 : at time 28023.0 ns READ : Bank = 1 Row = 97, Col = 54, Data = 03d62707
|
|
# READ STATUS: Burst-No: 25 Addr: 000614a4 Rxd: ad67e25a
|
|
# tb_core.u_sdram32 : at time 28033.0 ns READ : Bank = 1 Row = 97, Col = 55, Data = 165b7b2c
|
|
# READ STATUS: Burst-No: 26 Addr: 000614a6 Rxd: 03d62707
|
|
# tb_core.u_sdram32 : at time 28043.0 ns READ : Bank = 1 Row = 97, Col = 56, Data = 060a5d0c
|
|
# READ STATUS: Burst-No: 27 Addr: 000614a8 Rxd: 165b7b2c
|
|
# tb_core.u_sdram32 : at time 28053.0 ns READ : Bank = 1 Row = 97, Col = 57, Data = b8ade671
|
|
# READ STATUS: Burst-No: 28 Addr: 000614aa Rxd: 060a5d0c
|
|
# tb_core.u_sdram32 : at time 28063.0 ns READ : Bank = 1 Row = 97, Col = 58, Data = 9de17c3b
|
|
# READ STATUS: Burst-No: 29 Addr: 000614ac Rxd: b8ade671
|
|
# tb_core.u_sdram32 : at time 28073.0 ns READ : Bank = 1 Row = 97, Col = 59, Data = 5b60e5b6
|
|
# READ STATUS: Burst-No: 30 Addr: 000614ae Rxd: 9de17c3b
|
|
# tb_core.u_sdram32 : at time 28083.0 ns READ : Bank = 1 Row = 97, Col = 60, Data = fbdfc2f7
|
|
# READ STATUS: Burst-No: 31 Addr: 000614b0 Rxd: 5b60e5b6
|
|
# tb_core.u_sdram32 : at time 28093.0 ns READ : Bank = 1 Row = 97, Col = 61, Data = cf14ce9e
|
|
# READ STATUS: Burst-No: 32 Addr: 000614b2 Rxd: fbdfc2f7
|
|
# tb_core.u_sdram32 : at time 28103.0 ns READ : Bank = 1 Row = 97, Col = 62, Data = ae78585c
|
|
# READ STATUS: Burst-No: 33 Addr: 000614b4 Rxd: cf14ce9e
|
|
# tb_core.u_sdram32 : at time 28113.0 ns READ : Bank = 1 Row = 97, Col = 63, Data = 2ab8f755
|
|
# READ STATUS: Burst-No: 34 Addr: 000614b6 Rxd: ae78585c
|
|
# tb_core.u_sdram32 : at time 28123.0 ns READ : Bank = 1 Row = 97, Col = 64, Data = 902a3a20
|
|
# READ STATUS: Burst-No: 35 Addr: 000614b8 Rxd: 2ab8f755
|
|
# tb_core.u_sdram32 : at time 28133.0 ns READ : Bank = 1 Row = 97, Col = 65, Data = d00b12a0
|
|
# READ STATUS: Burst-No: 36 Addr: 000614ba Rxd: 902a3a20
|
|
# tb_core.u_sdram32 : at time 28143.0 ns READ : Bank = 1 Row = 97, Col = 66, Data = 39600972
|
|
# READ STATUS: Burst-No: 37 Addr: 000614bc Rxd: d00b12a0
|
|
# tb_core.u_sdram32 : at time 28153.0 ns READ : Bank = 1 Row = 97, Col = 67, Data = da3d8cb4
|
|
# READ STATUS: Burst-No: 38 Addr: 000614be Rxd: 39600972
|
|
# tb_core.u_sdram32 : at time 28163.0 ns READ : Bank = 1 Row = 97, Col = 68, Data = 6e8af5dd
|
|
# READ STATUS: Burst-No: 39 Addr: 000614c0 Rxd: da3d8cb4
|
|
# tb_core.u_sdram32 : at time 28173.0 ns READ : Bank = 1 Row = 97, Col = 69, Data = 86dcf00d
|
|
# READ STATUS: Burst-No: 40 Addr: 000614c2 Rxd: 6e8af5dd
|
|
# tb_core.u_sdram32 : at time 28183.0 ns READ : Bank = 1 Row = 97, Col = 70, Data = 25b0994b
|
|
# READ STATUS: Burst-No: 41 Addr: 000614c4 Rxd: 86dcf00d
|
|
# tb_core.u_sdram32 : at time 28193.0 ns READ : Bank = 1 Row = 97, Col = 71, Data = bccc4279
|
|
# READ STATUS: Burst-No: 42 Addr: 000614c6 Rxd: 25b0994b
|
|
# tb_core.u_sdram32 : at time 28203.0 ns READ : Bank = 1 Row = 97, Col = 72, Data = cf63da9e
|
|
# READ STATUS: Burst-No: 43 Addr: 000614c8 Rxd: bccc4279
|
|
# tb_core.u_sdram32 : at time 28213.0 ns READ : Bank = 1 Row = 97, Col = 73, Data = fef064fd
|
|
# READ STATUS: Burst-No: 44 Addr: 000614ca Rxd: cf63da9e
|
|
# tb_core.u_sdram32 : at time 28223.0 ns READ : Bank = 1 Row = 97, Col = 74, Data = bde0d27b
|
|
# READ STATUS: Burst-No: 45 Addr: 000614cc Rxd: fef064fd
|
|
# tb_core.u_sdram32 : at time 28233.0 ns READ : Bank = 1 Row = 97, Col = 75, Data = 47e2738f
|
|
# READ STATUS: Burst-No: 46 Addr: 000614ce Rxd: bde0d27b
|
|
# tb_core.u_sdram32 : at time 28243.0 ns READ : Bank = 1 Row = 97, Col = 76, Data = 81c39a03
|
|
# READ STATUS: Burst-No: 47 Addr: 000614d0 Rxd: 47e2738f
|
|
# tb_core.u_sdram32 : at time 28253.0 ns READ : Bank = 1 Row = 97, Col = 77, Data = 71c129e3
|
|
# READ STATUS: Burst-No: 48 Addr: 000614d2 Rxd: 81c39a03
|
|
# tb_core.u_sdram32 : at time 28263.0 ns READ : Bank = 1 Row = 97, Col = 78, Data = 0e92431d
|
|
# READ STATUS: Burst-No: 49 Addr: 000614d4 Rxd: 71c129e3
|
|
# tb_core.u_sdram32 : at time 28273.0 ns READ : Bank = 1 Row = 97, Col = 79, Data = 58f93db1
|
|
# READ STATUS: Burst-No: 50 Addr: 000614d6 Rxd: 0e92431d
|
|
# tb_core.u_sdram32 : at time 28283.0 ns READ : Bank = 1 Row = 97, Col = 80, Data = 22119f44
|
|
# READ STATUS: Burst-No: 51 Addr: 000614d8 Rxd: 58f93db1
|
|
# tb_core.u_sdram32 : at time 28293.0 ns READ : Bank = 1 Row = 97, Col = 81, Data = ca9cbc95
|
|
# READ STATUS: Burst-No: 52 Addr: 000614da Rxd: 22119f44
|
|
# tb_core.u_sdram32 : at time 28303.0 ns READ : Bank = 1 Row = 97, Col = 82, Data = f01d34e0
|
|
# READ STATUS: Burst-No: 53 Addr: 000614dc Rxd: ca9cbc95
|
|
# tb_core.u_sdram32 : at time 28313.0 ns READ : Bank = 1 Row = 97, Col = 83, Data = f6a178ed
|
|
# READ STATUS: Burst-No: 54 Addr: 000614de Rxd: f01d34e0
|
|
# tb_core.u_sdram32 : at time 28323.0 ns READ : Bank = 1 Row = 97, Col = 84, Data = 297a1552
|
|
# READ STATUS: Burst-No: 55 Addr: 000614e0 Rxd: f6a178ed
|
|
# tb_core.u_sdram32 : at time 28333.0 ns READ : Bank = 1 Row = 97, Col = 85, Data = 7c1e5bf8
|
|
# READ STATUS: Burst-No: 56 Addr: 000614e2 Rxd: 297a1552
|
|
# tb_core.u_sdram32 : at time 28343.0 ns READ : Bank = 1 Row = 97, Col = 86, Data = 46dcb78d
|
|
# READ STATUS: Burst-No: 57 Addr: 000614e4 Rxd: 7c1e5bf8
|
|
# tb_core.u_sdram32 : at time 28353.0 ns READ : Bank = 1 Row = 97, Col = 87, Data = a95fc452
|
|
# READ STATUS: Burst-No: 58 Addr: 000614e6 Rxd: 46dcb78d
|
|
# tb_core.u_sdram32 : at time 28363.0 ns READ : Bank = 1 Row = 97, Col = 88, Data = 4219e784
|
|
# tb_core.u_sdram32 : at time 28367.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 59 Addr: 000614e8 Rxd: a95fc452
|
|
# tb_core.u_sdram32 : at time 28373.0 ns READ : Bank = 1 Row = 97, Col = 89, Data = 236afd46
|
|
# READ STATUS: Burst-No: 60 Addr: 000614ea Rxd: 4219e784
|
|
# tb_core.u_sdram32 : at time 28383.0 ns READ : Bank = 1 Row = 97, Col = 90, Data = c63a928c
|
|
# READ STATUS: Burst-No: 61 Addr: 000614ec Rxd: 236afd46
|
|
# READ STATUS: Burst-No: 62 Addr: 000614ee Rxd: c63a928c
|
|
# Write Address: 00087d90, Burst Size: 24
|
|
# tb_core.u_sdram32 : at time 28557.0 ns ACT : Bank = 3 Row = 135
|
|
# tb_core.u_sdram32 : at time 28587.0 ns WRITE: Bank = 3 Row = 135, Col = 100, Data = 352d616a
|
|
# Status: Burst-No: 0 Write Address: 00087d90 WriteData: 352d616a
|
|
# tb_core.u_sdram32 : at time 28597.0 ns WRITE: Bank = 3 Row = 135, Col = 101, Data = 427b5784
|
|
# Status: Burst-No: 1 Write Address: 00087d90 WriteData: 427b5784
|
|
# tb_core.u_sdram32 : at time 28607.0 ns WRITE: Bank = 3 Row = 135, Col = 102, Data = d55bbcaa
|
|
# Status: Burst-No: 2 Write Address: 00087d90 WriteData: d55bbcaa
|
|
# tb_core.u_sdram32 : at time 28617.0 ns WRITE: Bank = 3 Row = 135, Col = 103, Data = 3e6f0f7c
|
|
# Status: Burst-No: 3 Write Address: 00087d90 WriteData: 3e6f0f7c
|
|
# tb_core.u_sdram32 : at time 28627.0 ns WRITE: Bank = 3 Row = 135, Col = 104, Data = b0520260
|
|
# Status: Burst-No: 4 Write Address: 00087d90 WriteData: b0520260
|
|
# tb_core.u_sdram32 : at time 28637.0 ns WRITE: Bank = 3 Row = 135, Col = 105, Data = 5d4a4dba
|
|
# Status: Burst-No: 5 Write Address: 00087d90 WriteData: 5d4a4dba
|
|
# tb_core.u_sdram32 : at time 28647.0 ns WRITE: Bank = 3 Row = 135, Col = 106, Data = c5a1608b
|
|
# Status: Burst-No: 6 Write Address: 00087d90 WriteData: c5a1608b
|
|
# tb_core.u_sdram32 : at time 28657.0 ns WRITE: Bank = 3 Row = 135, Col = 107, Data = d31dfea6
|
|
# Status: Burst-No: 7 Write Address: 00087d90 WriteData: d31dfea6
|
|
# tb_core.u_sdram32 : at time 28667.0 ns WRITE: Bank = 3 Row = 135, Col = 108, Data = 92831e25
|
|
# Status: Burst-No: 8 Write Address: 00087d90 WriteData: 92831e25
|
|
# tb_core.u_sdram32 : at time 28677.0 ns WRITE: Bank = 3 Row = 135, Col = 109, Data = 19058332
|
|
# Status: Burst-No: 9 Write Address: 00087d90 WriteData: 19058332
|
|
# tb_core.u_sdram32 : at time 28687.0 ns WRITE: Bank = 3 Row = 135, Col = 110, Data = d10504a2
|
|
# Status: Burst-No: 10 Write Address: 00087d90 WriteData: d10504a2
|
|
# tb_core.u_sdram32 : at time 28697.0 ns WRITE: Bank = 3 Row = 135, Col = 111, Data = a48f7c49
|
|
# Status: Burst-No: 11 Write Address: 00087d90 WriteData: a48f7c49
|
|
# tb_core.u_sdram32 : at time 28707.0 ns WRITE: Bank = 3 Row = 135, Col = 112, Data = 8a64b014
|
|
# Status: Burst-No: 12 Write Address: 00087d90 WriteData: 8a64b014
|
|
# tb_core.u_sdram32 : at time 28717.0 ns WRITE: Bank = 3 Row = 135, Col = 113, Data = 9ec9c03d
|
|
# Status: Burst-No: 13 Write Address: 00087d90 WriteData: 9ec9c03d
|
|
# tb_core.u_sdram32 : at time 28727.0 ns WRITE: Bank = 3 Row = 135, Col = 114, Data = 25f2034b
|
|
# Status: Burst-No: 14 Write Address: 00087d90 WriteData: 25f2034b
|
|
# tb_core.u_sdram32 : at time 28737.0 ns WRITE: Bank = 3 Row = 135, Col = 115, Data = ae68305c
|
|
# Status: Burst-No: 15 Write Address: 00087d90 WriteData: ae68305c
|
|
# tb_core.u_sdram32 : at time 28747.0 ns WRITE: Bank = 3 Row = 135, Col = 116, Data = 23907547
|
|
# Status: Burst-No: 16 Write Address: 00087d90 WriteData: 23907547
|
|
# tb_core.u_sdram32 : at time 28757.0 ns WRITE: Bank = 3 Row = 135, Col = 117, Data = 433e9786
|
|
# Status: Burst-No: 17 Write Address: 00087d90 WriteData: 433e9786
|
|
# tb_core.u_sdram32 : at time 28767.0 ns WRITE: Bank = 3 Row = 135, Col = 118, Data = 9caf7a39
|
|
# Status: Burst-No: 18 Write Address: 00087d90 WriteData: 9caf7a39
|
|
# tb_core.u_sdram32 : at time 28777.0 ns WRITE: Bank = 3 Row = 135, Col = 119, Data = da058ab4
|
|
# Status: Burst-No: 19 Write Address: 00087d90 WriteData: da058ab4
|
|
# tb_core.u_sdram32 : at time 28787.0 ns WRITE: Bank = 3 Row = 135, Col = 120, Data = 6851e5d0
|
|
# Status: Burst-No: 20 Write Address: 00087d90 WriteData: 6851e5d0
|
|
# tb_core.u_sdram32 : at time 28797.0 ns WRITE: Bank = 3 Row = 135, Col = 121, Data = 9622502c
|
|
# Status: Burst-No: 21 Write Address: 00087d90 WriteData: 9622502c
|
|
# tb_core.u_sdram32 : at time 28807.0 ns WRITE: Bank = 3 Row = 135, Col = 122, Data = 467c458c
|
|
# Status: Burst-No: 22 Write Address: 00087d90 WriteData: 467c458c
|
|
# tb_core.u_sdram32 : at time 28817.0 ns WRITE: Bank = 3 Row = 135, Col = 123, Data = 03e9b707
|
|
# Status: Burst-No: 23 Write Address: 00087d90 WriteData: 03e9b707
|
|
# tb_core.u_sdram32 : at time 28827.0 ns BST : Burst Terminate
|
|
# Write Address: 0022406a, Burst Size: 18
|
|
# tb_core.u_sdram32 : at time 28967.0 ns ACT : Bank = 0 Row = 548
|
|
# tb_core.u_sdram32 : at time 28997.0 ns WRITE: Bank = 0 Row = 548, Col = 26, Data = 746affe8
|
|
# Status: Burst-No: 0 Write Address: 0022406a WriteData: 746affe8
|
|
# tb_core.u_sdram32 : at time 29007.0 ns WRITE: Bank = 0 Row = 548, Col = 27, Data = a5e79e4b
|
|
# Status: Burst-No: 1 Write Address: 0022406a WriteData: a5e79e4b
|
|
# tb_core.u_sdram32 : at time 29017.0 ns WRITE: Bank = 0 Row = 548, Col = 28, Data = 39e48173
|
|
# Status: Burst-No: 2 Write Address: 0022406a WriteData: 39e48173
|
|
# tb_core.u_sdram32 : at time 29027.0 ns WRITE: Bank = 0 Row = 548, Col = 29, Data = 76295bec
|
|
# Status: Burst-No: 3 Write Address: 0022406a WriteData: 76295bec
|
|
# tb_core.u_sdram32 : at time 29037.0 ns WRITE: Bank = 0 Row = 548, Col = 30, Data = 11fe0523
|
|
# Status: Burst-No: 4 Write Address: 0022406a WriteData: 11fe0523
|
|
# tb_core.u_sdram32 : at time 29047.0 ns WRITE: Bank = 0 Row = 548, Col = 31, Data = 520eefa4
|
|
# Status: Burst-No: 5 Write Address: 0022406a WriteData: 520eefa4
|
|
# tb_core.u_sdram32 : at time 29057.0 ns WRITE: Bank = 0 Row = 548, Col = 32, Data = 64e165c9
|
|
# Status: Burst-No: 6 Write Address: 0022406a WriteData: 64e165c9
|
|
# tb_core.u_sdram32 : at time 29067.0 ns WRITE: Bank = 0 Row = 548, Col = 33, Data = 9ca70439
|
|
# Status: Burst-No: 7 Write Address: 0022406a WriteData: 9ca70439
|
|
# tb_core.u_sdram32 : at time 29077.0 ns WRITE: Bank = 0 Row = 548, Col = 34, Data = ef8372df
|
|
# Status: Burst-No: 8 Write Address: 0022406a WriteData: ef8372df
|
|
# tb_core.u_sdram32 : at time 29087.0 ns WRITE: Bank = 0 Row = 548, Col = 35, Data = ea5814d4
|
|
# Status: Burst-No: 9 Write Address: 0022406a WriteData: ea5814d4
|
|
# tb_core.u_sdram32 : at time 29097.0 ns WRITE: Bank = 0 Row = 548, Col = 36, Data = 33836567
|
|
# Status: Burst-No: 10 Write Address: 0022406a WriteData: 33836567
|
|
# tb_core.u_sdram32 : at time 29107.0 ns WRITE: Bank = 0 Row = 548, Col = 37, Data = 4ea0419d
|
|
# Status: Burst-No: 11 Write Address: 0022406a WriteData: 4ea0419d
|
|
# tb_core.u_sdram32 : at time 29117.0 ns WRITE: Bank = 0 Row = 548, Col = 38, Data = 583125b0
|
|
# Status: Burst-No: 12 Write Address: 0022406a WriteData: 583125b0
|
|
# tb_core.u_sdram32 : at time 29127.0 ns WRITE: Bank = 0 Row = 548, Col = 39, Data = 41103982
|
|
# Status: Burst-No: 13 Write Address: 0022406a WriteData: 41103982
|
|
# tb_core.u_sdram32 : at time 29137.0 ns WRITE: Bank = 0 Row = 548, Col = 40, Data = 24d2bf49
|
|
# Status: Burst-No: 14 Write Address: 0022406a WriteData: 24d2bf49
|
|
# tb_core.u_sdram32 : at time 29147.0 ns WRITE: Bank = 0 Row = 548, Col = 41, Data = ecb91ad9
|
|
# Status: Burst-No: 15 Write Address: 0022406a WriteData: ecb91ad9
|
|
# tb_core.u_sdram32 : at time 29157.0 ns WRITE: Bank = 0 Row = 548, Col = 42, Data = 1000b720
|
|
# Status: Burst-No: 16 Write Address: 0022406a WriteData: 1000b720
|
|
# tb_core.u_sdram32 : at time 29167.0 ns WRITE: Bank = 0 Row = 548, Col = 43, Data = 8e054c1c
|
|
# Status: Burst-No: 17 Write Address: 0022406a WriteData: 8e054c1c
|
|
# tb_core.u_sdram32 : at time 29177.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 29313.0 ns READ : Bank = 3 Row = 135, Col = 100, Data = 352d616a
|
|
# tb_core.u_sdram32 : at time 29323.0 ns READ : Bank = 3 Row = 135, Col = 101, Data = 427b5784
|
|
# READ STATUS: Burst-No: 0 Addr: 00087d90 Rxd: 352d616a
|
|
# tb_core.u_sdram32 : at time 29333.0 ns READ : Bank = 3 Row = 135, Col = 102, Data = d55bbcaa
|
|
# READ STATUS: Burst-No: 1 Addr: 00087d92 Rxd: 427b5784
|
|
# tb_core.u_sdram32 : at time 29343.0 ns READ : Bank = 3 Row = 135, Col = 103, Data = 3e6f0f7c
|
|
# READ STATUS: Burst-No: 2 Addr: 00087d94 Rxd: d55bbcaa
|
|
# tb_core.u_sdram32 : at time 29353.0 ns READ : Bank = 3 Row = 135, Col = 104, Data = b0520260
|
|
# READ STATUS: Burst-No: 3 Addr: 00087d96 Rxd: 3e6f0f7c
|
|
# tb_core.u_sdram32 : at time 29363.0 ns READ : Bank = 3 Row = 135, Col = 105, Data = 5d4a4dba
|
|
# READ STATUS: Burst-No: 4 Addr: 00087d98 Rxd: b0520260
|
|
# tb_core.u_sdram32 : at time 29373.0 ns READ : Bank = 3 Row = 135, Col = 106, Data = c5a1608b
|
|
# READ STATUS: Burst-No: 5 Addr: 00087d9a Rxd: 5d4a4dba
|
|
# tb_core.u_sdram32 : at time 29383.0 ns READ : Bank = 3 Row = 135, Col = 107, Data = d31dfea6
|
|
# READ STATUS: Burst-No: 6 Addr: 00087d9c Rxd: c5a1608b
|
|
# tb_core.u_sdram32 : at time 29393.0 ns READ : Bank = 3 Row = 135, Col = 108, Data = 92831e25
|
|
# READ STATUS: Burst-No: 7 Addr: 00087d9e Rxd: d31dfea6
|
|
# tb_core.u_sdram32 : at time 29403.0 ns READ : Bank = 3 Row = 135, Col = 109, Data = 19058332
|
|
# READ STATUS: Burst-No: 8 Addr: 00087da0 Rxd: 92831e25
|
|
# tb_core.u_sdram32 : at time 29413.0 ns READ : Bank = 3 Row = 135, Col = 110, Data = d10504a2
|
|
# READ STATUS: Burst-No: 9 Addr: 00087da2 Rxd: 19058332
|
|
# tb_core.u_sdram32 : at time 29423.0 ns READ : Bank = 3 Row = 135, Col = 111, Data = a48f7c49
|
|
# READ STATUS: Burst-No: 10 Addr: 00087da4 Rxd: d10504a2
|
|
# tb_core.u_sdram32 : at time 29433.0 ns READ : Bank = 3 Row = 135, Col = 112, Data = 8a64b014
|
|
# READ STATUS: Burst-No: 11 Addr: 00087da6 Rxd: a48f7c49
|
|
# tb_core.u_sdram32 : at time 29443.0 ns READ : Bank = 3 Row = 135, Col = 113, Data = 9ec9c03d
|
|
# READ STATUS: Burst-No: 12 Addr: 00087da8 Rxd: 8a64b014
|
|
# tb_core.u_sdram32 : at time 29453.0 ns READ : Bank = 3 Row = 135, Col = 114, Data = 25f2034b
|
|
# READ STATUS: Burst-No: 13 Addr: 00087daa Rxd: 9ec9c03d
|
|
# tb_core.u_sdram32 : at time 29463.0 ns READ : Bank = 3 Row = 135, Col = 115, Data = ae68305c
|
|
# READ STATUS: Burst-No: 14 Addr: 00087dac Rxd: 25f2034b
|
|
# tb_core.u_sdram32 : at time 29473.0 ns READ : Bank = 3 Row = 135, Col = 116, Data = 23907547
|
|
# READ STATUS: Burst-No: 15 Addr: 00087dae Rxd: ae68305c
|
|
# tb_core.u_sdram32 : at time 29483.0 ns READ : Bank = 3 Row = 135, Col = 117, Data = 433e9786
|
|
# READ STATUS: Burst-No: 16 Addr: 00087db0 Rxd: 23907547
|
|
# tb_core.u_sdram32 : at time 29493.0 ns READ : Bank = 3 Row = 135, Col = 118, Data = 9caf7a39
|
|
# READ STATUS: Burst-No: 17 Addr: 00087db2 Rxd: 433e9786
|
|
# tb_core.u_sdram32 : at time 29503.0 ns READ : Bank = 3 Row = 135, Col = 119, Data = da058ab4
|
|
# READ STATUS: Burst-No: 18 Addr: 00087db4 Rxd: 9caf7a39
|
|
# tb_core.u_sdram32 : at time 29513.0 ns READ : Bank = 3 Row = 135, Col = 120, Data = 6851e5d0
|
|
# READ STATUS: Burst-No: 19 Addr: 00087db6 Rxd: da058ab4
|
|
# tb_core.u_sdram32 : at time 29523.0 ns READ : Bank = 3 Row = 135, Col = 121, Data = 9622502c
|
|
# tb_core.u_sdram32 : at time 29527.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 20 Addr: 00087db8 Rxd: 6851e5d0
|
|
# tb_core.u_sdram32 : at time 29533.0 ns READ : Bank = 3 Row = 135, Col = 122, Data = 467c458c
|
|
# READ STATUS: Burst-No: 21 Addr: 00087dba Rxd: 9622502c
|
|
# tb_core.u_sdram32 : at time 29543.0 ns READ : Bank = 3 Row = 135, Col = 123, Data = 03e9b707
|
|
# READ STATUS: Burst-No: 22 Addr: 00087dbc Rxd: 467c458c
|
|
# READ STATUS: Burst-No: 23 Addr: 00087dbe Rxd: 03e9b707
|
|
# tb_core.u_sdram32 : at time 29713.0 ns READ : Bank = 0 Row = 548, Col = 26, Data = 746affe8
|
|
# tb_core.u_sdram32 : at time 29723.0 ns READ : Bank = 0 Row = 548, Col = 27, Data = a5e79e4b
|
|
# READ STATUS: Burst-No: 0 Addr: 0022406a Rxd: 746affe8
|
|
# tb_core.u_sdram32 : at time 29733.0 ns READ : Bank = 0 Row = 548, Col = 28, Data = 39e48173
|
|
# READ STATUS: Burst-No: 1 Addr: 0022406c Rxd: a5e79e4b
|
|
# tb_core.u_sdram32 : at time 29743.0 ns READ : Bank = 0 Row = 548, Col = 29, Data = 76295bec
|
|
# READ STATUS: Burst-No: 2 Addr: 0022406e Rxd: 39e48173
|
|
# tb_core.u_sdram32 : at time 29753.0 ns READ : Bank = 0 Row = 548, Col = 30, Data = 11fe0523
|
|
# READ STATUS: Burst-No: 3 Addr: 00224070 Rxd: 76295bec
|
|
# tb_core.u_sdram32 : at time 29763.0 ns READ : Bank = 0 Row = 548, Col = 31, Data = 520eefa4
|
|
# READ STATUS: Burst-No: 4 Addr: 00224072 Rxd: 11fe0523
|
|
# tb_core.u_sdram32 : at time 29773.0 ns READ : Bank = 0 Row = 548, Col = 32, Data = 64e165c9
|
|
# READ STATUS: Burst-No: 5 Addr: 00224074 Rxd: 520eefa4
|
|
# tb_core.u_sdram32 : at time 29783.0 ns READ : Bank = 0 Row = 548, Col = 33, Data = 9ca70439
|
|
# READ STATUS: Burst-No: 6 Addr: 00224076 Rxd: 64e165c9
|
|
# tb_core.u_sdram32 : at time 29793.0 ns READ : Bank = 0 Row = 548, Col = 34, Data = ef8372df
|
|
# READ STATUS: Burst-No: 7 Addr: 00224078 Rxd: 9ca70439
|
|
# tb_core.u_sdram32 : at time 29803.0 ns READ : Bank = 0 Row = 548, Col = 35, Data = ea5814d4
|
|
# READ STATUS: Burst-No: 8 Addr: 0022407a Rxd: ef8372df
|
|
# tb_core.u_sdram32 : at time 29813.0 ns READ : Bank = 0 Row = 548, Col = 36, Data = 33836567
|
|
# READ STATUS: Burst-No: 9 Addr: 0022407c Rxd: ea5814d4
|
|
# tb_core.u_sdram32 : at time 29823.0 ns READ : Bank = 0 Row = 548, Col = 37, Data = 4ea0419d
|
|
# READ STATUS: Burst-No: 10 Addr: 0022407e Rxd: 33836567
|
|
# tb_core.u_sdram32 : at time 29833.0 ns READ : Bank = 0 Row = 548, Col = 38, Data = 583125b0
|
|
# READ STATUS: Burst-No: 11 Addr: 00224080 Rxd: 4ea0419d
|
|
# tb_core.u_sdram32 : at time 29843.0 ns READ : Bank = 0 Row = 548, Col = 39, Data = 41103982
|
|
# READ STATUS: Burst-No: 12 Addr: 00224082 Rxd: 583125b0
|
|
# tb_core.u_sdram32 : at time 29853.0 ns READ : Bank = 0 Row = 548, Col = 40, Data = 24d2bf49
|
|
# READ STATUS: Burst-No: 13 Addr: 00224084 Rxd: 41103982
|
|
# tb_core.u_sdram32 : at time 29863.0 ns READ : Bank = 0 Row = 548, Col = 41, Data = ecb91ad9
|
|
# tb_core.u_sdram32 : at time 29867.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 14 Addr: 00224086 Rxd: 24d2bf49
|
|
# tb_core.u_sdram32 : at time 29873.0 ns READ : Bank = 0 Row = 548, Col = 42, Data = 1000b720
|
|
# READ STATUS: Burst-No: 15 Addr: 00224088 Rxd: ecb91ad9
|
|
# tb_core.u_sdram32 : at time 29883.0 ns READ : Bank = 0 Row = 548, Col = 43, Data = 8e054c1c
|
|
# READ STATUS: Burst-No: 16 Addr: 0022408a Rxd: 1000b720
|
|
# READ STATUS: Burst-No: 17 Addr: 0022408c Rxd: 8e054c1c
|
|
# Write Address: 00316f93, Burst Size: 36
|
|
# tb_core.u_sdram32 : at time 30057.0 ns ACT : Bank = 3 Row = 790
|
|
# tb_core.u_sdram32 : at time 30087.0 ns WRITE: Bank = 3 Row = 790, Col = 228, Data = 954b822a
|
|
# Status: Burst-No: 0 Write Address: 00316f93 WriteData: 954b822a
|
|
# tb_core.u_sdram32 : at time 30097.0 ns ACT : Bank = 0 Row = 791
|
|
# tb_core.u_sdram32 : at time 30097.0 ns WRITE: Bank = 3 Row = 790, Col = 229, Data = e471f8c8
|
|
# Status: Burst-No: 1 Write Address: 00316f93 WriteData: e471f8c8
|
|
# tb_core.u_sdram32 : at time 30107.0 ns WRITE: Bank = 3 Row = 790, Col = 230, Data = aed72e5d
|
|
# Status: Burst-No: 2 Write Address: 00316f93 WriteData: aed72e5d
|
|
# tb_core.u_sdram32 : at time 30117.0 ns WRITE: Bank = 3 Row = 790, Col = 231, Data = 1d3f9d3a
|
|
# Status: Burst-No: 3 Write Address: 00316f93 WriteData: 1d3f9d3a
|
|
# tb_core.u_sdram32 : at time 30127.0 ns WRITE: Bank = 3 Row = 790, Col = 232, Data = 4226a984
|
|
# Status: Burst-No: 4 Write Address: 00316f93 WriteData: 4226a984
|
|
# tb_core.u_sdram32 : at time 30137.0 ns WRITE: Bank = 3 Row = 790, Col = 233, Data = 95a9a82b
|
|
# Status: Burst-No: 5 Write Address: 00316f93 WriteData: 95a9a82b
|
|
# tb_core.u_sdram32 : at time 30147.0 ns WRITE: Bank = 3 Row = 790, Col = 234, Data = 1c8d7f39
|
|
# Status: Burst-No: 6 Write Address: 00316f93 WriteData: 1c8d7f39
|
|
# tb_core.u_sdram32 : at time 30157.0 ns WRITE: Bank = 3 Row = 790, Col = 235, Data = 897f1c12
|
|
# Status: Burst-No: 7 Write Address: 00316f93 WriteData: 897f1c12
|
|
# tb_core.u_sdram32 : at time 30167.0 ns WRITE: Bank = 3 Row = 790, Col = 236, Data = a97f0052
|
|
# Status: Burst-No: 8 Write Address: 00316f93 WriteData: a97f0052
|
|
# tb_core.u_sdram32 : at time 30177.0 ns WRITE: Bank = 3 Row = 790, Col = 237, Data = 2c848959
|
|
# Status: Burst-No: 9 Write Address: 00316f93 WriteData: 2c848959
|
|
# tb_core.u_sdram32 : at time 30187.0 ns WRITE: Bank = 3 Row = 790, Col = 238, Data = e82b96d0
|
|
# Status: Burst-No: 10 Write Address: 00316f93 WriteData: e82b96d0
|
|
# tb_core.u_sdram32 : at time 30197.0 ns WRITE: Bank = 3 Row = 790, Col = 239, Data = b759ea6e
|
|
# Status: Burst-No: 11 Write Address: 00316f93 WriteData: b759ea6e
|
|
# tb_core.u_sdram32 : at time 30207.0 ns WRITE: Bank = 3 Row = 790, Col = 240, Data = 4bf52997
|
|
# Status: Burst-No: 12 Write Address: 00316f93 WriteData: 4bf52997
|
|
# tb_core.u_sdram32 : at time 30217.0 ns WRITE: Bank = 3 Row = 790, Col = 241, Data = 6d8b87db
|
|
# Status: Burst-No: 13 Write Address: 00316f93 WriteData: 6d8b87db
|
|
# tb_core.u_sdram32 : at time 30227.0 ns WRITE: Bank = 3 Row = 790, Col = 242, Data = 535277a6
|
|
# Status: Burst-No: 14 Write Address: 00316f93 WriteData: 535277a6
|
|
# tb_core.u_sdram32 : at time 30237.0 ns WRITE: Bank = 3 Row = 790, Col = 243, Data = 5d85d3bb
|
|
# Status: Burst-No: 15 Write Address: 00316f93 WriteData: 5d85d3bb
|
|
# tb_core.u_sdram32 : at time 30247.0 ns WRITE: Bank = 3 Row = 790, Col = 244, Data = 80797c00
|
|
# Status: Burst-No: 16 Write Address: 00316f93 WriteData: 80797c00
|
|
# tb_core.u_sdram32 : at time 30257.0 ns WRITE: Bank = 3 Row = 790, Col = 245, Data = 87e44c0f
|
|
# Status: Burst-No: 17 Write Address: 00316f93 WriteData: 87e44c0f
|
|
# tb_core.u_sdram32 : at time 30267.0 ns WRITE: Bank = 3 Row = 790, Col = 246, Data = b4e8d669
|
|
# Status: Burst-No: 18 Write Address: 00316f93 WriteData: b4e8d669
|
|
# tb_core.u_sdram32 : at time 30277.0 ns WRITE: Bank = 3 Row = 790, Col = 247, Data = 8653620c
|
|
# Status: Burst-No: 19 Write Address: 00316f93 WriteData: 8653620c
|
|
# tb_core.u_sdram32 : at time 30287.0 ns WRITE: Bank = 3 Row = 790, Col = 248, Data = 2ca81959
|
|
# Status: Burst-No: 20 Write Address: 00316f93 WriteData: 2ca81959
|
|
# tb_core.u_sdram32 : at time 30297.0 ns WRITE: Bank = 3 Row = 790, Col = 249, Data = 62fd49c5
|
|
# Status: Burst-No: 21 Write Address: 00316f93 WriteData: 62fd49c5
|
|
# tb_core.u_sdram32 : at time 30307.0 ns WRITE: Bank = 3 Row = 790, Col = 250, Data = 67d735cf
|
|
# Status: Burst-No: 22 Write Address: 00316f93 WriteData: 67d735cf
|
|
# tb_core.u_sdram32 : at time 30317.0 ns WRITE: Bank = 3 Row = 790, Col = 251, Data = 4839e590
|
|
# Status: Burst-No: 23 Write Address: 00316f93 WriteData: 4839e590
|
|
# tb_core.u_sdram32 : at time 30327.0 ns WRITE: Bank = 3 Row = 790, Col = 252, Data = a8e4d851
|
|
# Status: Burst-No: 24 Write Address: 00316f93 WriteData: a8e4d851
|
|
# tb_core.u_sdram32 : at time 30337.0 ns WRITE: Bank = 3 Row = 790, Col = 253, Data = b4f9a469
|
|
# Status: Burst-No: 25 Write Address: 00316f93 WriteData: b4f9a469
|
|
# tb_core.u_sdram32 : at time 30347.0 ns WRITE: Bank = 3 Row = 790, Col = 254, Data = 3b83cd77
|
|
# Status: Burst-No: 26 Write Address: 00316f93 WriteData: 3b83cd77
|
|
# tb_core.u_sdram32 : at time 30357.0 ns WRITE: Bank = 3 Row = 790, Col = 255, Data = 2523654a
|
|
# Status: Burst-No: 27 Write Address: 00316f93 WriteData: 2523654a
|
|
# tb_core.u_sdram32 : at time 30367.0 ns WRITE: Bank = 0 Row = 791, Col = 0, Data = ec3758d8
|
|
# Status: Burst-No: 28 Write Address: 00316f93 WriteData: ec3758d8
|
|
# tb_core.u_sdram32 : at time 30377.0 ns WRITE: Bank = 0 Row = 791, Col = 1, Data = 4ddd4d9b
|
|
# Status: Burst-No: 29 Write Address: 00316f93 WriteData: 4ddd4d9b
|
|
# tb_core.u_sdram32 : at time 30387.0 ns WRITE: Bank = 0 Row = 791, Col = 2, Data = e20e9ac4
|
|
# Status: Burst-No: 30 Write Address: 00316f93 WriteData: e20e9ac4
|
|
# tb_core.u_sdram32 : at time 30397.0 ns WRITE: Bank = 0 Row = 791, Col = 3, Data = 5c78b1b8
|
|
# Status: Burst-No: 31 Write Address: 00316f93 WriteData: 5c78b1b8
|
|
# tb_core.u_sdram32 : at time 30407.0 ns WRITE: Bank = 0 Row = 791, Col = 4, Data = dbe6f2b7
|
|
# Status: Burst-No: 32 Write Address: 00316f93 WriteData: dbe6f2b7
|
|
# tb_core.u_sdram32 : at time 30417.0 ns WRITE: Bank = 0 Row = 791, Col = 5, Data = c378ee86
|
|
# Status: Burst-No: 33 Write Address: 00316f93 WriteData: c378ee86
|
|
# tb_core.u_sdram32 : at time 30427.0 ns WRITE: Bank = 0 Row = 791, Col = 6, Data = 984d5a30
|
|
# Status: Burst-No: 34 Write Address: 00316f93 WriteData: 984d5a30
|
|
# tb_core.u_sdram32 : at time 30437.0 ns WRITE: Bank = 0 Row = 791, Col = 7, Data = 3bed5377
|
|
# Status: Burst-No: 35 Write Address: 00316f93 WriteData: 3bed5377
|
|
# tb_core.u_sdram32 : at time 30447.0 ns BST : Burst Terminate
|
|
# Write Address: 0016c7b5, Burst Size: 21
|
|
# tb_core.u_sdram32 : at time 30587.0 ns ACT : Bank = 1 Row = 364
|
|
# tb_core.u_sdram32 : at time 30617.0 ns WRITE: Bank = 1 Row = 364, Col = 237, Data = 03878707
|
|
# Status: Burst-No: 0 Write Address: 0016c7b5 WriteData: 03878707
|
|
# tb_core.u_sdram32 : at time 30627.0 ns ACT : Bank = 2 Row = 364
|
|
# tb_core.u_sdram32 : at time 30627.0 ns WRITE: Bank = 1 Row = 364, Col = 238, Data = 3b0b9776
|
|
# Status: Burst-No: 1 Write Address: 0016c7b5 WriteData: 3b0b9776
|
|
# tb_core.u_sdram32 : at time 30637.0 ns WRITE: Bank = 1 Row = 364, Col = 239, Data = 74a1ade9
|
|
# Status: Burst-No: 2 Write Address: 0016c7b5 WriteData: 74a1ade9
|
|
# tb_core.u_sdram32 : at time 30647.0 ns WRITE: Bank = 1 Row = 364, Col = 240, Data = 45e28b8b
|
|
# Status: Burst-No: 3 Write Address: 0016c7b5 WriteData: 45e28b8b
|
|
# tb_core.u_sdram32 : at time 30657.0 ns WRITE: Bank = 1 Row = 364, Col = 241, Data = 00f25f01
|
|
# Status: Burst-No: 4 Write Address: 0016c7b5 WriteData: 00f25f01
|
|
# tb_core.u_sdram32 : at time 30667.0 ns WRITE: Bank = 1 Row = 364, Col = 242, Data = 6d808bdb
|
|
# Status: Burst-No: 5 Write Address: 0016c7b5 WriteData: 6d808bdb
|
|
# tb_core.u_sdram32 : at time 30677.0 ns WRITE: Bank = 1 Row = 364, Col = 243, Data = c0764280
|
|
# Status: Burst-No: 6 Write Address: 0016c7b5 WriteData: c0764280
|
|
# tb_core.u_sdram32 : at time 30687.0 ns WRITE: Bank = 1 Row = 364, Col = 244, Data = 611d9fc2
|
|
# Status: Burst-No: 7 Write Address: 0016c7b5 WriteData: 611d9fc2
|
|
# tb_core.u_sdram32 : at time 30697.0 ns WRITE: Bank = 1 Row = 364, Col = 245, Data = e2ecdac5
|
|
# Status: Burst-No: 8 Write Address: 0016c7b5 WriteData: e2ecdac5
|
|
# tb_core.u_sdram32 : at time 30707.0 ns WRITE: Bank = 1 Row = 364, Col = 246, Data = 9827fa30
|
|
# Status: Burst-No: 9 Write Address: 0016c7b5 WriteData: 9827fa30
|
|
# tb_core.u_sdram32 : at time 30717.0 ns WRITE: Bank = 1 Row = 364, Col = 247, Data = d7b2e4af
|
|
# Status: Burst-No: 10 Write Address: 0016c7b5 WriteData: d7b2e4af
|
|
# tb_core.u_sdram32 : at time 30727.0 ns WRITE: Bank = 1 Row = 364, Col = 248, Data = b302da66
|
|
# Status: Burst-No: 11 Write Address: 0016c7b5 WriteData: b302da66
|
|
# tb_core.u_sdram32 : at time 30737.0 ns WRITE: Bank = 1 Row = 364, Col = 249, Data = 57fbb9af
|
|
# Status: Burst-No: 12 Write Address: 0016c7b5 WriteData: 57fbb9af
|
|
# tb_core.u_sdram32 : at time 30747.0 ns WRITE: Bank = 1 Row = 364, Col = 250, Data = f4d86ee9
|
|
# Status: Burst-No: 13 Write Address: 0016c7b5 WriteData: f4d86ee9
|
|
# tb_core.u_sdram32 : at time 30757.0 ns WRITE: Bank = 1 Row = 364, Col = 251, Data = 7c41aff8
|
|
# Status: Burst-No: 14 Write Address: 0016c7b5 WriteData: 7c41aff8
|
|
# tb_core.u_sdram32 : at time 30767.0 ns WRITE: Bank = 1 Row = 364, Col = 252, Data = 8376ac06
|
|
# Status: Burst-No: 15 Write Address: 0016c7b5 WriteData: 8376ac06
|
|
# tb_core.u_sdram32 : at time 30777.0 ns WRITE: Bank = 1 Row = 364, Col = 253, Data = f78576ef
|
|
# Status: Burst-No: 16 Write Address: 0016c7b5 WriteData: f78576ef
|
|
# tb_core.u_sdram32 : at time 30787.0 ns WRITE: Bank = 1 Row = 364, Col = 254, Data = 70ef37e1
|
|
# Status: Burst-No: 17 Write Address: 0016c7b5 WriteData: 70ef37e1
|
|
# tb_core.u_sdram32 : at time 30797.0 ns WRITE: Bank = 1 Row = 364, Col = 255, Data = cab47c95
|
|
# Status: Burst-No: 18 Write Address: 0016c7b5 WriteData: cab47c95
|
|
# tb_core.u_sdram32 : at time 30807.0 ns WRITE: Bank = 2 Row = 364, Col = 0, Data = f7723eee
|
|
# Status: Burst-No: 19 Write Address: 0016c7b5 WriteData: f7723eee
|
|
# tb_core.u_sdram32 : at time 30817.0 ns WRITE: Bank = 2 Row = 364, Col = 1, Data = 304e4d60
|
|
# Status: Burst-No: 20 Write Address: 0016c7b5 WriteData: 304e4d60
|
|
# tb_core.u_sdram32 : at time 30827.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 30963.0 ns READ : Bank = 3 Row = 790, Col = 228, Data = 954b822a
|
|
# tb_core.u_sdram32 : at time 30973.0 ns READ : Bank = 3 Row = 790, Col = 229, Data = e471f8c8
|
|
# READ STATUS: Burst-No: 0 Addr: 00316f93 Rxd: 954b822a
|
|
# tb_core.u_sdram32 : at time 30983.0 ns READ : Bank = 3 Row = 790, Col = 230, Data = aed72e5d
|
|
# READ STATUS: Burst-No: 1 Addr: 00316f95 Rxd: e471f8c8
|
|
# tb_core.u_sdram32 : at time 30993.0 ns READ : Bank = 3 Row = 790, Col = 231, Data = 1d3f9d3a
|
|
# READ STATUS: Burst-No: 2 Addr: 00316f97 Rxd: aed72e5d
|
|
# tb_core.u_sdram32 : at time 31003.0 ns READ : Bank = 3 Row = 790, Col = 232, Data = 4226a984
|
|
# READ STATUS: Burst-No: 3 Addr: 00316f99 Rxd: 1d3f9d3a
|
|
# tb_core.u_sdram32 : at time 31013.0 ns READ : Bank = 3 Row = 790, Col = 233, Data = 95a9a82b
|
|
# READ STATUS: Burst-No: 4 Addr: 00316f9b Rxd: 4226a984
|
|
# tb_core.u_sdram32 : at time 31023.0 ns READ : Bank = 3 Row = 790, Col = 234, Data = 1c8d7f39
|
|
# READ STATUS: Burst-No: 5 Addr: 00316f9d Rxd: 95a9a82b
|
|
# tb_core.u_sdram32 : at time 31033.0 ns READ : Bank = 3 Row = 790, Col = 235, Data = 897f1c12
|
|
# READ STATUS: Burst-No: 6 Addr: 00316f9f Rxd: 1c8d7f39
|
|
# tb_core.u_sdram32 : at time 31043.0 ns READ : Bank = 3 Row = 790, Col = 236, Data = a97f0052
|
|
# READ STATUS: Burst-No: 7 Addr: 00316fa1 Rxd: 897f1c12
|
|
# tb_core.u_sdram32 : at time 31053.0 ns READ : Bank = 3 Row = 790, Col = 237, Data = 2c848959
|
|
# READ STATUS: Burst-No: 8 Addr: 00316fa3 Rxd: a97f0052
|
|
# tb_core.u_sdram32 : at time 31063.0 ns READ : Bank = 3 Row = 790, Col = 238, Data = e82b96d0
|
|
# READ STATUS: Burst-No: 9 Addr: 00316fa5 Rxd: 2c848959
|
|
# tb_core.u_sdram32 : at time 31073.0 ns READ : Bank = 3 Row = 790, Col = 239, Data = b759ea6e
|
|
# READ STATUS: Burst-No: 10 Addr: 00316fa7 Rxd: e82b96d0
|
|
# tb_core.u_sdram32 : at time 31083.0 ns READ : Bank = 3 Row = 790, Col = 240, Data = 4bf52997
|
|
# READ STATUS: Burst-No: 11 Addr: 00316fa9 Rxd: b759ea6e
|
|
# tb_core.u_sdram32 : at time 31093.0 ns READ : Bank = 3 Row = 790, Col = 241, Data = 6d8b87db
|
|
# READ STATUS: Burst-No: 12 Addr: 00316fab Rxd: 4bf52997
|
|
# tb_core.u_sdram32 : at time 31103.0 ns READ : Bank = 3 Row = 790, Col = 242, Data = 535277a6
|
|
# READ STATUS: Burst-No: 13 Addr: 00316fad Rxd: 6d8b87db
|
|
# tb_core.u_sdram32 : at time 31113.0 ns READ : Bank = 3 Row = 790, Col = 243, Data = 5d85d3bb
|
|
# READ STATUS: Burst-No: 14 Addr: 00316faf Rxd: 535277a6
|
|
# tb_core.u_sdram32 : at time 31123.0 ns READ : Bank = 3 Row = 790, Col = 244, Data = 80797c00
|
|
# READ STATUS: Burst-No: 15 Addr: 00316fb1 Rxd: 5d85d3bb
|
|
# tb_core.u_sdram32 : at time 31133.0 ns READ : Bank = 3 Row = 790, Col = 245, Data = 87e44c0f
|
|
# READ STATUS: Burst-No: 16 Addr: 00316fb3 Rxd: 80797c00
|
|
# tb_core.u_sdram32 : at time 31143.0 ns READ : Bank = 3 Row = 790, Col = 246, Data = b4e8d669
|
|
# READ STATUS: Burst-No: 17 Addr: 00316fb5 Rxd: 87e44c0f
|
|
# tb_core.u_sdram32 : at time 31153.0 ns READ : Bank = 3 Row = 790, Col = 247, Data = 8653620c
|
|
# READ STATUS: Burst-No: 18 Addr: 00316fb7 Rxd: b4e8d669
|
|
# tb_core.u_sdram32 : at time 31163.0 ns READ : Bank = 3 Row = 790, Col = 248, Data = 2ca81959
|
|
# READ STATUS: Burst-No: 19 Addr: 00316fb9 Rxd: 8653620c
|
|
# tb_core.u_sdram32 : at time 31173.0 ns READ : Bank = 3 Row = 790, Col = 249, Data = 62fd49c5
|
|
# READ STATUS: Burst-No: 20 Addr: 00316fbb Rxd: 2ca81959
|
|
# tb_core.u_sdram32 : at time 31183.0 ns READ : Bank = 3 Row = 790, Col = 250, Data = 67d735cf
|
|
# READ STATUS: Burst-No: 21 Addr: 00316fbd Rxd: 62fd49c5
|
|
# tb_core.u_sdram32 : at time 31193.0 ns READ : Bank = 3 Row = 790, Col = 251, Data = 4839e590
|
|
# READ STATUS: Burst-No: 22 Addr: 00316fbf Rxd: 67d735cf
|
|
# tb_core.u_sdram32 : at time 31203.0 ns READ : Bank = 3 Row = 790, Col = 252, Data = a8e4d851
|
|
# READ STATUS: Burst-No: 23 Addr: 00316fc1 Rxd: 4839e590
|
|
# tb_core.u_sdram32 : at time 31213.0 ns READ : Bank = 3 Row = 790, Col = 253, Data = b4f9a469
|
|
# READ STATUS: Burst-No: 24 Addr: 00316fc3 Rxd: a8e4d851
|
|
# tb_core.u_sdram32 : at time 31223.0 ns READ : Bank = 3 Row = 790, Col = 254, Data = 3b83cd77
|
|
# READ STATUS: Burst-No: 25 Addr: 00316fc5 Rxd: b4f9a469
|
|
# tb_core.u_sdram32 : at time 31233.0 ns READ : Bank = 3 Row = 790, Col = 255, Data = 2523654a
|
|
# READ STATUS: Burst-No: 26 Addr: 00316fc7 Rxd: 3b83cd77
|
|
# tb_core.u_sdram32 : at time 31243.0 ns READ : Bank = 0 Row = 791, Col = 0, Data = ec3758d8
|
|
# READ STATUS: Burst-No: 27 Addr: 00316fc9 Rxd: 2523654a
|
|
# tb_core.u_sdram32 : at time 31253.0 ns READ : Bank = 0 Row = 791, Col = 1, Data = 4ddd4d9b
|
|
# READ STATUS: Burst-No: 28 Addr: 00316fcb Rxd: ec3758d8
|
|
# tb_core.u_sdram32 : at time 31263.0 ns READ : Bank = 0 Row = 791, Col = 2, Data = e20e9ac4
|
|
# READ STATUS: Burst-No: 29 Addr: 00316fcd Rxd: 4ddd4d9b
|
|
# tb_core.u_sdram32 : at time 31273.0 ns READ : Bank = 0 Row = 791, Col = 3, Data = 5c78b1b8
|
|
# READ STATUS: Burst-No: 30 Addr: 00316fcf Rxd: e20e9ac4
|
|
# tb_core.u_sdram32 : at time 31283.0 ns READ : Bank = 0 Row = 791, Col = 4, Data = dbe6f2b7
|
|
# READ STATUS: Burst-No: 31 Addr: 00316fd1 Rxd: 5c78b1b8
|
|
# tb_core.u_sdram32 : at time 31293.0 ns READ : Bank = 0 Row = 791, Col = 5, Data = c378ee86
|
|
# tb_core.u_sdram32 : at time 31297.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 32 Addr: 00316fd3 Rxd: dbe6f2b7
|
|
# tb_core.u_sdram32 : at time 31303.0 ns READ : Bank = 0 Row = 791, Col = 6, Data = 984d5a30
|
|
# READ STATUS: Burst-No: 33 Addr: 00316fd5 Rxd: c378ee86
|
|
# tb_core.u_sdram32 : at time 31313.0 ns READ : Bank = 0 Row = 791, Col = 7, Data = 3bed5377
|
|
# READ STATUS: Burst-No: 34 Addr: 00316fd7 Rxd: 984d5a30
|
|
# READ STATUS: Burst-No: 35 Addr: 00316fd9 Rxd: 3bed5377
|
|
# tb_core.u_sdram32 : at time 31483.0 ns READ : Bank = 1 Row = 364, Col = 237, Data = 03878707
|
|
# tb_core.u_sdram32 : at time 31493.0 ns READ : Bank = 1 Row = 364, Col = 238, Data = 3b0b9776
|
|
# READ STATUS: Burst-No: 0 Addr: 0016c7b5 Rxd: 03878707
|
|
# tb_core.u_sdram32 : at time 31503.0 ns READ : Bank = 1 Row = 364, Col = 239, Data = 74a1ade9
|
|
# READ STATUS: Burst-No: 1 Addr: 0016c7b7 Rxd: 3b0b9776
|
|
# tb_core.u_sdram32 : at time 31513.0 ns READ : Bank = 1 Row = 364, Col = 240, Data = 45e28b8b
|
|
# READ STATUS: Burst-No: 2 Addr: 0016c7b9 Rxd: 74a1ade9
|
|
# tb_core.u_sdram32 : at time 31523.0 ns READ : Bank = 1 Row = 364, Col = 241, Data = 00f25f01
|
|
# READ STATUS: Burst-No: 3 Addr: 0016c7bb Rxd: 45e28b8b
|
|
# tb_core.u_sdram32 : at time 31533.0 ns READ : Bank = 1 Row = 364, Col = 242, Data = 6d808bdb
|
|
# READ STATUS: Burst-No: 4 Addr: 0016c7bd Rxd: 00f25f01
|
|
# tb_core.u_sdram32 : at time 31543.0 ns READ : Bank = 1 Row = 364, Col = 243, Data = c0764280
|
|
# READ STATUS: Burst-No: 5 Addr: 0016c7bf Rxd: 6d808bdb
|
|
# tb_core.u_sdram32 : at time 31553.0 ns READ : Bank = 1 Row = 364, Col = 244, Data = 611d9fc2
|
|
# READ STATUS: Burst-No: 6 Addr: 0016c7c1 Rxd: c0764280
|
|
# tb_core.u_sdram32 : at time 31563.0 ns READ : Bank = 1 Row = 364, Col = 245, Data = e2ecdac5
|
|
# READ STATUS: Burst-No: 7 Addr: 0016c7c3 Rxd: 611d9fc2
|
|
# tb_core.u_sdram32 : at time 31573.0 ns READ : Bank = 1 Row = 364, Col = 246, Data = 9827fa30
|
|
# READ STATUS: Burst-No: 8 Addr: 0016c7c5 Rxd: e2ecdac5
|
|
# tb_core.u_sdram32 : at time 31583.0 ns READ : Bank = 1 Row = 364, Col = 247, Data = d7b2e4af
|
|
# READ STATUS: Burst-No: 9 Addr: 0016c7c7 Rxd: 9827fa30
|
|
# tb_core.u_sdram32 : at time 31593.0 ns READ : Bank = 1 Row = 364, Col = 248, Data = b302da66
|
|
# READ STATUS: Burst-No: 10 Addr: 0016c7c9 Rxd: d7b2e4af
|
|
# tb_core.u_sdram32 : at time 31603.0 ns READ : Bank = 1 Row = 364, Col = 249, Data = 57fbb9af
|
|
# READ STATUS: Burst-No: 11 Addr: 0016c7cb Rxd: b302da66
|
|
# tb_core.u_sdram32 : at time 31613.0 ns READ : Bank = 1 Row = 364, Col = 250, Data = f4d86ee9
|
|
# READ STATUS: Burst-No: 12 Addr: 0016c7cd Rxd: 57fbb9af
|
|
# tb_core.u_sdram32 : at time 31623.0 ns READ : Bank = 1 Row = 364, Col = 251, Data = 7c41aff8
|
|
# READ STATUS: Burst-No: 13 Addr: 0016c7cf Rxd: f4d86ee9
|
|
# tb_core.u_sdram32 : at time 31633.0 ns READ : Bank = 1 Row = 364, Col = 252, Data = 8376ac06
|
|
# READ STATUS: Burst-No: 14 Addr: 0016c7d1 Rxd: 7c41aff8
|
|
# tb_core.u_sdram32 : at time 31643.0 ns READ : Bank = 1 Row = 364, Col = 253, Data = f78576ef
|
|
# READ STATUS: Burst-No: 15 Addr: 0016c7d3 Rxd: 8376ac06
|
|
# tb_core.u_sdram32 : at time 31653.0 ns READ : Bank = 1 Row = 364, Col = 254, Data = 70ef37e1
|
|
# READ STATUS: Burst-No: 16 Addr: 0016c7d5 Rxd: f78576ef
|
|
# tb_core.u_sdram32 : at time 31663.0 ns READ : Bank = 1 Row = 364, Col = 255, Data = cab47c95
|
|
# tb_core.u_sdram32 : at time 31667.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 17 Addr: 0016c7d7 Rxd: 70ef37e1
|
|
# tb_core.u_sdram32 : at time 31673.0 ns READ : Bank = 2 Row = 364, Col = 0, Data = f7723eee
|
|
# READ STATUS: Burst-No: 18 Addr: 0016c7d9 Rxd: cab47c95
|
|
# tb_core.u_sdram32 : at time 31683.0 ns READ : Bank = 2 Row = 364, Col = 1, Data = 304e4d60
|
|
# READ STATUS: Burst-No: 19 Addr: 0016c7db Rxd: f7723eee
|
|
# READ STATUS: Burst-No: 20 Addr: 0016c7dd Rxd: 304e4d60
|
|
# Write Address: 001c5ee5, Burst Size: 41
|
|
# tb_core.u_sdram32 : at time 31857.0 ns ACT : Bank = 3 Row = 453
|
|
# tb_core.u_sdram32 : at time 31887.0 ns WRITE: Bank = 3 Row = 453, Col = 185, Data = 322f7d64
|
|
# Status: Burst-No: 0 Write Address: 001c5ee5 WriteData: 322f7d64
|
|
# tb_core.u_sdram32 : at time 31897.0 ns WRITE: Bank = 3 Row = 453, Col = 186, Data = 14b43729
|
|
# Status: Burst-No: 1 Write Address: 001c5ee5 WriteData: 14b43729
|
|
# tb_core.u_sdram32 : at time 31907.0 ns WRITE: Bank = 3 Row = 453, Col = 187, Data = f0eeaee1
|
|
# Status: Burst-No: 2 Write Address: 001c5ee5 WriteData: f0eeaee1
|
|
# tb_core.u_sdram32 : at time 31917.0 ns WRITE: Bank = 3 Row = 453, Col = 188, Data = bbbc5277
|
|
# Status: Burst-No: 3 Write Address: 001c5ee5 WriteData: bbbc5277
|
|
# tb_core.u_sdram32 : at time 31927.0 ns WRITE: Bank = 3 Row = 453, Col = 189, Data = 3715156e
|
|
# Status: Burst-No: 4 Write Address: 001c5ee5 WriteData: 3715156e
|
|
# tb_core.u_sdram32 : at time 31937.0 ns WRITE: Bank = 3 Row = 453, Col = 190, Data = 40aaf581
|
|
# Status: Burst-No: 5 Write Address: 001c5ee5 WriteData: 40aaf581
|
|
# tb_core.u_sdram32 : at time 31947.0 ns WRITE: Bank = 3 Row = 453, Col = 191, Data = 6a9fb9d5
|
|
# Status: Burst-No: 6 Write Address: 001c5ee5 WriteData: 6a9fb9d5
|
|
# tb_core.u_sdram32 : at time 31957.0 ns WRITE: Bank = 3 Row = 453, Col = 192, Data = 3437d568
|
|
# Status: Burst-No: 7 Write Address: 001c5ee5 WriteData: 3437d568
|
|
# tb_core.u_sdram32 : at time 31967.0 ns WRITE: Bank = 3 Row = 453, Col = 193, Data = 786271f0
|
|
# Status: Burst-No: 8 Write Address: 001c5ee5 WriteData: 786271f0
|
|
# tb_core.u_sdram32 : at time 31977.0 ns WRITE: Bank = 3 Row = 453, Col = 194, Data = d57800aa
|
|
# Status: Burst-No: 9 Write Address: 001c5ee5 WriteData: d57800aa
|
|
# tb_core.u_sdram32 : at time 31987.0 ns WRITE: Bank = 3 Row = 453, Col = 195, Data = 079fc30f
|
|
# Status: Burst-No: 10 Write Address: 001c5ee5 WriteData: 079fc30f
|
|
# tb_core.u_sdram32 : at time 31997.0 ns WRITE: Bank = 3 Row = 453, Col = 196, Data = f8dc48f1
|
|
# Status: Burst-No: 11 Write Address: 001c5ee5 WriteData: f8dc48f1
|
|
# tb_core.u_sdram32 : at time 32007.0 ns WRITE: Bank = 3 Row = 453, Col = 197, Data = be9bbc7d
|
|
# Status: Burst-No: 12 Write Address: 001c5ee5 WriteData: be9bbc7d
|
|
# tb_core.u_sdram32 : at time 32017.0 ns WRITE: Bank = 3 Row = 453, Col = 198, Data = 472e958e
|
|
# Status: Burst-No: 13 Write Address: 001c5ee5 WriteData: 472e958e
|
|
# tb_core.u_sdram32 : at time 32027.0 ns WRITE: Bank = 3 Row = 453, Col = 199, Data = f161dce2
|
|
# Status: Burst-No: 14 Write Address: 001c5ee5 WriteData: f161dce2
|
|
# tb_core.u_sdram32 : at time 32037.0 ns WRITE: Bank = 3 Row = 453, Col = 200, Data = 1e664d3c
|
|
# Status: Burst-No: 15 Write Address: 001c5ee5 WriteData: 1e664d3c
|
|
# tb_core.u_sdram32 : at time 32047.0 ns WRITE: Bank = 3 Row = 453, Col = 201, Data = d4b5e6a9
|
|
# Status: Burst-No: 16 Write Address: 001c5ee5 WriteData: d4b5e6a9
|
|
# tb_core.u_sdram32 : at time 32057.0 ns WRITE: Bank = 3 Row = 453, Col = 202, Data = 77ebb1ef
|
|
# Status: Burst-No: 17 Write Address: 001c5ee5 WriteData: 77ebb1ef
|
|
# tb_core.u_sdram32 : at time 32067.0 ns WRITE: Bank = 3 Row = 453, Col = 203, Data = ade7d05b
|
|
# Status: Burst-No: 18 Write Address: 001c5ee5 WriteData: ade7d05b
|
|
# tb_core.u_sdram32 : at time 32077.0 ns WRITE: Bank = 3 Row = 453, Col = 204, Data = d7a23caf
|
|
# Status: Burst-No: 19 Write Address: 001c5ee5 WriteData: d7a23caf
|
|
# tb_core.u_sdram32 : at time 32087.0 ns WRITE: Bank = 3 Row = 453, Col = 205, Data = 25029b4a
|
|
# Status: Burst-No: 20 Write Address: 001c5ee5 WriteData: 25029b4a
|
|
# tb_core.u_sdram32 : at time 32097.0 ns WRITE: Bank = 3 Row = 453, Col = 206, Data = 5cd20db9
|
|
# Status: Burst-No: 21 Write Address: 001c5ee5 WriteData: 5cd20db9
|
|
# tb_core.u_sdram32 : at time 32107.0 ns WRITE: Bank = 3 Row = 453, Col = 207, Data = 098e2d13
|
|
# Status: Burst-No: 22 Write Address: 001c5ee5 WriteData: 098e2d13
|
|
# tb_core.u_sdram32 : at time 32117.0 ns WRITE: Bank = 3 Row = 453, Col = 208, Data = 09c83513
|
|
# Status: Burst-No: 23 Write Address: 001c5ee5 WriteData: 09c83513
|
|
# tb_core.u_sdram32 : at time 32127.0 ns WRITE: Bank = 3 Row = 453, Col = 209, Data = 32dc4165
|
|
# Status: Burst-No: 24 Write Address: 001c5ee5 WriteData: 32dc4165
|
|
# tb_core.u_sdram32 : at time 32137.0 ns WRITE: Bank = 3 Row = 453, Col = 210, Data = 28c62751
|
|
# Status: Burst-No: 25 Write Address: 001c5ee5 WriteData: 28c62751
|
|
# tb_core.u_sdram32 : at time 32147.0 ns WRITE: Bank = 3 Row = 453, Col = 211, Data = db983ab7
|
|
# Status: Burst-No: 26 Write Address: 001c5ee5 WriteData: db983ab7
|
|
# tb_core.u_sdram32 : at time 32157.0 ns WRITE: Bank = 3 Row = 453, Col = 212, Data = cc981099
|
|
# Status: Burst-No: 27 Write Address: 001c5ee5 WriteData: cc981099
|
|
# tb_core.u_sdram32 : at time 32167.0 ns WRITE: Bank = 3 Row = 453, Col = 213, Data = 9d12083a
|
|
# Status: Burst-No: 28 Write Address: 001c5ee5 WriteData: 9d12083a
|
|
# tb_core.u_sdram32 : at time 32177.0 ns WRITE: Bank = 3 Row = 453, Col = 214, Data = b8ea3a71
|
|
# Status: Burst-No: 29 Write Address: 001c5ee5 WriteData: b8ea3a71
|
|
# tb_core.u_sdram32 : at time 32187.0 ns WRITE: Bank = 3 Row = 453, Col = 215, Data = 317c0762
|
|
# Status: Burst-No: 30 Write Address: 001c5ee5 WriteData: 317c0762
|
|
# tb_core.u_sdram32 : at time 32197.0 ns WRITE: Bank = 3 Row = 453, Col = 216, Data = f2356ae4
|
|
# Status: Burst-No: 31 Write Address: 001c5ee5 WriteData: f2356ae4
|
|
# tb_core.u_sdram32 : at time 32207.0 ns WRITE: Bank = 3 Row = 453, Col = 217, Data = 1513dd2a
|
|
# Status: Burst-No: 32 Write Address: 001c5ee5 WriteData: 1513dd2a
|
|
# tb_core.u_sdram32 : at time 32217.0 ns WRITE: Bank = 3 Row = 453, Col = 218, Data = beda447d
|
|
# Status: Burst-No: 33 Write Address: 001c5ee5 WriteData: beda447d
|
|
# tb_core.u_sdram32 : at time 32227.0 ns WRITE: Bank = 3 Row = 453, Col = 219, Data = 2cee5f59
|
|
# Status: Burst-No: 34 Write Address: 001c5ee5 WriteData: 2cee5f59
|
|
# tb_core.u_sdram32 : at time 32237.0 ns WRITE: Bank = 3 Row = 453, Col = 220, Data = 72c3a3e5
|
|
# Status: Burst-No: 35 Write Address: 001c5ee5 WriteData: 72c3a3e5
|
|
# tb_core.u_sdram32 : at time 32247.0 ns WRITE: Bank = 3 Row = 453, Col = 221, Data = 76de6bed
|
|
# Status: Burst-No: 36 Write Address: 001c5ee5 WriteData: 76de6bed
|
|
# tb_core.u_sdram32 : at time 32257.0 ns WRITE: Bank = 3 Row = 453, Col = 222, Data = e4a800c9
|
|
# Status: Burst-No: 37 Write Address: 001c5ee5 WriteData: e4a800c9
|
|
# tb_core.u_sdram32 : at time 32267.0 ns WRITE: Bank = 3 Row = 453, Col = 223, Data = a0aecc41
|
|
# Status: Burst-No: 38 Write Address: 001c5ee5 WriteData: a0aecc41
|
|
# tb_core.u_sdram32 : at time 32277.0 ns WRITE: Bank = 3 Row = 453, Col = 224, Data = 57c1d1af
|
|
# Status: Burst-No: 39 Write Address: 001c5ee5 WriteData: 57c1d1af
|
|
# tb_core.u_sdram32 : at time 32287.0 ns WRITE: Bank = 3 Row = 453, Col = 225, Data = eda71cdb
|
|
# Status: Burst-No: 40 Write Address: 001c5ee5 WriteData: eda71cdb
|
|
# tb_core.u_sdram32 : at time 32297.0 ns BST : Burst Terminate
|
|
# Write Address: 0016e8cd, Burst Size: 49
|
|
# tb_core.u_sdram32 : at time 32437.0 ns ACT : Bank = 2 Row = 366
|
|
# tb_core.u_sdram32 : at time 32467.0 ns WRITE: Bank = 2 Row = 366, Col = 51, Data = 8326d406
|
|
# Status: Burst-No: 0 Write Address: 0016e8cd WriteData: 8326d406
|
|
# tb_core.u_sdram32 : at time 32477.0 ns WRITE: Bank = 2 Row = 366, Col = 52, Data = d14820a2
|
|
# Status: Burst-No: 1 Write Address: 0016e8cd WriteData: d14820a2
|
|
# tb_core.u_sdram32 : at time 32487.0 ns WRITE: Bank = 2 Row = 366, Col = 53, Data = 5e983dbd
|
|
# Status: Burst-No: 2 Write Address: 0016e8cd WriteData: 5e983dbd
|
|
# tb_core.u_sdram32 : at time 32497.0 ns WRITE: Bank = 2 Row = 366, Col = 54, Data = b555de6a
|
|
# Status: Burst-No: 3 Write Address: 0016e8cd WriteData: b555de6a
|
|
# tb_core.u_sdram32 : at time 32507.0 ns WRITE: Bank = 2 Row = 366, Col = 55, Data = 6e3d47dc
|
|
# Status: Burst-No: 4 Write Address: 0016e8cd WriteData: 6e3d47dc
|
|
# tb_core.u_sdram32 : at time 32517.0 ns WRITE: Bank = 2 Row = 366, Col = 56, Data = a86c5e50
|
|
# Status: Burst-No: 5 Write Address: 0016e8cd WriteData: a86c5e50
|
|
# tb_core.u_sdram32 : at time 32527.0 ns WRITE: Bank = 2 Row = 366, Col = 57, Data = bd86f47b
|
|
# Status: Burst-No: 6 Write Address: 0016e8cd WriteData: bd86f47b
|
|
# tb_core.u_sdram32 : at time 32537.0 ns WRITE: Bank = 2 Row = 366, Col = 58, Data = 929d5825
|
|
# Status: Burst-No: 7 Write Address: 0016e8cd WriteData: 929d5825
|
|
# tb_core.u_sdram32 : at time 32547.0 ns WRITE: Bank = 2 Row = 366, Col = 59, Data = bc3f8478
|
|
# Status: Burst-No: 8 Write Address: 0016e8cd WriteData: bc3f8478
|
|
# tb_core.u_sdram32 : at time 32557.0 ns WRITE: Bank = 2 Row = 366, Col = 60, Data = 7b7b89f6
|
|
# Status: Burst-No: 9 Write Address: 0016e8cd WriteData: 7b7b89f6
|
|
# tb_core.u_sdram32 : at time 32567.0 ns WRITE: Bank = 2 Row = 366, Col = 61, Data = ae23ce5c
|
|
# Status: Burst-No: 10 Write Address: 0016e8cd WriteData: ae23ce5c
|
|
# tb_core.u_sdram32 : at time 32577.0 ns WRITE: Bank = 2 Row = 366, Col = 62, Data = 11cc9b23
|
|
# Status: Burst-No: 11 Write Address: 0016e8cd WriteData: 11cc9b23
|
|
# tb_core.u_sdram32 : at time 32587.0 ns WRITE: Bank = 2 Row = 366, Col = 63, Data = 3cb3ab79
|
|
# Status: Burst-No: 12 Write Address: 0016e8cd WriteData: 3cb3ab79
|
|
# tb_core.u_sdram32 : at time 32597.0 ns WRITE: Bank = 2 Row = 366, Col = 64, Data = 644605c8
|
|
# Status: Burst-No: 13 Write Address: 0016e8cd WriteData: 644605c8
|
|
# tb_core.u_sdram32 : at time 32607.0 ns WRITE: Bank = 2 Row = 366, Col = 65, Data = ddd146bb
|
|
# Status: Burst-No: 14 Write Address: 0016e8cd WriteData: ddd146bb
|
|
# tb_core.u_sdram32 : at time 32617.0 ns WRITE: Bank = 2 Row = 366, Col = 66, Data = 870cee0e
|
|
# Status: Burst-No: 15 Write Address: 0016e8cd WriteData: 870cee0e
|
|
# tb_core.u_sdram32 : at time 32627.0 ns WRITE: Bank = 2 Row = 366, Col = 67, Data = b9879473
|
|
# Status: Burst-No: 16 Write Address: 0016e8cd WriteData: b9879473
|
|
# tb_core.u_sdram32 : at time 32637.0 ns WRITE: Bank = 2 Row = 366, Col = 68, Data = 0671030c
|
|
# Status: Burst-No: 17 Write Address: 0016e8cd WriteData: 0671030c
|
|
# tb_core.u_sdram32 : at time 32647.0 ns WRITE: Bank = 2 Row = 366, Col = 69, Data = e70f98ce
|
|
# Status: Burst-No: 18 Write Address: 0016e8cd WriteData: e70f98ce
|
|
# tb_core.u_sdram32 : at time 32657.0 ns WRITE: Bank = 2 Row = 366, Col = 70, Data = 6a1a61d4
|
|
# Status: Burst-No: 19 Write Address: 0016e8cd WriteData: 6a1a61d4
|
|
# tb_core.u_sdram32 : at time 32667.0 ns WRITE: Bank = 2 Row = 366, Col = 71, Data = acecdc59
|
|
# Status: Burst-No: 20 Write Address: 0016e8cd WriteData: acecdc59
|
|
# tb_core.u_sdram32 : at time 32677.0 ns WRITE: Bank = 2 Row = 366, Col = 72, Data = 5ca26fb9
|
|
# Status: Burst-No: 21 Write Address: 0016e8cd WriteData: 5ca26fb9
|
|
# tb_core.u_sdram32 : at time 32687.0 ns WRITE: Bank = 2 Row = 366, Col = 73, Data = d9b8c0b3
|
|
# Status: Burst-No: 22 Write Address: 0016e8cd WriteData: d9b8c0b3
|
|
# tb_core.u_sdram32 : at time 32697.0 ns WRITE: Bank = 2 Row = 366, Col = 74, Data = 7a4fbff4
|
|
# Status: Burst-No: 23 Write Address: 0016e8cd WriteData: 7a4fbff4
|
|
# tb_core.u_sdram32 : at time 32707.0 ns WRITE: Bank = 2 Row = 366, Col = 75, Data = baf4e275
|
|
# Status: Burst-No: 24 Write Address: 0016e8cd WriteData: baf4e275
|
|
# tb_core.u_sdram32 : at time 32717.0 ns WRITE: Bank = 2 Row = 366, Col = 76, Data = 066cf10c
|
|
# Status: Burst-No: 25 Write Address: 0016e8cd WriteData: 066cf10c
|
|
# tb_core.u_sdram32 : at time 32727.0 ns WRITE: Bank = 2 Row = 366, Col = 77, Data = 9cfc7a39
|
|
# Status: Burst-No: 26 Write Address: 0016e8cd WriteData: 9cfc7a39
|
|
# tb_core.u_sdram32 : at time 32737.0 ns WRITE: Bank = 2 Row = 366, Col = 78, Data = 01729302
|
|
# Status: Burst-No: 27 Write Address: 0016e8cd WriteData: 01729302
|
|
# tb_core.u_sdram32 : at time 32747.0 ns WRITE: Bank = 2 Row = 366, Col = 79, Data = 8aecbe15
|
|
# Status: Burst-No: 28 Write Address: 0016e8cd WriteData: 8aecbe15
|
|
# tb_core.u_sdram32 : at time 32757.0 ns WRITE: Bank = 2 Row = 366, Col = 80, Data = 02fbf905
|
|
# Status: Burst-No: 29 Write Address: 0016e8cd WriteData: 02fbf905
|
|
# tb_core.u_sdram32 : at time 32767.0 ns WRITE: Bank = 2 Row = 366, Col = 81, Data = 271c434e
|
|
# Status: Burst-No: 30 Write Address: 0016e8cd WriteData: 271c434e
|
|
# tb_core.u_sdram32 : at time 32777.0 ns WRITE: Bank = 2 Row = 366, Col = 82, Data = 013f2902
|
|
# Status: Burst-No: 31 Write Address: 0016e8cd WriteData: 013f2902
|
|
# tb_core.u_sdram32 : at time 32787.0 ns WRITE: Bank = 2 Row = 366, Col = 83, Data = 5c7951b8
|
|
# Status: Burst-No: 32 Write Address: 0016e8cd WriteData: 5c7951b8
|
|
# tb_core.u_sdram32 : at time 32797.0 ns WRITE: Bank = 2 Row = 366, Col = 84, Data = 847fb208
|
|
# Status: Burst-No: 33 Write Address: 0016e8cd WriteData: 847fb208
|
|
# tb_core.u_sdram32 : at time 32807.0 ns WRITE: Bank = 2 Row = 366, Col = 85, Data = 46e7538d
|
|
# Status: Burst-No: 34 Write Address: 0016e8cd WriteData: 46e7538d
|
|
# tb_core.u_sdram32 : at time 32817.0 ns WRITE: Bank = 2 Row = 366, Col = 86, Data = d7b48eaf
|
|
# Status: Burst-No: 35 Write Address: 0016e8cd WriteData: d7b48eaf
|
|
# tb_core.u_sdram32 : at time 32827.0 ns WRITE: Bank = 2 Row = 366, Col = 87, Data = 747331e8
|
|
# Status: Burst-No: 36 Write Address: 0016e8cd WriteData: 747331e8
|
|
# tb_core.u_sdram32 : at time 32837.0 ns WRITE: Bank = 2 Row = 366, Col = 88, Data = 48590990
|
|
# Status: Burst-No: 37 Write Address: 0016e8cd WriteData: 48590990
|
|
# tb_core.u_sdram32 : at time 32847.0 ns WRITE: Bank = 2 Row = 366, Col = 89, Data = 7af6abf5
|
|
# Status: Burst-No: 38 Write Address: 0016e8cd WriteData: 7af6abf5
|
|
# tb_core.u_sdram32 : at time 32857.0 ns WRITE: Bank = 2 Row = 366, Col = 90, Data = a620904c
|
|
# Status: Burst-No: 39 Write Address: 0016e8cd WriteData: a620904c
|
|
# tb_core.u_sdram32 : at time 32867.0 ns WRITE: Bank = 2 Row = 366, Col = 91, Data = 3d82bd7b
|
|
# Status: Burst-No: 40 Write Address: 0016e8cd WriteData: 3d82bd7b
|
|
# tb_core.u_sdram32 : at time 32877.0 ns WRITE: Bank = 2 Row = 366, Col = 92, Data = a005a640
|
|
# Status: Burst-No: 41 Write Address: 0016e8cd WriteData: a005a640
|
|
# tb_core.u_sdram32 : at time 32887.0 ns WRITE: Bank = 2 Row = 366, Col = 93, Data = 12a90325
|
|
# Status: Burst-No: 42 Write Address: 0016e8cd WriteData: 12a90325
|
|
# tb_core.u_sdram32 : at time 32897.0 ns WRITE: Bank = 2 Row = 366, Col = 94, Data = 86ebb60d
|
|
# Status: Burst-No: 43 Write Address: 0016e8cd WriteData: 86ebb60d
|
|
# tb_core.u_sdram32 : at time 32907.0 ns WRITE: Bank = 2 Row = 366, Col = 95, Data = b87c1070
|
|
# Status: Burst-No: 44 Write Address: 0016e8cd WriteData: b87c1070
|
|
# tb_core.u_sdram32 : at time 32917.0 ns WRITE: Bank = 2 Row = 366, Col = 96, Data = 16cbf92d
|
|
# Status: Burst-No: 45 Write Address: 0016e8cd WriteData: 16cbf92d
|
|
# tb_core.u_sdram32 : at time 32927.0 ns WRITE: Bank = 2 Row = 366, Col = 97, Data = 94ded829
|
|
# Status: Burst-No: 46 Write Address: 0016e8cd WriteData: 94ded829
|
|
# tb_core.u_sdram32 : at time 32937.0 ns WRITE: Bank = 2 Row = 366, Col = 98, Data = 5e2551bc
|
|
# Status: Burst-No: 47 Write Address: 0016e8cd WriteData: 5e2551bc
|
|
# tb_core.u_sdram32 : at time 32947.0 ns WRITE: Bank = 2 Row = 366, Col = 99, Data = 987b0830
|
|
# Status: Burst-No: 48 Write Address: 0016e8cd WriteData: 987b0830
|
|
# tb_core.u_sdram32 : at time 32957.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 33093.0 ns READ : Bank = 3 Row = 453, Col = 185, Data = 322f7d64
|
|
# tb_core.u_sdram32 : at time 33103.0 ns READ : Bank = 3 Row = 453, Col = 186, Data = 14b43729
|
|
# READ STATUS: Burst-No: 0 Addr: 001c5ee5 Rxd: 322f7d64
|
|
# tb_core.u_sdram32 : at time 33113.0 ns READ : Bank = 3 Row = 453, Col = 187, Data = f0eeaee1
|
|
# READ STATUS: Burst-No: 1 Addr: 001c5ee7 Rxd: 14b43729
|
|
# tb_core.u_sdram32 : at time 33123.0 ns READ : Bank = 3 Row = 453, Col = 188, Data = bbbc5277
|
|
# READ STATUS: Burst-No: 2 Addr: 001c5ee9 Rxd: f0eeaee1
|
|
# tb_core.u_sdram32 : at time 33133.0 ns READ : Bank = 3 Row = 453, Col = 189, Data = 3715156e
|
|
# READ STATUS: Burst-No: 3 Addr: 001c5eeb Rxd: bbbc5277
|
|
# tb_core.u_sdram32 : at time 33143.0 ns READ : Bank = 3 Row = 453, Col = 190, Data = 40aaf581
|
|
# READ STATUS: Burst-No: 4 Addr: 001c5eed Rxd: 3715156e
|
|
# tb_core.u_sdram32 : at time 33153.0 ns READ : Bank = 3 Row = 453, Col = 191, Data = 6a9fb9d5
|
|
# READ STATUS: Burst-No: 5 Addr: 001c5eef Rxd: 40aaf581
|
|
# tb_core.u_sdram32 : at time 33163.0 ns READ : Bank = 3 Row = 453, Col = 192, Data = 3437d568
|
|
# READ STATUS: Burst-No: 6 Addr: 001c5ef1 Rxd: 6a9fb9d5
|
|
# tb_core.u_sdram32 : at time 33173.0 ns READ : Bank = 3 Row = 453, Col = 193, Data = 786271f0
|
|
# READ STATUS: Burst-No: 7 Addr: 001c5ef3 Rxd: 3437d568
|
|
# tb_core.u_sdram32 : at time 33183.0 ns READ : Bank = 3 Row = 453, Col = 194, Data = d57800aa
|
|
# READ STATUS: Burst-No: 8 Addr: 001c5ef5 Rxd: 786271f0
|
|
# tb_core.u_sdram32 : at time 33193.0 ns READ : Bank = 3 Row = 453, Col = 195, Data = 079fc30f
|
|
# READ STATUS: Burst-No: 9 Addr: 001c5ef7 Rxd: d57800aa
|
|
# tb_core.u_sdram32 : at time 33203.0 ns READ : Bank = 3 Row = 453, Col = 196, Data = f8dc48f1
|
|
# READ STATUS: Burst-No: 10 Addr: 001c5ef9 Rxd: 079fc30f
|
|
# tb_core.u_sdram32 : at time 33213.0 ns READ : Bank = 3 Row = 453, Col = 197, Data = be9bbc7d
|
|
# READ STATUS: Burst-No: 11 Addr: 001c5efb Rxd: f8dc48f1
|
|
# tb_core.u_sdram32 : at time 33223.0 ns READ : Bank = 3 Row = 453, Col = 198, Data = 472e958e
|
|
# READ STATUS: Burst-No: 12 Addr: 001c5efd Rxd: be9bbc7d
|
|
# tb_core.u_sdram32 : at time 33233.0 ns READ : Bank = 3 Row = 453, Col = 199, Data = f161dce2
|
|
# READ STATUS: Burst-No: 13 Addr: 001c5eff Rxd: 472e958e
|
|
# tb_core.u_sdram32 : at time 33243.0 ns READ : Bank = 3 Row = 453, Col = 200, Data = 1e664d3c
|
|
# READ STATUS: Burst-No: 14 Addr: 001c5f01 Rxd: f161dce2
|
|
# tb_core.u_sdram32 : at time 33253.0 ns READ : Bank = 3 Row = 453, Col = 201, Data = d4b5e6a9
|
|
# READ STATUS: Burst-No: 15 Addr: 001c5f03 Rxd: 1e664d3c
|
|
# tb_core.u_sdram32 : at time 33263.0 ns READ : Bank = 3 Row = 453, Col = 202, Data = 77ebb1ef
|
|
# READ STATUS: Burst-No: 16 Addr: 001c5f05 Rxd: d4b5e6a9
|
|
# tb_core.u_sdram32 : at time 33273.0 ns READ : Bank = 3 Row = 453, Col = 203, Data = ade7d05b
|
|
# READ STATUS: Burst-No: 17 Addr: 001c5f07 Rxd: 77ebb1ef
|
|
# tb_core.u_sdram32 : at time 33283.0 ns READ : Bank = 3 Row = 453, Col = 204, Data = d7a23caf
|
|
# READ STATUS: Burst-No: 18 Addr: 001c5f09 Rxd: ade7d05b
|
|
# tb_core.u_sdram32 : at time 33293.0 ns READ : Bank = 3 Row = 453, Col = 205, Data = 25029b4a
|
|
# READ STATUS: Burst-No: 19 Addr: 001c5f0b Rxd: d7a23caf
|
|
# tb_core.u_sdram32 : at time 33303.0 ns READ : Bank = 3 Row = 453, Col = 206, Data = 5cd20db9
|
|
# READ STATUS: Burst-No: 20 Addr: 001c5f0d Rxd: 25029b4a
|
|
# tb_core.u_sdram32 : at time 33313.0 ns READ : Bank = 3 Row = 453, Col = 207, Data = 098e2d13
|
|
# READ STATUS: Burst-No: 21 Addr: 001c5f0f Rxd: 5cd20db9
|
|
# tb_core.u_sdram32 : at time 33323.0 ns READ : Bank = 3 Row = 453, Col = 208, Data = 09c83513
|
|
# READ STATUS: Burst-No: 22 Addr: 001c5f11 Rxd: 098e2d13
|
|
# tb_core.u_sdram32 : at time 33333.0 ns READ : Bank = 3 Row = 453, Col = 209, Data = 32dc4165
|
|
# READ STATUS: Burst-No: 23 Addr: 001c5f13 Rxd: 09c83513
|
|
# tb_core.u_sdram32 : at time 33343.0 ns READ : Bank = 3 Row = 453, Col = 210, Data = 28c62751
|
|
# READ STATUS: Burst-No: 24 Addr: 001c5f15 Rxd: 32dc4165
|
|
# tb_core.u_sdram32 : at time 33353.0 ns READ : Bank = 3 Row = 453, Col = 211, Data = db983ab7
|
|
# READ STATUS: Burst-No: 25 Addr: 001c5f17 Rxd: 28c62751
|
|
# tb_core.u_sdram32 : at time 33363.0 ns READ : Bank = 3 Row = 453, Col = 212, Data = cc981099
|
|
# READ STATUS: Burst-No: 26 Addr: 001c5f19 Rxd: db983ab7
|
|
# tb_core.u_sdram32 : at time 33373.0 ns READ : Bank = 3 Row = 453, Col = 213, Data = 9d12083a
|
|
# READ STATUS: Burst-No: 27 Addr: 001c5f1b Rxd: cc981099
|
|
# tb_core.u_sdram32 : at time 33383.0 ns READ : Bank = 3 Row = 453, Col = 214, Data = b8ea3a71
|
|
# READ STATUS: Burst-No: 28 Addr: 001c5f1d Rxd: 9d12083a
|
|
# tb_core.u_sdram32 : at time 33393.0 ns READ : Bank = 3 Row = 453, Col = 215, Data = 317c0762
|
|
# READ STATUS: Burst-No: 29 Addr: 001c5f1f Rxd: b8ea3a71
|
|
# tb_core.u_sdram32 : at time 33403.0 ns READ : Bank = 3 Row = 453, Col = 216, Data = f2356ae4
|
|
# READ STATUS: Burst-No: 30 Addr: 001c5f21 Rxd: 317c0762
|
|
# tb_core.u_sdram32 : at time 33413.0 ns READ : Bank = 3 Row = 453, Col = 217, Data = 1513dd2a
|
|
# READ STATUS: Burst-No: 31 Addr: 001c5f23 Rxd: f2356ae4
|
|
# tb_core.u_sdram32 : at time 33423.0 ns READ : Bank = 3 Row = 453, Col = 218, Data = beda447d
|
|
# READ STATUS: Burst-No: 32 Addr: 001c5f25 Rxd: 1513dd2a
|
|
# tb_core.u_sdram32 : at time 33433.0 ns READ : Bank = 3 Row = 453, Col = 219, Data = 2cee5f59
|
|
# READ STATUS: Burst-No: 33 Addr: 001c5f27 Rxd: beda447d
|
|
# tb_core.u_sdram32 : at time 33443.0 ns READ : Bank = 3 Row = 453, Col = 220, Data = 72c3a3e5
|
|
# READ STATUS: Burst-No: 34 Addr: 001c5f29 Rxd: 2cee5f59
|
|
# tb_core.u_sdram32 : at time 33453.0 ns READ : Bank = 3 Row = 453, Col = 221, Data = 76de6bed
|
|
# READ STATUS: Burst-No: 35 Addr: 001c5f2b Rxd: 72c3a3e5
|
|
# tb_core.u_sdram32 : at time 33463.0 ns READ : Bank = 3 Row = 453, Col = 222, Data = e4a800c9
|
|
# READ STATUS: Burst-No: 36 Addr: 001c5f2d Rxd: 76de6bed
|
|
# tb_core.u_sdram32 : at time 33473.0 ns READ : Bank = 3 Row = 453, Col = 223, Data = a0aecc41
|
|
# tb_core.u_sdram32 : at time 33477.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 37 Addr: 001c5f2f Rxd: e4a800c9
|
|
# tb_core.u_sdram32 : at time 33483.0 ns READ : Bank = 3 Row = 453, Col = 224, Data = 57c1d1af
|
|
# READ STATUS: Burst-No: 38 Addr: 001c5f31 Rxd: a0aecc41
|
|
# tb_core.u_sdram32 : at time 33493.0 ns READ : Bank = 3 Row = 453, Col = 225, Data = eda71cdb
|
|
# READ STATUS: Burst-No: 39 Addr: 001c5f33 Rxd: 57c1d1af
|
|
# READ STATUS: Burst-No: 40 Addr: 001c5f35 Rxd: eda71cdb
|
|
# tb_core.u_sdram32 : at time 33663.0 ns READ : Bank = 2 Row = 366, Col = 51, Data = 8326d406
|
|
# tb_core.u_sdram32 : at time 33673.0 ns READ : Bank = 2 Row = 366, Col = 52, Data = d14820a2
|
|
# READ STATUS: Burst-No: 0 Addr: 0016e8cd Rxd: 8326d406
|
|
# tb_core.u_sdram32 : at time 33683.0 ns READ : Bank = 2 Row = 366, Col = 53, Data = 5e983dbd
|
|
# READ STATUS: Burst-No: 1 Addr: 0016e8cf Rxd: d14820a2
|
|
# tb_core.u_sdram32 : at time 33693.0 ns READ : Bank = 2 Row = 366, Col = 54, Data = b555de6a
|
|
# READ STATUS: Burst-No: 2 Addr: 0016e8d1 Rxd: 5e983dbd
|
|
# tb_core.u_sdram32 : at time 33703.0 ns READ : Bank = 2 Row = 366, Col = 55, Data = 6e3d47dc
|
|
# READ STATUS: Burst-No: 3 Addr: 0016e8d3 Rxd: b555de6a
|
|
# tb_core.u_sdram32 : at time 33713.0 ns READ : Bank = 2 Row = 366, Col = 56, Data = a86c5e50
|
|
# READ STATUS: Burst-No: 4 Addr: 0016e8d5 Rxd: 6e3d47dc
|
|
# tb_core.u_sdram32 : at time 33723.0 ns READ : Bank = 2 Row = 366, Col = 57, Data = bd86f47b
|
|
# READ STATUS: Burst-No: 5 Addr: 0016e8d7 Rxd: a86c5e50
|
|
# tb_core.u_sdram32 : at time 33733.0 ns READ : Bank = 2 Row = 366, Col = 58, Data = 929d5825
|
|
# READ STATUS: Burst-No: 6 Addr: 0016e8d9 Rxd: bd86f47b
|
|
# tb_core.u_sdram32 : at time 33743.0 ns READ : Bank = 2 Row = 366, Col = 59, Data = bc3f8478
|
|
# READ STATUS: Burst-No: 7 Addr: 0016e8db Rxd: 929d5825
|
|
# tb_core.u_sdram32 : at time 33753.0 ns READ : Bank = 2 Row = 366, Col = 60, Data = 7b7b89f6
|
|
# READ STATUS: Burst-No: 8 Addr: 0016e8dd Rxd: bc3f8478
|
|
# tb_core.u_sdram32 : at time 33763.0 ns READ : Bank = 2 Row = 366, Col = 61, Data = ae23ce5c
|
|
# READ STATUS: Burst-No: 9 Addr: 0016e8df Rxd: 7b7b89f6
|
|
# tb_core.u_sdram32 : at time 33773.0 ns READ : Bank = 2 Row = 366, Col = 62, Data = 11cc9b23
|
|
# READ STATUS: Burst-No: 10 Addr: 0016e8e1 Rxd: ae23ce5c
|
|
# tb_core.u_sdram32 : at time 33783.0 ns READ : Bank = 2 Row = 366, Col = 63, Data = 3cb3ab79
|
|
# READ STATUS: Burst-No: 11 Addr: 0016e8e3 Rxd: 11cc9b23
|
|
# tb_core.u_sdram32 : at time 33793.0 ns READ : Bank = 2 Row = 366, Col = 64, Data = 644605c8
|
|
# READ STATUS: Burst-No: 12 Addr: 0016e8e5 Rxd: 3cb3ab79
|
|
# tb_core.u_sdram32 : at time 33803.0 ns READ : Bank = 2 Row = 366, Col = 65, Data = ddd146bb
|
|
# READ STATUS: Burst-No: 13 Addr: 0016e8e7 Rxd: 644605c8
|
|
# tb_core.u_sdram32 : at time 33813.0 ns READ : Bank = 2 Row = 366, Col = 66, Data = 870cee0e
|
|
# READ STATUS: Burst-No: 14 Addr: 0016e8e9 Rxd: ddd146bb
|
|
# tb_core.u_sdram32 : at time 33823.0 ns READ : Bank = 2 Row = 366, Col = 67, Data = b9879473
|
|
# READ STATUS: Burst-No: 15 Addr: 0016e8eb Rxd: 870cee0e
|
|
# tb_core.u_sdram32 : at time 33833.0 ns READ : Bank = 2 Row = 366, Col = 68, Data = 0671030c
|
|
# READ STATUS: Burst-No: 16 Addr: 0016e8ed Rxd: b9879473
|
|
# tb_core.u_sdram32 : at time 33843.0 ns READ : Bank = 2 Row = 366, Col = 69, Data = e70f98ce
|
|
# READ STATUS: Burst-No: 17 Addr: 0016e8ef Rxd: 0671030c
|
|
# tb_core.u_sdram32 : at time 33853.0 ns READ : Bank = 2 Row = 366, Col = 70, Data = 6a1a61d4
|
|
# READ STATUS: Burst-No: 18 Addr: 0016e8f1 Rxd: e70f98ce
|
|
# tb_core.u_sdram32 : at time 33863.0 ns READ : Bank = 2 Row = 366, Col = 71, Data = acecdc59
|
|
# READ STATUS: Burst-No: 19 Addr: 0016e8f3 Rxd: 6a1a61d4
|
|
# tb_core.u_sdram32 : at time 33873.0 ns READ : Bank = 2 Row = 366, Col = 72, Data = 5ca26fb9
|
|
# READ STATUS: Burst-No: 20 Addr: 0016e8f5 Rxd: acecdc59
|
|
# tb_core.u_sdram32 : at time 33883.0 ns READ : Bank = 2 Row = 366, Col = 73, Data = d9b8c0b3
|
|
# READ STATUS: Burst-No: 21 Addr: 0016e8f7 Rxd: 5ca26fb9
|
|
# tb_core.u_sdram32 : at time 33893.0 ns READ : Bank = 2 Row = 366, Col = 74, Data = 7a4fbff4
|
|
# READ STATUS: Burst-No: 22 Addr: 0016e8f9 Rxd: d9b8c0b3
|
|
# tb_core.u_sdram32 : at time 33903.0 ns READ : Bank = 2 Row = 366, Col = 75, Data = baf4e275
|
|
# READ STATUS: Burst-No: 23 Addr: 0016e8fb Rxd: 7a4fbff4
|
|
# tb_core.u_sdram32 : at time 33913.0 ns READ : Bank = 2 Row = 366, Col = 76, Data = 066cf10c
|
|
# READ STATUS: Burst-No: 24 Addr: 0016e8fd Rxd: baf4e275
|
|
# tb_core.u_sdram32 : at time 33923.0 ns READ : Bank = 2 Row = 366, Col = 77, Data = 9cfc7a39
|
|
# READ STATUS: Burst-No: 25 Addr: 0016e8ff Rxd: 066cf10c
|
|
# tb_core.u_sdram32 : at time 33933.0 ns READ : Bank = 2 Row = 366, Col = 78, Data = 01729302
|
|
# READ STATUS: Burst-No: 26 Addr: 0016e901 Rxd: 9cfc7a39
|
|
# tb_core.u_sdram32 : at time 33943.0 ns READ : Bank = 2 Row = 366, Col = 79, Data = 8aecbe15
|
|
# READ STATUS: Burst-No: 27 Addr: 0016e903 Rxd: 01729302
|
|
# tb_core.u_sdram32 : at time 33953.0 ns READ : Bank = 2 Row = 366, Col = 80, Data = 02fbf905
|
|
# READ STATUS: Burst-No: 28 Addr: 0016e905 Rxd: 8aecbe15
|
|
# tb_core.u_sdram32 : at time 33963.0 ns READ : Bank = 2 Row = 366, Col = 81, Data = 271c434e
|
|
# READ STATUS: Burst-No: 29 Addr: 0016e907 Rxd: 02fbf905
|
|
# tb_core.u_sdram32 : at time 33973.0 ns READ : Bank = 2 Row = 366, Col = 82, Data = 013f2902
|
|
# READ STATUS: Burst-No: 30 Addr: 0016e909 Rxd: 271c434e
|
|
# tb_core.u_sdram32 : at time 33983.0 ns READ : Bank = 2 Row = 366, Col = 83, Data = 5c7951b8
|
|
# READ STATUS: Burst-No: 31 Addr: 0016e90b Rxd: 013f2902
|
|
# tb_core.u_sdram32 : at time 33993.0 ns READ : Bank = 2 Row = 366, Col = 84, Data = 847fb208
|
|
# READ STATUS: Burst-No: 32 Addr: 0016e90d Rxd: 5c7951b8
|
|
# tb_core.u_sdram32 : at time 34003.0 ns READ : Bank = 2 Row = 366, Col = 85, Data = 46e7538d
|
|
# READ STATUS: Burst-No: 33 Addr: 0016e90f Rxd: 847fb208
|
|
# tb_core.u_sdram32 : at time 34013.0 ns READ : Bank = 2 Row = 366, Col = 86, Data = d7b48eaf
|
|
# READ STATUS: Burst-No: 34 Addr: 0016e911 Rxd: 46e7538d
|
|
# tb_core.u_sdram32 : at time 34023.0 ns READ : Bank = 2 Row = 366, Col = 87, Data = 747331e8
|
|
# READ STATUS: Burst-No: 35 Addr: 0016e913 Rxd: d7b48eaf
|
|
# tb_core.u_sdram32 : at time 34033.0 ns READ : Bank = 2 Row = 366, Col = 88, Data = 48590990
|
|
# READ STATUS: Burst-No: 36 Addr: 0016e915 Rxd: 747331e8
|
|
# tb_core.u_sdram32 : at time 34043.0 ns READ : Bank = 2 Row = 366, Col = 89, Data = 7af6abf5
|
|
# READ STATUS: Burst-No: 37 Addr: 0016e917 Rxd: 48590990
|
|
# tb_core.u_sdram32 : at time 34053.0 ns READ : Bank = 2 Row = 366, Col = 90, Data = a620904c
|
|
# READ STATUS: Burst-No: 38 Addr: 0016e919 Rxd: 7af6abf5
|
|
# tb_core.u_sdram32 : at time 34063.0 ns READ : Bank = 2 Row = 366, Col = 91, Data = 3d82bd7b
|
|
# READ STATUS: Burst-No: 39 Addr: 0016e91b Rxd: a620904c
|
|
# tb_core.u_sdram32 : at time 34073.0 ns READ : Bank = 2 Row = 366, Col = 92, Data = a005a640
|
|
# READ STATUS: Burst-No: 40 Addr: 0016e91d Rxd: 3d82bd7b
|
|
# tb_core.u_sdram32 : at time 34083.0 ns READ : Bank = 2 Row = 366, Col = 93, Data = 12a90325
|
|
# READ STATUS: Burst-No: 41 Addr: 0016e91f Rxd: a005a640
|
|
# tb_core.u_sdram32 : at time 34093.0 ns READ : Bank = 2 Row = 366, Col = 94, Data = 86ebb60d
|
|
# READ STATUS: Burst-No: 42 Addr: 0016e921 Rxd: 12a90325
|
|
# tb_core.u_sdram32 : at time 34103.0 ns READ : Bank = 2 Row = 366, Col = 95, Data = b87c1070
|
|
# READ STATUS: Burst-No: 43 Addr: 0016e923 Rxd: 86ebb60d
|
|
# tb_core.u_sdram32 : at time 34113.0 ns READ : Bank = 2 Row = 366, Col = 96, Data = 16cbf92d
|
|
# READ STATUS: Burst-No: 44 Addr: 0016e925 Rxd: b87c1070
|
|
# tb_core.u_sdram32 : at time 34123.0 ns READ : Bank = 2 Row = 366, Col = 97, Data = 94ded829
|
|
# tb_core.u_sdram32 : at time 34127.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 45 Addr: 0016e927 Rxd: 16cbf92d
|
|
# tb_core.u_sdram32 : at time 34133.0 ns READ : Bank = 2 Row = 366, Col = 98, Data = 5e2551bc
|
|
# READ STATUS: Burst-No: 46 Addr: 0016e929 Rxd: 94ded829
|
|
# tb_core.u_sdram32 : at time 34143.0 ns READ : Bank = 2 Row = 366, Col = 99, Data = 987b0830
|
|
# READ STATUS: Burst-No: 47 Addr: 0016e92b Rxd: 5e2551bc
|
|
# READ STATUS: Burst-No: 48 Addr: 0016e92d Rxd: 987b0830
|
|
# Write Address: 00272dc0, Burst Size: 17
|
|
# tb_core.u_sdram32 : at time 34317.0 ns ACT : Bank = 3 Row = 626
|
|
# tb_core.u_sdram32 : at time 34347.0 ns WRITE: Bank = 3 Row = 626, Col = 112, Data = d0cf6aa1
|
|
# Status: Burst-No: 0 Write Address: 00272dc0 WriteData: d0cf6aa1
|
|
# tb_core.u_sdram32 : at time 34357.0 ns WRITE: Bank = 3 Row = 626, Col = 113, Data = 26bf3f4d
|
|
# Status: Burst-No: 1 Write Address: 00272dc0 WriteData: 26bf3f4d
|
|
# tb_core.u_sdram32 : at time 34367.0 ns WRITE: Bank = 3 Row = 626, Col = 114, Data = faf32ef5
|
|
# Status: Burst-No: 2 Write Address: 00272dc0 WriteData: faf32ef5
|
|
# tb_core.u_sdram32 : at time 34377.0 ns WRITE: Bank = 3 Row = 626, Col = 115, Data = 7a87aff5
|
|
# Status: Burst-No: 3 Write Address: 00272dc0 WriteData: 7a87aff5
|
|
# tb_core.u_sdram32 : at time 34387.0 ns WRITE: Bank = 3 Row = 626, Col = 116, Data = aeeacc5d
|
|
# Status: Burst-No: 4 Write Address: 00272dc0 WriteData: aeeacc5d
|
|
# tb_core.u_sdram32 : at time 34397.0 ns WRITE: Bank = 3 Row = 626, Col = 117, Data = ca481294
|
|
# Status: Burst-No: 5 Write Address: 00272dc0 WriteData: ca481294
|
|
# tb_core.u_sdram32 : at time 34407.0 ns WRITE: Bank = 3 Row = 626, Col = 118, Data = b558a66a
|
|
# Status: Burst-No: 6 Write Address: 00272dc0 WriteData: b558a66a
|
|
# tb_core.u_sdram32 : at time 34417.0 ns WRITE: Bank = 3 Row = 626, Col = 119, Data = 5e6065bc
|
|
# Status: Burst-No: 7 Write Address: 00272dc0 WriteData: 5e6065bc
|
|
# tb_core.u_sdram32 : at time 34427.0 ns WRITE: Bank = 3 Row = 626, Col = 120, Data = dc4308b8
|
|
# Status: Burst-No: 8 Write Address: 00272dc0 WriteData: dc4308b8
|
|
# tb_core.u_sdram32 : at time 34437.0 ns WRITE: Bank = 3 Row = 626, Col = 121, Data = cf309c9e
|
|
# Status: Burst-No: 9 Write Address: 00272dc0 WriteData: cf309c9e
|
|
# tb_core.u_sdram32 : at time 34447.0 ns WRITE: Bank = 3 Row = 626, Col = 122, Data = fd7906fa
|
|
# Status: Burst-No: 10 Write Address: 00272dc0 WriteData: fd7906fa
|
|
# tb_core.u_sdram32 : at time 34457.0 ns WRITE: Bank = 3 Row = 626, Col = 123, Data = 23400b46
|
|
# Status: Burst-No: 11 Write Address: 00272dc0 WriteData: 23400b46
|
|
# tb_core.u_sdram32 : at time 34467.0 ns WRITE: Bank = 3 Row = 626, Col = 124, Data = 83fa6407
|
|
# Status: Burst-No: 12 Write Address: 00272dc0 WriteData: 83fa6407
|
|
# tb_core.u_sdram32 : at time 34477.0 ns WRITE: Bank = 3 Row = 626, Col = 125, Data = c9cbbc93
|
|
# Status: Burst-No: 13 Write Address: 00272dc0 WriteData: c9cbbc93
|
|
# tb_core.u_sdram32 : at time 34487.0 ns WRITE: Bank = 3 Row = 626, Col = 126, Data = aada7455
|
|
# Status: Burst-No: 14 Write Address: 00272dc0 WriteData: aada7455
|
|
# tb_core.u_sdram32 : at time 34497.0 ns WRITE: Bank = 3 Row = 626, Col = 127, Data = 5bd3dbb7
|
|
# Status: Burst-No: 15 Write Address: 00272dc0 WriteData: 5bd3dbb7
|
|
# tb_core.u_sdram32 : at time 34507.0 ns WRITE: Bank = 3 Row = 626, Col = 128, Data = 22d5f145
|
|
# Status: Burst-No: 16 Write Address: 00272dc0 WriteData: 22d5f145
|
|
# tb_core.u_sdram32 : at time 34517.0 ns BST : Burst Terminate
|
|
# Write Address: 00000a63, Burst Size: 26
|
|
# tb_core.u_sdram32 : at time 34657.0 ns ACT : Bank = 2 Row = 0
|
|
# tb_core.u_sdram32 : at time 34687.0 ns WRITE: Bank = 2 Row = 0, Col = 152, Data = 9372ce26
|
|
# Status: Burst-No: 0 Write Address: 00000a63 WriteData: 9372ce26
|
|
# tb_core.u_sdram32 : at time 34697.0 ns WRITE: Bank = 2 Row = 0, Col = 153, Data = b4497668
|
|
# Status: Burst-No: 1 Write Address: 00000a63 WriteData: b4497668
|
|
# tb_core.u_sdram32 : at time 34707.0 ns WRITE: Bank = 2 Row = 0, Col = 154, Data = 8f63e41e
|
|
# Status: Burst-No: 2 Write Address: 00000a63 WriteData: 8f63e41e
|
|
# tb_core.u_sdram32 : at time 34717.0 ns WRITE: Bank = 2 Row = 0, Col = 155, Data = c838f490
|
|
# Status: Burst-No: 3 Write Address: 00000a63 WriteData: c838f490
|
|
# tb_core.u_sdram32 : at time 34727.0 ns WRITE: Bank = 2 Row = 0, Col = 156, Data = 2d19a55a
|
|
# Status: Burst-No: 4 Write Address: 00000a63 WriteData: 2d19a55a
|
|
# tb_core.u_sdram32 : at time 34737.0 ns WRITE: Bank = 2 Row = 0, Col = 157, Data = 0e43851c
|
|
# Status: Burst-No: 5 Write Address: 00000a63 WriteData: 0e43851c
|
|
# tb_core.u_sdram32 : at time 34747.0 ns WRITE: Bank = 2 Row = 0, Col = 158, Data = 5c9967b9
|
|
# Status: Burst-No: 6 Write Address: 00000a63 WriteData: 5c9967b9
|
|
# tb_core.u_sdram32 : at time 34757.0 ns WRITE: Bank = 2 Row = 0, Col = 159, Data = 55861fab
|
|
# Status: Burst-No: 7 Write Address: 00000a63 WriteData: 55861fab
|
|
# tb_core.u_sdram32 : at time 34767.0 ns WRITE: Bank = 2 Row = 0, Col = 160, Data = 6826d9d0
|
|
# Status: Burst-No: 8 Write Address: 00000a63 WriteData: 6826d9d0
|
|
# tb_core.u_sdram32 : at time 34777.0 ns WRITE: Bank = 2 Row = 0, Col = 161, Data = 37b9656f
|
|
# Status: Burst-No: 9 Write Address: 00000a63 WriteData: 37b9656f
|
|
# tb_core.u_sdram32 : at time 34787.0 ns WRITE: Bank = 2 Row = 0, Col = 162, Data = 6c6a6dd8
|
|
# Status: Burst-No: 10 Write Address: 00000a63 WriteData: 6c6a6dd8
|
|
# tb_core.u_sdram32 : at time 34797.0 ns WRITE: Bank = 2 Row = 0, Col = 163, Data = a2cc8845
|
|
# Status: Burst-No: 11 Write Address: 00000a63 WriteData: a2cc8845
|
|
# tb_core.u_sdram32 : at time 34807.0 ns WRITE: Bank = 2 Row = 0, Col = 164, Data = 46d6a78d
|
|
# Status: Burst-No: 12 Write Address: 00000a63 WriteData: 46d6a78d
|
|
# tb_core.u_sdram32 : at time 34817.0 ns WRITE: Bank = 2 Row = 0, Col = 165, Data = 45f3238b
|
|
# Status: Burst-No: 13 Write Address: 00000a63 WriteData: 45f3238b
|
|
# tb_core.u_sdram32 : at time 34827.0 ns WRITE: Bank = 2 Row = 0, Col = 166, Data = 7e2491fc
|
|
# Status: Burst-No: 14 Write Address: 00000a63 WriteData: 7e2491fc
|
|
# tb_core.u_sdram32 : at time 34837.0 ns WRITE: Bank = 2 Row = 0, Col = 167, Data = 6e1e1fdc
|
|
# Status: Burst-No: 15 Write Address: 00000a63 WriteData: 6e1e1fdc
|
|
# tb_core.u_sdram32 : at time 34847.0 ns WRITE: Bank = 2 Row = 0, Col = 168, Data = d27f0aa4
|
|
# Status: Burst-No: 16 Write Address: 00000a63 WriteData: d27f0aa4
|
|
# tb_core.u_sdram32 : at time 34857.0 ns WRITE: Bank = 2 Row = 0, Col = 169, Data = 0c978d19
|
|
# Status: Burst-No: 17 Write Address: 00000a63 WriteData: 0c978d19
|
|
# tb_core.u_sdram32 : at time 34867.0 ns WRITE: Bank = 2 Row = 0, Col = 170, Data = 52b533a5
|
|
# Status: Burst-No: 18 Write Address: 00000a63 WriteData: 52b533a5
|
|
# tb_core.u_sdram32 : at time 34877.0 ns WRITE: Bank = 2 Row = 0, Col = 171, Data = 9f398e3e
|
|
# Status: Burst-No: 19 Write Address: 00000a63 WriteData: 9f398e3e
|
|
# tb_core.u_sdram32 : at time 34887.0 ns WRITE: Bank = 2 Row = 0, Col = 172, Data = f98bc0f3
|
|
# Status: Burst-No: 20 Write Address: 00000a63 WriteData: f98bc0f3
|
|
# tb_core.u_sdram32 : at time 34897.0 ns WRITE: Bank = 2 Row = 0, Col = 173, Data = ac782c58
|
|
# Status: Burst-No: 21 Write Address: 00000a63 WriteData: ac782c58
|
|
# tb_core.u_sdram32 : at time 34907.0 ns WRITE: Bank = 2 Row = 0, Col = 174, Data = 62056bc4
|
|
# Status: Burst-No: 22 Write Address: 00000a63 WriteData: 62056bc4
|
|
# tb_core.u_sdram32 : at time 34917.0 ns WRITE: Bank = 2 Row = 0, Col = 175, Data = 2e36435c
|
|
# Status: Burst-No: 23 Write Address: 00000a63 WriteData: 2e36435c
|
|
# tb_core.u_sdram32 : at time 34927.0 ns WRITE: Bank = 2 Row = 0, Col = 176, Data = 033a4506
|
|
# Status: Burst-No: 24 Write Address: 00000a63 WriteData: 033a4506
|
|
# tb_core.u_sdram32 : at time 34937.0 ns WRITE: Bank = 2 Row = 0, Col = 177, Data = cd1d509a
|
|
# Status: Burst-No: 25 Write Address: 00000a63 WriteData: cd1d509a
|
|
# tb_core.u_sdram32 : at time 34947.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 35083.0 ns READ : Bank = 3 Row = 626, Col = 112, Data = d0cf6aa1
|
|
# tb_core.u_sdram32 : at time 35093.0 ns READ : Bank = 3 Row = 626, Col = 113, Data = 26bf3f4d
|
|
# READ STATUS: Burst-No: 0 Addr: 00272dc0 Rxd: d0cf6aa1
|
|
# tb_core.u_sdram32 : at time 35103.0 ns READ : Bank = 3 Row = 626, Col = 114, Data = faf32ef5
|
|
# READ STATUS: Burst-No: 1 Addr: 00272dc2 Rxd: 26bf3f4d
|
|
# tb_core.u_sdram32 : at time 35113.0 ns READ : Bank = 3 Row = 626, Col = 115, Data = 7a87aff5
|
|
# READ STATUS: Burst-No: 2 Addr: 00272dc4 Rxd: faf32ef5
|
|
# tb_core.u_sdram32 : at time 35123.0 ns READ : Bank = 3 Row = 626, Col = 116, Data = aeeacc5d
|
|
# READ STATUS: Burst-No: 3 Addr: 00272dc6 Rxd: 7a87aff5
|
|
# tb_core.u_sdram32 : at time 35133.0 ns READ : Bank = 3 Row = 626, Col = 117, Data = ca481294
|
|
# READ STATUS: Burst-No: 4 Addr: 00272dc8 Rxd: aeeacc5d
|
|
# tb_core.u_sdram32 : at time 35143.0 ns READ : Bank = 3 Row = 626, Col = 118, Data = b558a66a
|
|
# READ STATUS: Burst-No: 5 Addr: 00272dca Rxd: ca481294
|
|
# tb_core.u_sdram32 : at time 35153.0 ns READ : Bank = 3 Row = 626, Col = 119, Data = 5e6065bc
|
|
# READ STATUS: Burst-No: 6 Addr: 00272dcc Rxd: b558a66a
|
|
# tb_core.u_sdram32 : at time 35163.0 ns READ : Bank = 3 Row = 626, Col = 120, Data = dc4308b8
|
|
# READ STATUS: Burst-No: 7 Addr: 00272dce Rxd: 5e6065bc
|
|
# tb_core.u_sdram32 : at time 35173.0 ns READ : Bank = 3 Row = 626, Col = 121, Data = cf309c9e
|
|
# READ STATUS: Burst-No: 8 Addr: 00272dd0 Rxd: dc4308b8
|
|
# tb_core.u_sdram32 : at time 35183.0 ns READ : Bank = 3 Row = 626, Col = 122, Data = fd7906fa
|
|
# READ STATUS: Burst-No: 9 Addr: 00272dd2 Rxd: cf309c9e
|
|
# tb_core.u_sdram32 : at time 35193.0 ns READ : Bank = 3 Row = 626, Col = 123, Data = 23400b46
|
|
# READ STATUS: Burst-No: 10 Addr: 00272dd4 Rxd: fd7906fa
|
|
# tb_core.u_sdram32 : at time 35203.0 ns READ : Bank = 3 Row = 626, Col = 124, Data = 83fa6407
|
|
# READ STATUS: Burst-No: 11 Addr: 00272dd6 Rxd: 23400b46
|
|
# tb_core.u_sdram32 : at time 35213.0 ns READ : Bank = 3 Row = 626, Col = 125, Data = c9cbbc93
|
|
# READ STATUS: Burst-No: 12 Addr: 00272dd8 Rxd: 83fa6407
|
|
# tb_core.u_sdram32 : at time 35223.0 ns READ : Bank = 3 Row = 626, Col = 126, Data = aada7455
|
|
# tb_core.u_sdram32 : at time 35227.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 13 Addr: 00272dda Rxd: c9cbbc93
|
|
# tb_core.u_sdram32 : at time 35233.0 ns READ : Bank = 3 Row = 626, Col = 127, Data = 5bd3dbb7
|
|
# READ STATUS: Burst-No: 14 Addr: 00272ddc Rxd: aada7455
|
|
# tb_core.u_sdram32 : at time 35243.0 ns READ : Bank = 3 Row = 626, Col = 128, Data = 22d5f145
|
|
# READ STATUS: Burst-No: 15 Addr: 00272dde Rxd: 5bd3dbb7
|
|
# READ STATUS: Burst-No: 16 Addr: 00272de0 Rxd: 22d5f145
|
|
# tb_core.u_sdram32 : at time 35413.0 ns READ : Bank = 2 Row = 0, Col = 152, Data = 9372ce26
|
|
# tb_core.u_sdram32 : at time 35423.0 ns READ : Bank = 2 Row = 0, Col = 153, Data = b4497668
|
|
# READ STATUS: Burst-No: 0 Addr: 00000a63 Rxd: 9372ce26
|
|
# tb_core.u_sdram32 : at time 35433.0 ns READ : Bank = 2 Row = 0, Col = 154, Data = 8f63e41e
|
|
# READ STATUS: Burst-No: 1 Addr: 00000a65 Rxd: b4497668
|
|
# tb_core.u_sdram32 : at time 35443.0 ns READ : Bank = 2 Row = 0, Col = 155, Data = c838f490
|
|
# READ STATUS: Burst-No: 2 Addr: 00000a67 Rxd: 8f63e41e
|
|
# tb_core.u_sdram32 : at time 35453.0 ns READ : Bank = 2 Row = 0, Col = 156, Data = 2d19a55a
|
|
# READ STATUS: Burst-No: 3 Addr: 00000a69 Rxd: c838f490
|
|
# tb_core.u_sdram32 : at time 35463.0 ns READ : Bank = 2 Row = 0, Col = 157, Data = 0e43851c
|
|
# READ STATUS: Burst-No: 4 Addr: 00000a6b Rxd: 2d19a55a
|
|
# tb_core.u_sdram32 : at time 35473.0 ns READ : Bank = 2 Row = 0, Col = 158, Data = 5c9967b9
|
|
# READ STATUS: Burst-No: 5 Addr: 00000a6d Rxd: 0e43851c
|
|
# tb_core.u_sdram32 : at time 35483.0 ns READ : Bank = 2 Row = 0, Col = 159, Data = 55861fab
|
|
# READ STATUS: Burst-No: 6 Addr: 00000a6f Rxd: 5c9967b9
|
|
# tb_core.u_sdram32 : at time 35493.0 ns READ : Bank = 2 Row = 0, Col = 160, Data = 6826d9d0
|
|
# READ STATUS: Burst-No: 7 Addr: 00000a71 Rxd: 55861fab
|
|
# tb_core.u_sdram32 : at time 35503.0 ns READ : Bank = 2 Row = 0, Col = 161, Data = 37b9656f
|
|
# READ STATUS: Burst-No: 8 Addr: 00000a73 Rxd: 6826d9d0
|
|
# tb_core.u_sdram32 : at time 35513.0 ns READ : Bank = 2 Row = 0, Col = 162, Data = 6c6a6dd8
|
|
# READ STATUS: Burst-No: 9 Addr: 00000a75 Rxd: 37b9656f
|
|
# tb_core.u_sdram32 : at time 35523.0 ns READ : Bank = 2 Row = 0, Col = 163, Data = a2cc8845
|
|
# READ STATUS: Burst-No: 10 Addr: 00000a77 Rxd: 6c6a6dd8
|
|
# tb_core.u_sdram32 : at time 35533.0 ns READ : Bank = 2 Row = 0, Col = 164, Data = 46d6a78d
|
|
# READ STATUS: Burst-No: 11 Addr: 00000a79 Rxd: a2cc8845
|
|
# tb_core.u_sdram32 : at time 35543.0 ns READ : Bank = 2 Row = 0, Col = 165, Data = 45f3238b
|
|
# READ STATUS: Burst-No: 12 Addr: 00000a7b Rxd: 46d6a78d
|
|
# tb_core.u_sdram32 : at time 35553.0 ns READ : Bank = 2 Row = 0, Col = 166, Data = 7e2491fc
|
|
# READ STATUS: Burst-No: 13 Addr: 00000a7d Rxd: 45f3238b
|
|
# tb_core.u_sdram32 : at time 35563.0 ns READ : Bank = 2 Row = 0, Col = 167, Data = 6e1e1fdc
|
|
# READ STATUS: Burst-No: 14 Addr: 00000a7f Rxd: 7e2491fc
|
|
# tb_core.u_sdram32 : at time 35573.0 ns READ : Bank = 2 Row = 0, Col = 168, Data = d27f0aa4
|
|
# READ STATUS: Burst-No: 15 Addr: 00000a81 Rxd: 6e1e1fdc
|
|
# tb_core.u_sdram32 : at time 35583.0 ns READ : Bank = 2 Row = 0, Col = 169, Data = 0c978d19
|
|
# READ STATUS: Burst-No: 16 Addr: 00000a83 Rxd: d27f0aa4
|
|
# tb_core.u_sdram32 : at time 35593.0 ns READ : Bank = 2 Row = 0, Col = 170, Data = 52b533a5
|
|
# READ STATUS: Burst-No: 17 Addr: 00000a85 Rxd: 0c978d19
|
|
# tb_core.u_sdram32 : at time 35603.0 ns READ : Bank = 2 Row = 0, Col = 171, Data = 9f398e3e
|
|
# READ STATUS: Burst-No: 18 Addr: 00000a87 Rxd: 52b533a5
|
|
# tb_core.u_sdram32 : at time 35613.0 ns READ : Bank = 2 Row = 0, Col = 172, Data = f98bc0f3
|
|
# READ STATUS: Burst-No: 19 Addr: 00000a89 Rxd: 9f398e3e
|
|
# tb_core.u_sdram32 : at time 35623.0 ns READ : Bank = 2 Row = 0, Col = 173, Data = ac782c58
|
|
# READ STATUS: Burst-No: 20 Addr: 00000a8b Rxd: f98bc0f3
|
|
# tb_core.u_sdram32 : at time 35633.0 ns READ : Bank = 2 Row = 0, Col = 174, Data = 62056bc4
|
|
# READ STATUS: Burst-No: 21 Addr: 00000a8d Rxd: ac782c58
|
|
# tb_core.u_sdram32 : at time 35643.0 ns READ : Bank = 2 Row = 0, Col = 175, Data = 2e36435c
|
|
# tb_core.u_sdram32 : at time 35647.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 22 Addr: 00000a8f Rxd: 62056bc4
|
|
# tb_core.u_sdram32 : at time 35653.0 ns READ : Bank = 2 Row = 0, Col = 176, Data = 033a4506
|
|
# READ STATUS: Burst-No: 23 Addr: 00000a91 Rxd: 2e36435c
|
|
# tb_core.u_sdram32 : at time 35663.0 ns READ : Bank = 2 Row = 0, Col = 177, Data = cd1d509a
|
|
# READ STATUS: Burst-No: 24 Addr: 00000a93 Rxd: 033a4506
|
|
# READ STATUS: Burst-No: 25 Addr: 00000a95 Rxd: cd1d509a
|
|
# Write Address: 00161918, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 35837.0 ns ACT : Bank = 2 Row = 353
|
|
# tb_core.u_sdram32 : at time 35867.0 ns WRITE: Bank = 2 Row = 353, Col = 70, Data = 5515d1aa
|
|
# Status: Burst-No: 0 Write Address: 00161918 WriteData: 5515d1aa
|
|
# tb_core.u_sdram32 : at time 35877.0 ns WRITE: Bank = 2 Row = 353, Col = 71, Data = 0d12031a
|
|
# Status: Burst-No: 1 Write Address: 00161918 WriteData: 0d12031a
|
|
# tb_core.u_sdram32 : at time 35887.0 ns WRITE: Bank = 2 Row = 353, Col = 72, Data = 61dbd5c3
|
|
# Status: Burst-No: 2 Write Address: 00161918 WriteData: 61dbd5c3
|
|
# tb_core.u_sdram32 : at time 35897.0 ns WRITE: Bank = 2 Row = 353, Col = 73, Data = 5934e9b2
|
|
# Status: Burst-No: 3 Write Address: 00161918 WriteData: 5934e9b2
|
|
# tb_core.u_sdram32 : at time 35907.0 ns WRITE: Bank = 2 Row = 353, Col = 74, Data = 0633630c
|
|
# Status: Burst-No: 4 Write Address: 00161918 WriteData: 0633630c
|
|
# tb_core.u_sdram32 : at time 35917.0 ns WRITE: Bank = 2 Row = 353, Col = 75, Data = f4f00ee9
|
|
# Status: Burst-No: 5 Write Address: 00161918 WriteData: f4f00ee9
|
|
# tb_core.u_sdram32 : at time 35927.0 ns BST : Burst Terminate
|
|
# Write Address: 001afdc3, Burst Size: 44
|
|
# tb_core.u_sdram32 : at time 36067.0 ns ACT : Bank = 3 Row = 431
|
|
# tb_core.u_sdram32 : at time 36097.0 ns WRITE: Bank = 3 Row = 431, Col = 112, Data = 7c2db9f8
|
|
# Status: Burst-No: 0 Write Address: 001afdc3 WriteData: 7c2db9f8
|
|
# tb_core.u_sdram32 : at time 36107.0 ns WRITE: Bank = 3 Row = 431, Col = 113, Data = 792c03f2
|
|
# Status: Burst-No: 1 Write Address: 001afdc3 WriteData: 792c03f2
|
|
# tb_core.u_sdram32 : at time 36117.0 ns WRITE: Bank = 3 Row = 431, Col = 114, Data = 4483ad89
|
|
# Status: Burst-No: 2 Write Address: 001afdc3 WriteData: 4483ad89
|
|
# tb_core.u_sdram32 : at time 36127.0 ns WRITE: Bank = 3 Row = 431, Col = 115, Data = 378c736f
|
|
# Status: Burst-No: 3 Write Address: 001afdc3 WriteData: 378c736f
|
|
# tb_core.u_sdram32 : at time 36137.0 ns WRITE: Bank = 3 Row = 431, Col = 116, Data = 0de14b1b
|
|
# Status: Burst-No: 4 Write Address: 001afdc3 WriteData: 0de14b1b
|
|
# tb_core.u_sdram32 : at time 36147.0 ns WRITE: Bank = 3 Row = 431, Col = 117, Data = d6a128ad
|
|
# Status: Burst-No: 5 Write Address: 001afdc3 WriteData: d6a128ad
|
|
# tb_core.u_sdram32 : at time 36157.0 ns WRITE: Bank = 3 Row = 431, Col = 118, Data = 344dc168
|
|
# Status: Burst-No: 6 Write Address: 001afdc3 WriteData: 344dc168
|
|
# tb_core.u_sdram32 : at time 36167.0 ns WRITE: Bank = 3 Row = 431, Col = 119, Data = 92f91225
|
|
# Status: Burst-No: 7 Write Address: 001afdc3 WriteData: 92f91225
|
|
# tb_core.u_sdram32 : at time 36177.0 ns WRITE: Bank = 3 Row = 431, Col = 120, Data = 67e857cf
|
|
# Status: Burst-No: 8 Write Address: 001afdc3 WriteData: 67e857cf
|
|
# tb_core.u_sdram32 : at time 36187.0 ns WRITE: Bank = 3 Row = 431, Col = 121, Data = 55dd8dab
|
|
# Status: Burst-No: 9 Write Address: 001afdc3 WriteData: 55dd8dab
|
|
# tb_core.u_sdram32 : at time 36197.0 ns WRITE: Bank = 3 Row = 431, Col = 122, Data = 8d94d21b
|
|
# Status: Burst-No: 10 Write Address: 001afdc3 WriteData: 8d94d21b
|
|
# tb_core.u_sdram32 : at time 36207.0 ns WRITE: Bank = 3 Row = 431, Col = 123, Data = c03b3e80
|
|
# Status: Burst-No: 11 Write Address: 001afdc3 WriteData: c03b3e80
|
|
# tb_core.u_sdram32 : at time 36217.0 ns WRITE: Bank = 3 Row = 431, Col = 124, Data = 2ed6d95d
|
|
# Status: Burst-No: 12 Write Address: 001afdc3 WriteData: 2ed6d95d
|
|
# tb_core.u_sdram32 : at time 36227.0 ns WRITE: Bank = 3 Row = 431, Col = 125, Data = 412dfd82
|
|
# Status: Burst-No: 13 Write Address: 001afdc3 WriteData: 412dfd82
|
|
# tb_core.u_sdram32 : at time 36237.0 ns WRITE: Bank = 3 Row = 431, Col = 126, Data = 82344204
|
|
# Status: Burst-No: 14 Write Address: 001afdc3 WriteData: 82344204
|
|
# tb_core.u_sdram32 : at time 36247.0 ns WRITE: Bank = 3 Row = 431, Col = 127, Data = 2ba7a557
|
|
# Status: Burst-No: 15 Write Address: 001afdc3 WriteData: 2ba7a557
|
|
# tb_core.u_sdram32 : at time 36257.0 ns WRITE: Bank = 3 Row = 431, Col = 128, Data = 1b368b36
|
|
# Status: Burst-No: 16 Write Address: 001afdc3 WriteData: 1b368b36
|
|
# tb_core.u_sdram32 : at time 36267.0 ns WRITE: Bank = 3 Row = 431, Col = 129, Data = 196a0332
|
|
# Status: Burst-No: 17 Write Address: 001afdc3 WriteData: 196a0332
|
|
# tb_core.u_sdram32 : at time 36277.0 ns WRITE: Bank = 3 Row = 431, Col = 130, Data = bce32879
|
|
# Status: Burst-No: 18 Write Address: 001afdc3 WriteData: bce32879
|
|
# tb_core.u_sdram32 : at time 36287.0 ns WRITE: Bank = 3 Row = 431, Col = 131, Data = f24baee4
|
|
# Status: Burst-No: 19 Write Address: 001afdc3 WriteData: f24baee4
|
|
# tb_core.u_sdram32 : at time 36297.0 ns WRITE: Bank = 3 Row = 431, Col = 132, Data = 8b42ec16
|
|
# Status: Burst-No: 20 Write Address: 001afdc3 WriteData: 8b42ec16
|
|
# tb_core.u_sdram32 : at time 36307.0 ns WRITE: Bank = 3 Row = 431, Col = 133, Data = d57fecaa
|
|
# Status: Burst-No: 21 Write Address: 001afdc3 WriteData: d57fecaa
|
|
# tb_core.u_sdram32 : at time 36317.0 ns WRITE: Bank = 3 Row = 431, Col = 134, Data = 605065c0
|
|
# Status: Burst-No: 22 Write Address: 001afdc3 WriteData: 605065c0
|
|
# tb_core.u_sdram32 : at time 36327.0 ns WRITE: Bank = 3 Row = 431, Col = 135, Data = 9759882e
|
|
# Status: Burst-No: 23 Write Address: 001afdc3 WriteData: 9759882e
|
|
# tb_core.u_sdram32 : at time 36337.0 ns WRITE: Bank = 3 Row = 431, Col = 136, Data = 4665378c
|
|
# Status: Burst-No: 24 Write Address: 001afdc3 WriteData: 4665378c
|
|
# tb_core.u_sdram32 : at time 36347.0 ns WRITE: Bank = 3 Row = 431, Col = 137, Data = b8c0c271
|
|
# Status: Burst-No: 25 Write Address: 001afdc3 WriteData: b8c0c271
|
|
# tb_core.u_sdram32 : at time 36357.0 ns WRITE: Bank = 3 Row = 431, Col = 138, Data = 7dfe8ffb
|
|
# Status: Burst-No: 26 Write Address: 001afdc3 WriteData: 7dfe8ffb
|
|
# tb_core.u_sdram32 : at time 36367.0 ns WRITE: Bank = 3 Row = 431, Col = 139, Data = 5e5421bc
|
|
# Status: Burst-No: 27 Write Address: 001afdc3 WriteData: 5e5421bc
|
|
# tb_core.u_sdram32 : at time 36377.0 ns WRITE: Bank = 3 Row = 431, Col = 140, Data = ee7068dc
|
|
# Status: Burst-No: 28 Write Address: 001afdc3 WriteData: ee7068dc
|
|
# tb_core.u_sdram32 : at time 36387.0 ns WRITE: Bank = 3 Row = 431, Col = 141, Data = 0bec5717
|
|
# Status: Burst-No: 29 Write Address: 001afdc3 WriteData: 0bec5717
|
|
# tb_core.u_sdram32 : at time 36397.0 ns WRITE: Bank = 3 Row = 431, Col = 142, Data = e0e004c1
|
|
# Status: Burst-No: 30 Write Address: 001afdc3 WriteData: e0e004c1
|
|
# tb_core.u_sdram32 : at time 36407.0 ns WRITE: Bank = 3 Row = 431, Col = 143, Data = 75fb21eb
|
|
# Status: Burst-No: 31 Write Address: 001afdc3 WriteData: 75fb21eb
|
|
# tb_core.u_sdram32 : at time 36417.0 ns WRITE: Bank = 3 Row = 431, Col = 144, Data = 5a9d3bb5
|
|
# Status: Burst-No: 32 Write Address: 001afdc3 WriteData: 5a9d3bb5
|
|
# tb_core.u_sdram32 : at time 36427.0 ns WRITE: Bank = 3 Row = 431, Col = 145, Data = c4fd2e89
|
|
# Status: Burst-No: 33 Write Address: 001afdc3 WriteData: c4fd2e89
|
|
# tb_core.u_sdram32 : at time 36437.0 ns WRITE: Bank = 3 Row = 431, Col = 146, Data = c7b2e28f
|
|
# Status: Burst-No: 34 Write Address: 001afdc3 WriteData: c7b2e28f
|
|
# tb_core.u_sdram32 : at time 36447.0 ns WRITE: Bank = 3 Row = 431, Col = 147, Data = dff6f6bf
|
|
# Status: Burst-No: 35 Write Address: 001afdc3 WriteData: dff6f6bf
|
|
# tb_core.u_sdram32 : at time 36457.0 ns WRITE: Bank = 3 Row = 431, Col = 148, Data = d8462ab0
|
|
# Status: Burst-No: 36 Write Address: 001afdc3 WriteData: d8462ab0
|
|
# tb_core.u_sdram32 : at time 36467.0 ns WRITE: Bank = 3 Row = 431, Col = 149, Data = e9b49ad3
|
|
# Status: Burst-No: 37 Write Address: 001afdc3 WriteData: e9b49ad3
|
|
# tb_core.u_sdram32 : at time 36477.0 ns WRITE: Bank = 3 Row = 431, Col = 150, Data = eb1d02d6
|
|
# Status: Burst-No: 38 Write Address: 001afdc3 WriteData: eb1d02d6
|
|
# tb_core.u_sdram32 : at time 36487.0 ns WRITE: Bank = 3 Row = 431, Col = 151, Data = c144cc82
|
|
# Status: Burst-No: 39 Write Address: 001afdc3 WriteData: c144cc82
|
|
# tb_core.u_sdram32 : at time 36497.0 ns WRITE: Bank = 3 Row = 431, Col = 152, Data = 0d63751a
|
|
# Status: Burst-No: 40 Write Address: 001afdc3 WriteData: 0d63751a
|
|
# tb_core.u_sdram32 : at time 36507.0 ns WRITE: Bank = 3 Row = 431, Col = 153, Data = 38e6a771
|
|
# Status: Burst-No: 41 Write Address: 001afdc3 WriteData: 38e6a771
|
|
# tb_core.u_sdram32 : at time 36517.0 ns WRITE: Bank = 3 Row = 431, Col = 154, Data = eb8804d7
|
|
# Status: Burst-No: 42 Write Address: 001afdc3 WriteData: eb8804d7
|
|
# tb_core.u_sdram32 : at time 36527.0 ns WRITE: Bank = 3 Row = 431, Col = 155, Data = 87628e0e
|
|
# Status: Burst-No: 43 Write Address: 001afdc3 WriteData: 87628e0e
|
|
# tb_core.u_sdram32 : at time 36537.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 36673.0 ns READ : Bank = 2 Row = 353, Col = 70, Data = 5515d1aa
|
|
# tb_core.u_sdram32 : at time 36683.0 ns READ : Bank = 2 Row = 353, Col = 71, Data = 0d12031a
|
|
# READ STATUS: Burst-No: 0 Addr: 00161918 Rxd: 5515d1aa
|
|
# tb_core.u_sdram32 : at time 36693.0 ns READ : Bank = 2 Row = 353, Col = 72, Data = 61dbd5c3
|
|
# READ STATUS: Burst-No: 1 Addr: 0016191a Rxd: 0d12031a
|
|
# tb_core.u_sdram32 : at time 36703.0 ns READ : Bank = 2 Row = 353, Col = 73, Data = 5934e9b2
|
|
# tb_core.u_sdram32 : at time 36707.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 0016191c Rxd: 61dbd5c3
|
|
# tb_core.u_sdram32 : at time 36713.0 ns READ : Bank = 2 Row = 353, Col = 74, Data = 0633630c
|
|
# READ STATUS: Burst-No: 3 Addr: 0016191e Rxd: 5934e9b2
|
|
# tb_core.u_sdram32 : at time 36723.0 ns READ : Bank = 2 Row = 353, Col = 75, Data = f4f00ee9
|
|
# READ STATUS: Burst-No: 4 Addr: 00161920 Rxd: 0633630c
|
|
# READ STATUS: Burst-No: 5 Addr: 00161922 Rxd: f4f00ee9
|
|
# tb_core.u_sdram32 : at time 36893.0 ns READ : Bank = 3 Row = 431, Col = 112, Data = 7c2db9f8
|
|
# tb_core.u_sdram32 : at time 36903.0 ns READ : Bank = 3 Row = 431, Col = 113, Data = 792c03f2
|
|
# READ STATUS: Burst-No: 0 Addr: 001afdc3 Rxd: 7c2db9f8
|
|
# tb_core.u_sdram32 : at time 36913.0 ns READ : Bank = 3 Row = 431, Col = 114, Data = 4483ad89
|
|
# READ STATUS: Burst-No: 1 Addr: 001afdc5 Rxd: 792c03f2
|
|
# tb_core.u_sdram32 : at time 36923.0 ns READ : Bank = 3 Row = 431, Col = 115, Data = 378c736f
|
|
# READ STATUS: Burst-No: 2 Addr: 001afdc7 Rxd: 4483ad89
|
|
# tb_core.u_sdram32 : at time 36933.0 ns READ : Bank = 3 Row = 431, Col = 116, Data = 0de14b1b
|
|
# READ STATUS: Burst-No: 3 Addr: 001afdc9 Rxd: 378c736f
|
|
# tb_core.u_sdram32 : at time 36943.0 ns READ : Bank = 3 Row = 431, Col = 117, Data = d6a128ad
|
|
# READ STATUS: Burst-No: 4 Addr: 001afdcb Rxd: 0de14b1b
|
|
# tb_core.u_sdram32 : at time 36953.0 ns READ : Bank = 3 Row = 431, Col = 118, Data = 344dc168
|
|
# READ STATUS: Burst-No: 5 Addr: 001afdcd Rxd: d6a128ad
|
|
# tb_core.u_sdram32 : at time 36963.0 ns READ : Bank = 3 Row = 431, Col = 119, Data = 92f91225
|
|
# READ STATUS: Burst-No: 6 Addr: 001afdcf Rxd: 344dc168
|
|
# tb_core.u_sdram32 : at time 36973.0 ns READ : Bank = 3 Row = 431, Col = 120, Data = 67e857cf
|
|
# READ STATUS: Burst-No: 7 Addr: 001afdd1 Rxd: 92f91225
|
|
# tb_core.u_sdram32 : at time 36983.0 ns READ : Bank = 3 Row = 431, Col = 121, Data = 55dd8dab
|
|
# READ STATUS: Burst-No: 8 Addr: 001afdd3 Rxd: 67e857cf
|
|
# tb_core.u_sdram32 : at time 36993.0 ns READ : Bank = 3 Row = 431, Col = 122, Data = 8d94d21b
|
|
# READ STATUS: Burst-No: 9 Addr: 001afdd5 Rxd: 55dd8dab
|
|
# tb_core.u_sdram32 : at time 37003.0 ns READ : Bank = 3 Row = 431, Col = 123, Data = c03b3e80
|
|
# READ STATUS: Burst-No: 10 Addr: 001afdd7 Rxd: 8d94d21b
|
|
# tb_core.u_sdram32 : at time 37013.0 ns READ : Bank = 3 Row = 431, Col = 124, Data = 2ed6d95d
|
|
# READ STATUS: Burst-No: 11 Addr: 001afdd9 Rxd: c03b3e80
|
|
# tb_core.u_sdram32 : at time 37023.0 ns READ : Bank = 3 Row = 431, Col = 125, Data = 412dfd82
|
|
# READ STATUS: Burst-No: 12 Addr: 001afddb Rxd: 2ed6d95d
|
|
# tb_core.u_sdram32 : at time 37033.0 ns READ : Bank = 3 Row = 431, Col = 126, Data = 82344204
|
|
# READ STATUS: Burst-No: 13 Addr: 001afddd Rxd: 412dfd82
|
|
# tb_core.u_sdram32 : at time 37043.0 ns READ : Bank = 3 Row = 431, Col = 127, Data = 2ba7a557
|
|
# READ STATUS: Burst-No: 14 Addr: 001afddf Rxd: 82344204
|
|
# tb_core.u_sdram32 : at time 37053.0 ns READ : Bank = 3 Row = 431, Col = 128, Data = 1b368b36
|
|
# READ STATUS: Burst-No: 15 Addr: 001afde1 Rxd: 2ba7a557
|
|
# tb_core.u_sdram32 : at time 37063.0 ns READ : Bank = 3 Row = 431, Col = 129, Data = 196a0332
|
|
# READ STATUS: Burst-No: 16 Addr: 001afde3 Rxd: 1b368b36
|
|
# tb_core.u_sdram32 : at time 37073.0 ns READ : Bank = 3 Row = 431, Col = 130, Data = bce32879
|
|
# READ STATUS: Burst-No: 17 Addr: 001afde5 Rxd: 196a0332
|
|
# tb_core.u_sdram32 : at time 37083.0 ns READ : Bank = 3 Row = 431, Col = 131, Data = f24baee4
|
|
# READ STATUS: Burst-No: 18 Addr: 001afde7 Rxd: bce32879
|
|
# tb_core.u_sdram32 : at time 37093.0 ns READ : Bank = 3 Row = 431, Col = 132, Data = 8b42ec16
|
|
# READ STATUS: Burst-No: 19 Addr: 001afde9 Rxd: f24baee4
|
|
# tb_core.u_sdram32 : at time 37103.0 ns READ : Bank = 3 Row = 431, Col = 133, Data = d57fecaa
|
|
# READ STATUS: Burst-No: 20 Addr: 001afdeb Rxd: 8b42ec16
|
|
# tb_core.u_sdram32 : at time 37113.0 ns READ : Bank = 3 Row = 431, Col = 134, Data = 605065c0
|
|
# READ STATUS: Burst-No: 21 Addr: 001afded Rxd: d57fecaa
|
|
# tb_core.u_sdram32 : at time 37123.0 ns READ : Bank = 3 Row = 431, Col = 135, Data = 9759882e
|
|
# READ STATUS: Burst-No: 22 Addr: 001afdef Rxd: 605065c0
|
|
# tb_core.u_sdram32 : at time 37133.0 ns READ : Bank = 3 Row = 431, Col = 136, Data = 4665378c
|
|
# READ STATUS: Burst-No: 23 Addr: 001afdf1 Rxd: 9759882e
|
|
# tb_core.u_sdram32 : at time 37143.0 ns READ : Bank = 3 Row = 431, Col = 137, Data = b8c0c271
|
|
# READ STATUS: Burst-No: 24 Addr: 001afdf3 Rxd: 4665378c
|
|
# tb_core.u_sdram32 : at time 37153.0 ns READ : Bank = 3 Row = 431, Col = 138, Data = 7dfe8ffb
|
|
# READ STATUS: Burst-No: 25 Addr: 001afdf5 Rxd: b8c0c271
|
|
# tb_core.u_sdram32 : at time 37163.0 ns READ : Bank = 3 Row = 431, Col = 139, Data = 5e5421bc
|
|
# READ STATUS: Burst-No: 26 Addr: 001afdf7 Rxd: 7dfe8ffb
|
|
# tb_core.u_sdram32 : at time 37173.0 ns READ : Bank = 3 Row = 431, Col = 140, Data = ee7068dc
|
|
# READ STATUS: Burst-No: 27 Addr: 001afdf9 Rxd: 5e5421bc
|
|
# tb_core.u_sdram32 : at time 37183.0 ns READ : Bank = 3 Row = 431, Col = 141, Data = 0bec5717
|
|
# READ STATUS: Burst-No: 28 Addr: 001afdfb Rxd: ee7068dc
|
|
# tb_core.u_sdram32 : at time 37193.0 ns READ : Bank = 3 Row = 431, Col = 142, Data = e0e004c1
|
|
# READ STATUS: Burst-No: 29 Addr: 001afdfd Rxd: 0bec5717
|
|
# tb_core.u_sdram32 : at time 37203.0 ns READ : Bank = 3 Row = 431, Col = 143, Data = 75fb21eb
|
|
# READ STATUS: Burst-No: 30 Addr: 001afdff Rxd: e0e004c1
|
|
# tb_core.u_sdram32 : at time 37213.0 ns READ : Bank = 3 Row = 431, Col = 144, Data = 5a9d3bb5
|
|
# READ STATUS: Burst-No: 31 Addr: 001afe01 Rxd: 75fb21eb
|
|
# tb_core.u_sdram32 : at time 37223.0 ns READ : Bank = 3 Row = 431, Col = 145, Data = c4fd2e89
|
|
# READ STATUS: Burst-No: 32 Addr: 001afe03 Rxd: 5a9d3bb5
|
|
# tb_core.u_sdram32 : at time 37233.0 ns READ : Bank = 3 Row = 431, Col = 146, Data = c7b2e28f
|
|
# READ STATUS: Burst-No: 33 Addr: 001afe05 Rxd: c4fd2e89
|
|
# tb_core.u_sdram32 : at time 37243.0 ns READ : Bank = 3 Row = 431, Col = 147, Data = dff6f6bf
|
|
# READ STATUS: Burst-No: 34 Addr: 001afe07 Rxd: c7b2e28f
|
|
# tb_core.u_sdram32 : at time 37253.0 ns READ : Bank = 3 Row = 431, Col = 148, Data = d8462ab0
|
|
# READ STATUS: Burst-No: 35 Addr: 001afe09 Rxd: dff6f6bf
|
|
# tb_core.u_sdram32 : at time 37263.0 ns READ : Bank = 3 Row = 431, Col = 149, Data = e9b49ad3
|
|
# READ STATUS: Burst-No: 36 Addr: 001afe0b Rxd: d8462ab0
|
|
# tb_core.u_sdram32 : at time 37273.0 ns READ : Bank = 3 Row = 431, Col = 150, Data = eb1d02d6
|
|
# READ STATUS: Burst-No: 37 Addr: 001afe0d Rxd: e9b49ad3
|
|
# tb_core.u_sdram32 : at time 37283.0 ns READ : Bank = 3 Row = 431, Col = 151, Data = c144cc82
|
|
# READ STATUS: Burst-No: 38 Addr: 001afe0f Rxd: eb1d02d6
|
|
# tb_core.u_sdram32 : at time 37293.0 ns READ : Bank = 3 Row = 431, Col = 152, Data = 0d63751a
|
|
# READ STATUS: Burst-No: 39 Addr: 001afe11 Rxd: c144cc82
|
|
# tb_core.u_sdram32 : at time 37303.0 ns READ : Bank = 3 Row = 431, Col = 153, Data = 38e6a771
|
|
# tb_core.u_sdram32 : at time 37307.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 40 Addr: 001afe13 Rxd: 0d63751a
|
|
# tb_core.u_sdram32 : at time 37313.0 ns READ : Bank = 3 Row = 431, Col = 154, Data = eb8804d7
|
|
# READ STATUS: Burst-No: 41 Addr: 001afe15 Rxd: 38e6a771
|
|
# tb_core.u_sdram32 : at time 37323.0 ns READ : Bank = 3 Row = 431, Col = 155, Data = 87628e0e
|
|
# READ STATUS: Burst-No: 42 Addr: 001afe17 Rxd: eb8804d7
|
|
# READ STATUS: Burst-No: 43 Addr: 001afe19 Rxd: 87628e0e
|
|
# Write Address: 000714f1, Burst Size: 14
|
|
# tb_core.u_sdram32 : at time 37497.0 ns ACT : Bank = 1 Row = 113
|
|
# tb_core.u_sdram32 : at time 37527.0 ns WRITE: Bank = 1 Row = 113, Col = 60, Data = 02bd4305
|
|
# Status: Burst-No: 0 Write Address: 000714f1 WriteData: 02bd4305
|
|
# tb_core.u_sdram32 : at time 37537.0 ns WRITE: Bank = 1 Row = 113, Col = 61, Data = 0e3aeb1c
|
|
# Status: Burst-No: 1 Write Address: 000714f1 WriteData: 0e3aeb1c
|
|
# tb_core.u_sdram32 : at time 37547.0 ns WRITE: Bank = 1 Row = 113, Col = 62, Data = 4c18c798
|
|
# Status: Burst-No: 2 Write Address: 000714f1 WriteData: 4c18c798
|
|
# tb_core.u_sdram32 : at time 37557.0 ns WRITE: Bank = 1 Row = 113, Col = 63, Data = f67088ec
|
|
# Status: Burst-No: 3 Write Address: 000714f1 WriteData: f67088ec
|
|
# tb_core.u_sdram32 : at time 37567.0 ns WRITE: Bank = 1 Row = 113, Col = 64, Data = 9541d62a
|
|
# Status: Burst-No: 4 Write Address: 000714f1 WriteData: 9541d62a
|
|
# tb_core.u_sdram32 : at time 37577.0 ns WRITE: Bank = 1 Row = 113, Col = 65, Data = b2d14a65
|
|
# Status: Burst-No: 5 Write Address: 000714f1 WriteData: b2d14a65
|
|
# tb_core.u_sdram32 : at time 37587.0 ns WRITE: Bank = 1 Row = 113, Col = 66, Data = 1b920537
|
|
# Status: Burst-No: 6 Write Address: 000714f1 WriteData: 1b920537
|
|
# tb_core.u_sdram32 : at time 37597.0 ns WRITE: Bank = 1 Row = 113, Col = 67, Data = 81fa3603
|
|
# Status: Burst-No: 7 Write Address: 000714f1 WriteData: 81fa3603
|
|
# tb_core.u_sdram32 : at time 37607.0 ns WRITE: Bank = 1 Row = 113, Col = 68, Data = ff729efe
|
|
# Status: Burst-No: 8 Write Address: 000714f1 WriteData: ff729efe
|
|
# tb_core.u_sdram32 : at time 37617.0 ns WRITE: Bank = 1 Row = 113, Col = 69, Data = feaddcfd
|
|
# Status: Burst-No: 9 Write Address: 000714f1 WriteData: feaddcfd
|
|
# tb_core.u_sdram32 : at time 37627.0 ns WRITE: Bank = 1 Row = 113, Col = 70, Data = 9f7a0e3e
|
|
# Status: Burst-No: 10 Write Address: 000714f1 WriteData: 9f7a0e3e
|
|
# tb_core.u_sdram32 : at time 37637.0 ns WRITE: Bank = 1 Row = 113, Col = 71, Data = f43a34e8
|
|
# Status: Burst-No: 11 Write Address: 000714f1 WriteData: f43a34e8
|
|
# tb_core.u_sdram32 : at time 37647.0 ns WRITE: Bank = 1 Row = 113, Col = 72, Data = ba603874
|
|
# Status: Burst-No: 12 Write Address: 000714f1 WriteData: ba603874
|
|
# tb_core.u_sdram32 : at time 37657.0 ns WRITE: Bank = 1 Row = 113, Col = 73, Data = 580989b0
|
|
# Status: Burst-No: 13 Write Address: 000714f1 WriteData: 580989b0
|
|
# tb_core.u_sdram32 : at time 37667.0 ns BST : Burst Terminate
|
|
# Write Address: 0021dc06, Burst Size: 19
|
|
# tb_core.u_sdram32 : at time 37807.0 ns ACT : Bank = 3 Row = 541
|
|
# tb_core.u_sdram32 : at time 37837.0 ns WRITE: Bank = 3 Row = 541, Col = 1, Data = b46afc68
|
|
# Status: Burst-No: 0 Write Address: 0021dc06 WriteData: b46afc68
|
|
# tb_core.u_sdram32 : at time 37847.0 ns WRITE: Bank = 3 Row = 541, Col = 2, Data = e2ba00c5
|
|
# Status: Burst-No: 1 Write Address: 0021dc06 WriteData: e2ba00c5
|
|
# tb_core.u_sdram32 : at time 37857.0 ns WRITE: Bank = 3 Row = 541, Col = 3, Data = ff202efe
|
|
# Status: Burst-No: 2 Write Address: 0021dc06 WriteData: ff202efe
|
|
# tb_core.u_sdram32 : at time 37867.0 ns WRITE: Bank = 3 Row = 541, Col = 4, Data = 1b0f0d36
|
|
# Status: Burst-No: 3 Write Address: 0021dc06 WriteData: 1b0f0d36
|
|
# tb_core.u_sdram32 : at time 37877.0 ns WRITE: Bank = 3 Row = 541, Col = 5, Data = 799f09f3
|
|
# Status: Burst-No: 4 Write Address: 0021dc06 WriteData: 799f09f3
|
|
# tb_core.u_sdram32 : at time 37887.0 ns WRITE: Bank = 3 Row = 541, Col = 6, Data = 7dddabfb
|
|
# Status: Burst-No: 5 Write Address: 0021dc06 WriteData: 7dddabfb
|
|
# tb_core.u_sdram32 : at time 37897.0 ns WRITE: Bank = 3 Row = 541, Col = 7, Data = b58d7c6b
|
|
# Status: Burst-No: 6 Write Address: 0021dc06 WriteData: b58d7c6b
|
|
# tb_core.u_sdram32 : at time 37907.0 ns WRITE: Bank = 3 Row = 541, Col = 8, Data = 0bcbbf17
|
|
# Status: Burst-No: 7 Write Address: 0021dc06 WriteData: 0bcbbf17
|
|
# tb_core.u_sdram32 : at time 37917.0 ns WRITE: Bank = 3 Row = 541, Col = 9, Data = 87d0360f
|
|
# Status: Burst-No: 8 Write Address: 0021dc06 WriteData: 87d0360f
|
|
# tb_core.u_sdram32 : at time 37927.0 ns WRITE: Bank = 3 Row = 541, Col = 10, Data = 8a47b614
|
|
# Status: Burst-No: 9 Write Address: 0021dc06 WriteData: 8a47b614
|
|
# tb_core.u_sdram32 : at time 37937.0 ns WRITE: Bank = 3 Row = 541, Col = 11, Data = 1500052a
|
|
# Status: Burst-No: 10 Write Address: 0021dc06 WriteData: 1500052a
|
|
# tb_core.u_sdram32 : at time 37947.0 ns WRITE: Bank = 3 Row = 541, Col = 12, Data = d3666ea6
|
|
# Status: Burst-No: 11 Write Address: 0021dc06 WriteData: d3666ea6
|
|
# tb_core.u_sdram32 : at time 37957.0 ns WRITE: Bank = 3 Row = 541, Col = 13, Data = ea7626d4
|
|
# Status: Burst-No: 12 Write Address: 0021dc06 WriteData: ea7626d4
|
|
# tb_core.u_sdram32 : at time 37967.0 ns WRITE: Bank = 3 Row = 541, Col = 14, Data = e5ac10cb
|
|
# Status: Burst-No: 13 Write Address: 0021dc06 WriteData: e5ac10cb
|
|
# tb_core.u_sdram32 : at time 37977.0 ns WRITE: Bank = 3 Row = 541, Col = 15, Data = b587c26b
|
|
# Status: Burst-No: 14 Write Address: 0021dc06 WriteData: b587c26b
|
|
# tb_core.u_sdram32 : at time 37987.0 ns WRITE: Bank = 3 Row = 541, Col = 16, Data = 0277eb04
|
|
# Status: Burst-No: 15 Write Address: 0021dc06 WriteData: 0277eb04
|
|
# tb_core.u_sdram32 : at time 37997.0 ns WRITE: Bank = 3 Row = 541, Col = 17, Data = fa4832f4
|
|
# Status: Burst-No: 16 Write Address: 0021dc06 WriteData: fa4832f4
|
|
# tb_core.u_sdram32 : at time 38007.0 ns WRITE: Bank = 3 Row = 541, Col = 18, Data = 468b618d
|
|
# Status: Burst-No: 17 Write Address: 0021dc06 WriteData: 468b618d
|
|
# tb_core.u_sdram32 : at time 38017.0 ns WRITE: Bank = 3 Row = 541, Col = 19, Data = f0ea70e1
|
|
# Status: Burst-No: 18 Write Address: 0021dc06 WriteData: f0ea70e1
|
|
# tb_core.u_sdram32 : at time 38027.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 38163.0 ns READ : Bank = 1 Row = 113, Col = 60, Data = 02bd4305
|
|
# tb_core.u_sdram32 : at time 38173.0 ns READ : Bank = 1 Row = 113, Col = 61, Data = 0e3aeb1c
|
|
# READ STATUS: Burst-No: 0 Addr: 000714f1 Rxd: 02bd4305
|
|
# tb_core.u_sdram32 : at time 38183.0 ns READ : Bank = 1 Row = 113, Col = 62, Data = 4c18c798
|
|
# READ STATUS: Burst-No: 1 Addr: 000714f3 Rxd: 0e3aeb1c
|
|
# tb_core.u_sdram32 : at time 38193.0 ns READ : Bank = 1 Row = 113, Col = 63, Data = f67088ec
|
|
# READ STATUS: Burst-No: 2 Addr: 000714f5 Rxd: 4c18c798
|
|
# tb_core.u_sdram32 : at time 38203.0 ns READ : Bank = 1 Row = 113, Col = 64, Data = 9541d62a
|
|
# READ STATUS: Burst-No: 3 Addr: 000714f7 Rxd: f67088ec
|
|
# tb_core.u_sdram32 : at time 38213.0 ns READ : Bank = 1 Row = 113, Col = 65, Data = b2d14a65
|
|
# READ STATUS: Burst-No: 4 Addr: 000714f9 Rxd: 9541d62a
|
|
# tb_core.u_sdram32 : at time 38223.0 ns READ : Bank = 1 Row = 113, Col = 66, Data = 1b920537
|
|
# READ STATUS: Burst-No: 5 Addr: 000714fb Rxd: b2d14a65
|
|
# tb_core.u_sdram32 : at time 38233.0 ns READ : Bank = 1 Row = 113, Col = 67, Data = 81fa3603
|
|
# READ STATUS: Burst-No: 6 Addr: 000714fd Rxd: 1b920537
|
|
# tb_core.u_sdram32 : at time 38243.0 ns READ : Bank = 1 Row = 113, Col = 68, Data = ff729efe
|
|
# READ STATUS: Burst-No: 7 Addr: 000714ff Rxd: 81fa3603
|
|
# tb_core.u_sdram32 : at time 38253.0 ns READ : Bank = 1 Row = 113, Col = 69, Data = feaddcfd
|
|
# READ STATUS: Burst-No: 8 Addr: 00071501 Rxd: ff729efe
|
|
# tb_core.u_sdram32 : at time 38263.0 ns READ : Bank = 1 Row = 113, Col = 70, Data = 9f7a0e3e
|
|
# READ STATUS: Burst-No: 9 Addr: 00071503 Rxd: feaddcfd
|
|
# tb_core.u_sdram32 : at time 38273.0 ns READ : Bank = 1 Row = 113, Col = 71, Data = f43a34e8
|
|
# tb_core.u_sdram32 : at time 38277.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 10 Addr: 00071505 Rxd: 9f7a0e3e
|
|
# tb_core.u_sdram32 : at time 38283.0 ns READ : Bank = 1 Row = 113, Col = 72, Data = ba603874
|
|
# READ STATUS: Burst-No: 11 Addr: 00071507 Rxd: f43a34e8
|
|
# tb_core.u_sdram32 : at time 38293.0 ns READ : Bank = 1 Row = 113, Col = 73, Data = 580989b0
|
|
# READ STATUS: Burst-No: 12 Addr: 00071509 Rxd: ba603874
|
|
# READ STATUS: Burst-No: 13 Addr: 0007150b Rxd: 580989b0
|
|
# tb_core.u_sdram32 : at time 38463.0 ns READ : Bank = 3 Row = 541, Col = 1, Data = b46afc68
|
|
# tb_core.u_sdram32 : at time 38473.0 ns READ : Bank = 3 Row = 541, Col = 2, Data = e2ba00c5
|
|
# READ STATUS: Burst-No: 0 Addr: 0021dc06 Rxd: b46afc68
|
|
# tb_core.u_sdram32 : at time 38483.0 ns READ : Bank = 3 Row = 541, Col = 3, Data = ff202efe
|
|
# READ STATUS: Burst-No: 1 Addr: 0021dc08 Rxd: e2ba00c5
|
|
# tb_core.u_sdram32 : at time 38493.0 ns READ : Bank = 3 Row = 541, Col = 4, Data = 1b0f0d36
|
|
# READ STATUS: Burst-No: 2 Addr: 0021dc0a Rxd: ff202efe
|
|
# tb_core.u_sdram32 : at time 38503.0 ns READ : Bank = 3 Row = 541, Col = 5, Data = 799f09f3
|
|
# READ STATUS: Burst-No: 3 Addr: 0021dc0c Rxd: 1b0f0d36
|
|
# tb_core.u_sdram32 : at time 38513.0 ns READ : Bank = 3 Row = 541, Col = 6, Data = 7dddabfb
|
|
# READ STATUS: Burst-No: 4 Addr: 0021dc0e Rxd: 799f09f3
|
|
# tb_core.u_sdram32 : at time 38523.0 ns READ : Bank = 3 Row = 541, Col = 7, Data = b58d7c6b
|
|
# READ STATUS: Burst-No: 5 Addr: 0021dc10 Rxd: 7dddabfb
|
|
# tb_core.u_sdram32 : at time 38533.0 ns READ : Bank = 3 Row = 541, Col = 8, Data = 0bcbbf17
|
|
# READ STATUS: Burst-No: 6 Addr: 0021dc12 Rxd: b58d7c6b
|
|
# tb_core.u_sdram32 : at time 38543.0 ns READ : Bank = 3 Row = 541, Col = 9, Data = 87d0360f
|
|
# READ STATUS: Burst-No: 7 Addr: 0021dc14 Rxd: 0bcbbf17
|
|
# tb_core.u_sdram32 : at time 38553.0 ns READ : Bank = 3 Row = 541, Col = 10, Data = 8a47b614
|
|
# READ STATUS: Burst-No: 8 Addr: 0021dc16 Rxd: 87d0360f
|
|
# tb_core.u_sdram32 : at time 38563.0 ns READ : Bank = 3 Row = 541, Col = 11, Data = 1500052a
|
|
# READ STATUS: Burst-No: 9 Addr: 0021dc18 Rxd: 8a47b614
|
|
# tb_core.u_sdram32 : at time 38573.0 ns READ : Bank = 3 Row = 541, Col = 12, Data = d3666ea6
|
|
# READ STATUS: Burst-No: 10 Addr: 0021dc1a Rxd: 1500052a
|
|
# tb_core.u_sdram32 : at time 38583.0 ns READ : Bank = 3 Row = 541, Col = 13, Data = ea7626d4
|
|
# READ STATUS: Burst-No: 11 Addr: 0021dc1c Rxd: d3666ea6
|
|
# tb_core.u_sdram32 : at time 38593.0 ns READ : Bank = 3 Row = 541, Col = 14, Data = e5ac10cb
|
|
# READ STATUS: Burst-No: 12 Addr: 0021dc1e Rxd: ea7626d4
|
|
# tb_core.u_sdram32 : at time 38603.0 ns READ : Bank = 3 Row = 541, Col = 15, Data = b587c26b
|
|
# READ STATUS: Burst-No: 13 Addr: 0021dc20 Rxd: e5ac10cb
|
|
# tb_core.u_sdram32 : at time 38613.0 ns READ : Bank = 3 Row = 541, Col = 16, Data = 0277eb04
|
|
# READ STATUS: Burst-No: 14 Addr: 0021dc22 Rxd: b587c26b
|
|
# tb_core.u_sdram32 : at time 38623.0 ns READ : Bank = 3 Row = 541, Col = 17, Data = fa4832f4
|
|
# tb_core.u_sdram32 : at time 38627.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 15 Addr: 0021dc24 Rxd: 0277eb04
|
|
# tb_core.u_sdram32 : at time 38633.0 ns READ : Bank = 3 Row = 541, Col = 18, Data = 468b618d
|
|
# READ STATUS: Burst-No: 16 Addr: 0021dc26 Rxd: fa4832f4
|
|
# tb_core.u_sdram32 : at time 38643.0 ns READ : Bank = 3 Row = 541, Col = 19, Data = f0ea70e1
|
|
# READ STATUS: Burst-No: 17 Addr: 0021dc28 Rxd: 468b618d
|
|
# READ STATUS: Burst-No: 18 Addr: 0021dc2a Rxd: f0ea70e1
|
|
# Write Address: 0023bd85, Burst Size: 58
|
|
# tb_core.u_sdram32 : at time 38817.0 ns ACT : Bank = 3 Row = 571
|
|
# tb_core.u_sdram32 : at time 38847.0 ns WRITE: Bank = 3 Row = 571, Col = 97, Data = e4df16c9
|
|
# Status: Burst-No: 0 Write Address: 0023bd85 WriteData: e4df16c9
|
|
# tb_core.u_sdram32 : at time 38857.0 ns WRITE: Bank = 3 Row = 571, Col = 98, Data = b05f8e60
|
|
# Status: Burst-No: 1 Write Address: 0023bd85 WriteData: b05f8e60
|
|
# tb_core.u_sdram32 : at time 38867.0 ns WRITE: Bank = 3 Row = 571, Col = 99, Data = a3643246
|
|
# Status: Burst-No: 2 Write Address: 0023bd85 WriteData: a3643246
|
|
# tb_core.u_sdram32 : at time 38877.0 ns WRITE: Bank = 3 Row = 571, Col = 100, Data = 1e74cb3c
|
|
# Status: Burst-No: 3 Write Address: 0023bd85 WriteData: 1e74cb3c
|
|
# tb_core.u_sdram32 : at time 38887.0 ns WRITE: Bank = 3 Row = 571, Col = 101, Data = 1b855f37
|
|
# Status: Burst-No: 4 Write Address: 0023bd85 WriteData: 1b855f37
|
|
# tb_core.u_sdram32 : at time 38897.0 ns WRITE: Bank = 3 Row = 571, Col = 102, Data = 2c0c5558
|
|
# Status: Burst-No: 5 Write Address: 0023bd85 WriteData: 2c0c5558
|
|
# tb_core.u_sdram32 : at time 38907.0 ns WRITE: Bank = 3 Row = 571, Col = 103, Data = 39d65773
|
|
# Status: Burst-No: 6 Write Address: 0023bd85 WriteData: 39d65773
|
|
# tb_core.u_sdram32 : at time 38917.0 ns WRITE: Bank = 3 Row = 571, Col = 104, Data = 8778d20e
|
|
# Status: Burst-No: 7 Write Address: 0023bd85 WriteData: 8778d20e
|
|
# tb_core.u_sdram32 : at time 38927.0 ns WRITE: Bank = 3 Row = 571, Col = 105, Data = 6e6d23dc
|
|
# Status: Burst-No: 8 Write Address: 0023bd85 WriteData: 6e6d23dc
|
|
# tb_core.u_sdram32 : at time 38937.0 ns WRITE: Bank = 3 Row = 571, Col = 106, Data = 183fc330
|
|
# Status: Burst-No: 9 Write Address: 0023bd85 WriteData: 183fc330
|
|
# tb_core.u_sdram32 : at time 38947.0 ns WRITE: Bank = 3 Row = 571, Col = 107, Data = 6845f5d0
|
|
# Status: Burst-No: 10 Write Address: 0023bd85 WriteData: 6845f5d0
|
|
# tb_core.u_sdram32 : at time 38957.0 ns WRITE: Bank = 3 Row = 571, Col = 108, Data = 0073e500
|
|
# Status: Burst-No: 11 Write Address: 0023bd85 WriteData: 0073e500
|
|
# tb_core.u_sdram32 : at time 38967.0 ns WRITE: Bank = 3 Row = 571, Col = 109, Data = 21820f43
|
|
# Status: Burst-No: 12 Write Address: 0023bd85 WriteData: 21820f43
|
|
# tb_core.u_sdram32 : at time 38977.0 ns WRITE: Bank = 3 Row = 571, Col = 110, Data = 7c6e91f8
|
|
# Status: Burst-No: 13 Write Address: 0023bd85 WriteData: 7c6e91f8
|
|
# tb_core.u_sdram32 : at time 38987.0 ns WRITE: Bank = 3 Row = 571, Col = 111, Data = d0b99aa1
|
|
# Status: Burst-No: 14 Write Address: 0023bd85 WriteData: d0b99aa1
|
|
# tb_core.u_sdram32 : at time 38997.0 ns WRITE: Bank = 3 Row = 571, Col = 112, Data = 29c01f53
|
|
# Status: Burst-No: 15 Write Address: 0023bd85 WriteData: 29c01f53
|
|
# tb_core.u_sdram32 : at time 39007.0 ns WRITE: Bank = 3 Row = 571, Col = 113, Data = 4c588f98
|
|
# Status: Burst-No: 16 Write Address: 0023bd85 WriteData: 4c588f98
|
|
# tb_core.u_sdram32 : at time 39017.0 ns WRITE: Bank = 3 Row = 571, Col = 114, Data = 2fef3d5f
|
|
# Status: Burst-No: 17 Write Address: 0023bd85 WriteData: 2fef3d5f
|
|
# tb_core.u_sdram32 : at time 39027.0 ns WRITE: Bank = 3 Row = 571, Col = 115, Data = c3be9287
|
|
# Status: Burst-No: 18 Write Address: 0023bd85 WriteData: c3be9287
|
|
# tb_core.u_sdram32 : at time 39037.0 ns WRITE: Bank = 3 Row = 571, Col = 116, Data = fd5f5afa
|
|
# Status: Burst-No: 19 Write Address: 0023bd85 WriteData: fd5f5afa
|
|
# tb_core.u_sdram32 : at time 39047.0 ns WRITE: Bank = 3 Row = 571, Col = 117, Data = 1699d12d
|
|
# Status: Burst-No: 20 Write Address: 0023bd85 WriteData: 1699d12d
|
|
# tb_core.u_sdram32 : at time 39057.0 ns WRITE: Bank = 3 Row = 571, Col = 118, Data = b8760270
|
|
# Status: Burst-No: 21 Write Address: 0023bd85 WriteData: b8760270
|
|
# tb_core.u_sdram32 : at time 39067.0 ns WRITE: Bank = 3 Row = 571, Col = 119, Data = b5b4e86b
|
|
# Status: Burst-No: 22 Write Address: 0023bd85 WriteData: b5b4e86b
|
|
# tb_core.u_sdram32 : at time 39077.0 ns WRITE: Bank = 3 Row = 571, Col = 120, Data = 98d73831
|
|
# Status: Burst-No: 23 Write Address: 0023bd85 WriteData: 98d73831
|
|
# tb_core.u_sdram32 : at time 39087.0 ns WRITE: Bank = 3 Row = 571, Col = 121, Data = 892fc012
|
|
# Status: Burst-No: 24 Write Address: 0023bd85 WriteData: 892fc012
|
|
# tb_core.u_sdram32 : at time 39097.0 ns WRITE: Bank = 3 Row = 571, Col = 122, Data = 0650df0c
|
|
# Status: Burst-No: 25 Write Address: 0023bd85 WriteData: 0650df0c
|
|
# tb_core.u_sdram32 : at time 39107.0 ns WRITE: Bank = 3 Row = 571, Col = 123, Data = 06db6b0d
|
|
# Status: Burst-No: 26 Write Address: 0023bd85 WriteData: 06db6b0d
|
|
# tb_core.u_sdram32 : at time 39117.0 ns WRITE: Bank = 3 Row = 571, Col = 124, Data = 0acd1315
|
|
# Status: Burst-No: 27 Write Address: 0023bd85 WriteData: 0acd1315
|
|
# tb_core.u_sdram32 : at time 39127.0 ns WRITE: Bank = 3 Row = 571, Col = 125, Data = 20310740
|
|
# Status: Burst-No: 28 Write Address: 0023bd85 WriteData: 20310740
|
|
# tb_core.u_sdram32 : at time 39137.0 ns WRITE: Bank = 3 Row = 571, Col = 126, Data = 4a638d94
|
|
# Status: Burst-No: 29 Write Address: 0023bd85 WriteData: 4a638d94
|
|
# tb_core.u_sdram32 : at time 39147.0 ns WRITE: Bank = 3 Row = 571, Col = 127, Data = 2a1ba354
|
|
# Status: Burst-No: 30 Write Address: 0023bd85 WriteData: 2a1ba354
|
|
# tb_core.u_sdram32 : at time 39157.0 ns WRITE: Bank = 3 Row = 571, Col = 128, Data = c0620280
|
|
# Status: Burst-No: 31 Write Address: 0023bd85 WriteData: c0620280
|
|
# tb_core.u_sdram32 : at time 39167.0 ns WRITE: Bank = 3 Row = 571, Col = 129, Data = 098d1513
|
|
# Status: Burst-No: 32 Write Address: 0023bd85 WriteData: 098d1513
|
|
# tb_core.u_sdram32 : at time 39177.0 ns WRITE: Bank = 3 Row = 571, Col = 130, Data = e1e386c3
|
|
# Status: Burst-No: 33 Write Address: 0023bd85 WriteData: e1e386c3
|
|
# tb_core.u_sdram32 : at time 39187.0 ns WRITE: Bank = 3 Row = 571, Col = 131, Data = f695deed
|
|
# Status: Burst-No: 34 Write Address: 0023bd85 WriteData: f695deed
|
|
# tb_core.u_sdram32 : at time 39197.0 ns WRITE: Bank = 3 Row = 571, Col = 132, Data = ee4ee6dc
|
|
# Status: Burst-No: 35 Write Address: 0023bd85 WriteData: ee4ee6dc
|
|
# tb_core.u_sdram32 : at time 39207.0 ns WRITE: Bank = 3 Row = 571, Col = 133, Data = bc781078
|
|
# Status: Burst-No: 36 Write Address: 0023bd85 WriteData: bc781078
|
|
# tb_core.u_sdram32 : at time 39217.0 ns WRITE: Bank = 3 Row = 571, Col = 134, Data = 13d40d27
|
|
# Status: Burst-No: 37 Write Address: 0023bd85 WriteData: 13d40d27
|
|
# tb_core.u_sdram32 : at time 39227.0 ns WRITE: Bank = 3 Row = 571, Col = 135, Data = afed265f
|
|
# Status: Burst-No: 38 Write Address: 0023bd85 WriteData: afed265f
|
|
# tb_core.u_sdram32 : at time 39237.0 ns WRITE: Bank = 3 Row = 571, Col = 136, Data = 11c05b23
|
|
# Status: Burst-No: 39 Write Address: 0023bd85 WriteData: 11c05b23
|
|
# tb_core.u_sdram32 : at time 39247.0 ns WRITE: Bank = 3 Row = 571, Col = 137, Data = 5596ebab
|
|
# Status: Burst-No: 40 Write Address: 0023bd85 WriteData: 5596ebab
|
|
# tb_core.u_sdram32 : at time 39257.0 ns WRITE: Bank = 3 Row = 571, Col = 138, Data = 1c421738
|
|
# Status: Burst-No: 41 Write Address: 0023bd85 WriteData: 1c421738
|
|
# tb_core.u_sdram32 : at time 39267.0 ns WRITE: Bank = 3 Row = 571, Col = 139, Data = 11534d22
|
|
# Status: Burst-No: 42 Write Address: 0023bd85 WriteData: 11534d22
|
|
# tb_core.u_sdram32 : at time 39277.0 ns WRITE: Bank = 3 Row = 571, Col = 140, Data = 64f2bdc9
|
|
# Status: Burst-No: 43 Write Address: 0023bd85 WriteData: 64f2bdc9
|
|
# tb_core.u_sdram32 : at time 39287.0 ns WRITE: Bank = 3 Row = 571, Col = 141, Data = e3eb4cc7
|
|
# Status: Burst-No: 44 Write Address: 0023bd85 WriteData: e3eb4cc7
|
|
# tb_core.u_sdram32 : at time 39297.0 ns WRITE: Bank = 3 Row = 571, Col = 142, Data = c1406282
|
|
# Status: Burst-No: 45 Write Address: 0023bd85 WriteData: c1406282
|
|
# tb_core.u_sdram32 : at time 39307.0 ns WRITE: Bank = 3 Row = 571, Col = 143, Data = 6754d7ce
|
|
# Status: Burst-No: 46 Write Address: 0023bd85 WriteData: 6754d7ce
|
|
# tb_core.u_sdram32 : at time 39317.0 ns WRITE: Bank = 3 Row = 571, Col = 144, Data = e38e22c7
|
|
# Status: Burst-No: 47 Write Address: 0023bd85 WriteData: e38e22c7
|
|
# tb_core.u_sdram32 : at time 39327.0 ns WRITE: Bank = 3 Row = 571, Col = 145, Data = 927fa424
|
|
# Status: Burst-No: 48 Write Address: 0023bd85 WriteData: 927fa424
|
|
# tb_core.u_sdram32 : at time 39337.0 ns WRITE: Bank = 3 Row = 571, Col = 146, Data = 6da36fdb
|
|
# Status: Burst-No: 49 Write Address: 0023bd85 WriteData: 6da36fdb
|
|
# tb_core.u_sdram32 : at time 39347.0 ns WRITE: Bank = 3 Row = 571, Col = 147, Data = 84651408
|
|
# Status: Burst-No: 50 Write Address: 0023bd85 WriteData: 84651408
|
|
# tb_core.u_sdram32 : at time 39357.0 ns WRITE: Bank = 3 Row = 571, Col = 148, Data = 3ac26f75
|
|
# Status: Burst-No: 51 Write Address: 0023bd85 WriteData: 3ac26f75
|
|
# tb_core.u_sdram32 : at time 39367.0 ns WRITE: Bank = 3 Row = 571, Col = 149, Data = 5ad31db5
|
|
# Status: Burst-No: 52 Write Address: 0023bd85 WriteData: 5ad31db5
|
|
# tb_core.u_sdram32 : at time 39377.0 ns WRITE: Bank = 3 Row = 571, Col = 150, Data = 8d7d721a
|
|
# Status: Burst-No: 53 Write Address: 0023bd85 WriteData: 8d7d721a
|
|
# tb_core.u_sdram32 : at time 39387.0 ns WRITE: Bank = 3 Row = 571, Col = 151, Data = 1c2a1338
|
|
# Status: Burst-No: 54 Write Address: 0023bd85 WriteData: 1c2a1338
|
|
# tb_core.u_sdram32 : at time 39397.0 ns WRITE: Bank = 3 Row = 571, Col = 152, Data = c1233a82
|
|
# Status: Burst-No: 55 Write Address: 0023bd85 WriteData: c1233a82
|
|
# tb_core.u_sdram32 : at time 39407.0 ns WRITE: Bank = 3 Row = 571, Col = 153, Data = ac05a058
|
|
# Status: Burst-No: 56 Write Address: 0023bd85 WriteData: ac05a058
|
|
# tb_core.u_sdram32 : at time 39417.0 ns WRITE: Bank = 3 Row = 571, Col = 154, Data = a85a6a50
|
|
# Status: Burst-No: 57 Write Address: 0023bd85 WriteData: a85a6a50
|
|
# tb_core.u_sdram32 : at time 39427.0 ns BST : Burst Terminate
|
|
# Write Address: 00089aa3, Burst Size: 37
|
|
# tb_core.u_sdram32 : at time 39567.0 ns ACT : Bank = 2 Row = 137
|
|
# tb_core.u_sdram32 : at time 39597.0 ns WRITE: Bank = 2 Row = 137, Col = 168, Data = 32c3df65
|
|
# Status: Burst-No: 0 Write Address: 00089aa3 WriteData: 32c3df65
|
|
# tb_core.u_sdram32 : at time 39607.0 ns WRITE: Bank = 2 Row = 137, Col = 169, Data = 753c17ea
|
|
# Status: Burst-No: 1 Write Address: 00089aa3 WriteData: 753c17ea
|
|
# tb_core.u_sdram32 : at time 39617.0 ns WRITE: Bank = 2 Row = 137, Col = 170, Data = 03703906
|
|
# Status: Burst-No: 2 Write Address: 00089aa3 WriteData: 03703906
|
|
# tb_core.u_sdram32 : at time 39627.0 ns WRITE: Bank = 2 Row = 137, Col = 171, Data = aa138054
|
|
# Status: Burst-No: 3 Write Address: 00089aa3 WriteData: aa138054
|
|
# tb_core.u_sdram32 : at time 39637.0 ns WRITE: Bank = 2 Row = 137, Col = 172, Data = adf3405b
|
|
# Status: Burst-No: 4 Write Address: 00089aa3 WriteData: adf3405b
|
|
# tb_core.u_sdram32 : at time 39647.0 ns WRITE: Bank = 2 Row = 137, Col = 173, Data = e455f0c8
|
|
# Status: Burst-No: 5 Write Address: 00089aa3 WriteData: e455f0c8
|
|
# tb_core.u_sdram32 : at time 39657.0 ns WRITE: Bank = 2 Row = 137, Col = 174, Data = 24673948
|
|
# Status: Burst-No: 6 Write Address: 00089aa3 WriteData: 24673948
|
|
# tb_core.u_sdram32 : at time 39667.0 ns WRITE: Bank = 2 Row = 137, Col = 175, Data = 9bf8f237
|
|
# Status: Burst-No: 7 Write Address: 00089aa3 WriteData: 9bf8f237
|
|
# tb_core.u_sdram32 : at time 39677.0 ns WRITE: Bank = 2 Row = 137, Col = 176, Data = 7c1df3f8
|
|
# Status: Burst-No: 8 Write Address: 00089aa3 WriteData: 7c1df3f8
|
|
# tb_core.u_sdram32 : at time 39687.0 ns WRITE: Bank = 2 Row = 137, Col = 177, Data = da8932b5
|
|
# Status: Burst-No: 9 Write Address: 00089aa3 WriteData: da8932b5
|
|
# tb_core.u_sdram32 : at time 39697.0 ns WRITE: Bank = 2 Row = 137, Col = 178, Data = 28d6a951
|
|
# Status: Burst-No: 10 Write Address: 00089aa3 WriteData: 28d6a951
|
|
# tb_core.u_sdram32 : at time 39707.0 ns WRITE: Bank = 2 Row = 137, Col = 179, Data = 41aed583
|
|
# Status: Burst-No: 11 Write Address: 00089aa3 WriteData: 41aed583
|
|
# tb_core.u_sdram32 : at time 39717.0 ns WRITE: Bank = 2 Row = 137, Col = 180, Data = 4d9ee39b
|
|
# Status: Burst-No: 12 Write Address: 00089aa3 WriteData: 4d9ee39b
|
|
# tb_core.u_sdram32 : at time 39727.0 ns WRITE: Bank = 2 Row = 137, Col = 181, Data = 1aa0dd35
|
|
# Status: Burst-No: 13 Write Address: 00089aa3 WriteData: 1aa0dd35
|
|
# tb_core.u_sdram32 : at time 39737.0 ns WRITE: Bank = 2 Row = 137, Col = 182, Data = 581653b0
|
|
# Status: Burst-No: 14 Write Address: 00089aa3 WriteData: 581653b0
|
|
# tb_core.u_sdram32 : at time 39747.0 ns WRITE: Bank = 2 Row = 137, Col = 183, Data = fddf82fb
|
|
# Status: Burst-No: 15 Write Address: 00089aa3 WriteData: fddf82fb
|
|
# tb_core.u_sdram32 : at time 39757.0 ns WRITE: Bank = 2 Row = 137, Col = 184, Data = 278dbb4f
|
|
# Status: Burst-No: 16 Write Address: 00089aa3 WriteData: 278dbb4f
|
|
# tb_core.u_sdram32 : at time 39767.0 ns WRITE: Bank = 2 Row = 137, Col = 185, Data = 984da630
|
|
# Status: Burst-No: 17 Write Address: 00089aa3 WriteData: 984da630
|
|
# tb_core.u_sdram32 : at time 39777.0 ns WRITE: Bank = 2 Row = 137, Col = 186, Data = 8c38c418
|
|
# Status: Burst-No: 18 Write Address: 00089aa3 WriteData: 8c38c418
|
|
# tb_core.u_sdram32 : at time 39787.0 ns WRITE: Bank = 2 Row = 137, Col = 187, Data = ee8118dd
|
|
# Status: Burst-No: 19 Write Address: 00089aa3 WriteData: ee8118dd
|
|
# tb_core.u_sdram32 : at time 39797.0 ns WRITE: Bank = 2 Row = 137, Col = 188, Data = a36ae846
|
|
# Status: Burst-No: 20 Write Address: 00089aa3 WriteData: a36ae846
|
|
# tb_core.u_sdram32 : at time 39807.0 ns WRITE: Bank = 2 Row = 137, Col = 189, Data = 30e20f61
|
|
# Status: Burst-No: 21 Write Address: 00089aa3 WriteData: 30e20f61
|
|
# tb_core.u_sdram32 : at time 39817.0 ns WRITE: Bank = 2 Row = 137, Col = 190, Data = ac974859
|
|
# Status: Burst-No: 22 Write Address: 00089aa3 WriteData: ac974859
|
|
# tb_core.u_sdram32 : at time 39827.0 ns WRITE: Bank = 2 Row = 137, Col = 191, Data = 2af17355
|
|
# Status: Burst-No: 23 Write Address: 00089aa3 WriteData: 2af17355
|
|
# tb_core.u_sdram32 : at time 39837.0 ns WRITE: Bank = 2 Row = 137, Col = 192, Data = 178b972f
|
|
# Status: Burst-No: 24 Write Address: 00089aa3 WriteData: 178b972f
|
|
# tb_core.u_sdram32 : at time 39847.0 ns WRITE: Bank = 2 Row = 137, Col = 193, Data = 85ce500b
|
|
# Status: Burst-No: 25 Write Address: 00089aa3 WriteData: 85ce500b
|
|
# tb_core.u_sdram32 : at time 39857.0 ns WRITE: Bank = 2 Row = 137, Col = 194, Data = ef1deade
|
|
# Status: Burst-No: 26 Write Address: 00089aa3 WriteData: ef1deade
|
|
# tb_core.u_sdram32 : at time 39867.0 ns WRITE: Bank = 2 Row = 137, Col = 195, Data = e9d22cd3
|
|
# Status: Burst-No: 27 Write Address: 00089aa3 WriteData: e9d22cd3
|
|
# tb_core.u_sdram32 : at time 39877.0 ns WRITE: Bank = 2 Row = 137, Col = 196, Data = 1445b128
|
|
# Status: Burst-No: 28 Write Address: 00089aa3 WriteData: 1445b128
|
|
# tb_core.u_sdram32 : at time 39887.0 ns WRITE: Bank = 2 Row = 137, Col = 197, Data = 74dc69e9
|
|
# Status: Burst-No: 29 Write Address: 00089aa3 WriteData: 74dc69e9
|
|
# tb_core.u_sdram32 : at time 39897.0 ns WRITE: Bank = 2 Row = 137, Col = 198, Data = 2c577958
|
|
# Status: Burst-No: 30 Write Address: 00089aa3 WriteData: 2c577958
|
|
# tb_core.u_sdram32 : at time 39907.0 ns WRITE: Bank = 2 Row = 137, Col = 199, Data = 6aa4a1d5
|
|
# Status: Burst-No: 31 Write Address: 00089aa3 WriteData: 6aa4a1d5
|
|
# tb_core.u_sdram32 : at time 39917.0 ns WRITE: Bank = 2 Row = 137, Col = 200, Data = 61dbe5c3
|
|
# Status: Burst-No: 32 Write Address: 00089aa3 WriteData: 61dbe5c3
|
|
# tb_core.u_sdram32 : at time 39927.0 ns WRITE: Bank = 2 Row = 137, Col = 201, Data = 6a2c13d4
|
|
# Status: Burst-No: 33 Write Address: 00089aa3 WriteData: 6a2c13d4
|
|
# tb_core.u_sdram32 : at time 39937.0 ns WRITE: Bank = 2 Row = 137, Col = 202, Data = 52397da4
|
|
# Status: Burst-No: 34 Write Address: 00089aa3 WriteData: 52397da4
|
|
# tb_core.u_sdram32 : at time 39947.0 ns WRITE: Bank = 2 Row = 137, Col = 203, Data = 3f25ef7e
|
|
# Status: Burst-No: 35 Write Address: 00089aa3 WriteData: 3f25ef7e
|
|
# tb_core.u_sdram32 : at time 39957.0 ns WRITE: Bank = 2 Row = 137, Col = 204, Data = 6b299dd6
|
|
# Status: Burst-No: 36 Write Address: 00089aa3 WriteData: 6b299dd6
|
|
# tb_core.u_sdram32 : at time 39967.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 40103.0 ns READ : Bank = 3 Row = 571, Col = 97, Data = e4df16c9
|
|
# tb_core.u_sdram32 : at time 40113.0 ns READ : Bank = 3 Row = 571, Col = 98, Data = b05f8e60
|
|
# READ STATUS: Burst-No: 0 Addr: 0023bd85 Rxd: e4df16c9
|
|
# tb_core.u_sdram32 : at time 40123.0 ns READ : Bank = 3 Row = 571, Col = 99, Data = a3643246
|
|
# READ STATUS: Burst-No: 1 Addr: 0023bd87 Rxd: b05f8e60
|
|
# tb_core.u_sdram32 : at time 40133.0 ns READ : Bank = 3 Row = 571, Col = 100, Data = 1e74cb3c
|
|
# READ STATUS: Burst-No: 2 Addr: 0023bd89 Rxd: a3643246
|
|
# tb_core.u_sdram32 : at time 40143.0 ns READ : Bank = 3 Row = 571, Col = 101, Data = 1b855f37
|
|
# READ STATUS: Burst-No: 3 Addr: 0023bd8b Rxd: 1e74cb3c
|
|
# tb_core.u_sdram32 : at time 40153.0 ns READ : Bank = 3 Row = 571, Col = 102, Data = 2c0c5558
|
|
# READ STATUS: Burst-No: 4 Addr: 0023bd8d Rxd: 1b855f37
|
|
# tb_core.u_sdram32 : at time 40163.0 ns READ : Bank = 3 Row = 571, Col = 103, Data = 39d65773
|
|
# READ STATUS: Burst-No: 5 Addr: 0023bd8f Rxd: 2c0c5558
|
|
# tb_core.u_sdram32 : at time 40173.0 ns READ : Bank = 3 Row = 571, Col = 104, Data = 8778d20e
|
|
# READ STATUS: Burst-No: 6 Addr: 0023bd91 Rxd: 39d65773
|
|
# tb_core.u_sdram32 : at time 40183.0 ns READ : Bank = 3 Row = 571, Col = 105, Data = 6e6d23dc
|
|
# READ STATUS: Burst-No: 7 Addr: 0023bd93 Rxd: 8778d20e
|
|
# tb_core.u_sdram32 : at time 40193.0 ns READ : Bank = 3 Row = 571, Col = 106, Data = 183fc330
|
|
# READ STATUS: Burst-No: 8 Addr: 0023bd95 Rxd: 6e6d23dc
|
|
# tb_core.u_sdram32 : at time 40203.0 ns READ : Bank = 3 Row = 571, Col = 107, Data = 6845f5d0
|
|
# READ STATUS: Burst-No: 9 Addr: 0023bd97 Rxd: 183fc330
|
|
# tb_core.u_sdram32 : at time 40213.0 ns READ : Bank = 3 Row = 571, Col = 108, Data = 0073e500
|
|
# READ STATUS: Burst-No: 10 Addr: 0023bd99 Rxd: 6845f5d0
|
|
# tb_core.u_sdram32 : at time 40223.0 ns READ : Bank = 3 Row = 571, Col = 109, Data = 21820f43
|
|
# READ STATUS: Burst-No: 11 Addr: 0023bd9b Rxd: 0073e500
|
|
# tb_core.u_sdram32 : at time 40233.0 ns READ : Bank = 3 Row = 571, Col = 110, Data = 7c6e91f8
|
|
# READ STATUS: Burst-No: 12 Addr: 0023bd9d Rxd: 21820f43
|
|
# tb_core.u_sdram32 : at time 40243.0 ns READ : Bank = 3 Row = 571, Col = 111, Data = d0b99aa1
|
|
# READ STATUS: Burst-No: 13 Addr: 0023bd9f Rxd: 7c6e91f8
|
|
# tb_core.u_sdram32 : at time 40253.0 ns READ : Bank = 3 Row = 571, Col = 112, Data = 29c01f53
|
|
# READ STATUS: Burst-No: 14 Addr: 0023bda1 Rxd: d0b99aa1
|
|
# tb_core.u_sdram32 : at time 40263.0 ns READ : Bank = 3 Row = 571, Col = 113, Data = 4c588f98
|
|
# READ STATUS: Burst-No: 15 Addr: 0023bda3 Rxd: 29c01f53
|
|
# tb_core.u_sdram32 : at time 40273.0 ns READ : Bank = 3 Row = 571, Col = 114, Data = 2fef3d5f
|
|
# READ STATUS: Burst-No: 16 Addr: 0023bda5 Rxd: 4c588f98
|
|
# tb_core.u_sdram32 : at time 40283.0 ns READ : Bank = 3 Row = 571, Col = 115, Data = c3be9287
|
|
# READ STATUS: Burst-No: 17 Addr: 0023bda7 Rxd: 2fef3d5f
|
|
# tb_core.u_sdram32 : at time 40293.0 ns READ : Bank = 3 Row = 571, Col = 116, Data = fd5f5afa
|
|
# READ STATUS: Burst-No: 18 Addr: 0023bda9 Rxd: c3be9287
|
|
# tb_core.u_sdram32 : at time 40303.0 ns READ : Bank = 3 Row = 571, Col = 117, Data = 1699d12d
|
|
# READ STATUS: Burst-No: 19 Addr: 0023bdab Rxd: fd5f5afa
|
|
# tb_core.u_sdram32 : at time 40313.0 ns READ : Bank = 3 Row = 571, Col = 118, Data = b8760270
|
|
# READ STATUS: Burst-No: 20 Addr: 0023bdad Rxd: 1699d12d
|
|
# tb_core.u_sdram32 : at time 40323.0 ns READ : Bank = 3 Row = 571, Col = 119, Data = b5b4e86b
|
|
# READ STATUS: Burst-No: 21 Addr: 0023bdaf Rxd: b8760270
|
|
# tb_core.u_sdram32 : at time 40333.0 ns READ : Bank = 3 Row = 571, Col = 120, Data = 98d73831
|
|
# READ STATUS: Burst-No: 22 Addr: 0023bdb1 Rxd: b5b4e86b
|
|
# tb_core.u_sdram32 : at time 40343.0 ns READ : Bank = 3 Row = 571, Col = 121, Data = 892fc012
|
|
# READ STATUS: Burst-No: 23 Addr: 0023bdb3 Rxd: 98d73831
|
|
# tb_core.u_sdram32 : at time 40353.0 ns READ : Bank = 3 Row = 571, Col = 122, Data = 0650df0c
|
|
# READ STATUS: Burst-No: 24 Addr: 0023bdb5 Rxd: 892fc012
|
|
# tb_core.u_sdram32 : at time 40363.0 ns READ : Bank = 3 Row = 571, Col = 123, Data = 06db6b0d
|
|
# READ STATUS: Burst-No: 25 Addr: 0023bdb7 Rxd: 0650df0c
|
|
# tb_core.u_sdram32 : at time 40373.0 ns READ : Bank = 3 Row = 571, Col = 124, Data = 0acd1315
|
|
# READ STATUS: Burst-No: 26 Addr: 0023bdb9 Rxd: 06db6b0d
|
|
# tb_core.u_sdram32 : at time 40383.0 ns READ : Bank = 3 Row = 571, Col = 125, Data = 20310740
|
|
# READ STATUS: Burst-No: 27 Addr: 0023bdbb Rxd: 0acd1315
|
|
# tb_core.u_sdram32 : at time 40393.0 ns READ : Bank = 3 Row = 571, Col = 126, Data = 4a638d94
|
|
# READ STATUS: Burst-No: 28 Addr: 0023bdbd Rxd: 20310740
|
|
# tb_core.u_sdram32 : at time 40403.0 ns READ : Bank = 3 Row = 571, Col = 127, Data = 2a1ba354
|
|
# READ STATUS: Burst-No: 29 Addr: 0023bdbf Rxd: 4a638d94
|
|
# tb_core.u_sdram32 : at time 40413.0 ns READ : Bank = 3 Row = 571, Col = 128, Data = c0620280
|
|
# READ STATUS: Burst-No: 30 Addr: 0023bdc1 Rxd: 2a1ba354
|
|
# tb_core.u_sdram32 : at time 40423.0 ns READ : Bank = 3 Row = 571, Col = 129, Data = 098d1513
|
|
# READ STATUS: Burst-No: 31 Addr: 0023bdc3 Rxd: c0620280
|
|
# tb_core.u_sdram32 : at time 40433.0 ns READ : Bank = 3 Row = 571, Col = 130, Data = e1e386c3
|
|
# READ STATUS: Burst-No: 32 Addr: 0023bdc5 Rxd: 098d1513
|
|
# tb_core.u_sdram32 : at time 40443.0 ns READ : Bank = 3 Row = 571, Col = 131, Data = f695deed
|
|
# READ STATUS: Burst-No: 33 Addr: 0023bdc7 Rxd: e1e386c3
|
|
# tb_core.u_sdram32 : at time 40453.0 ns READ : Bank = 3 Row = 571, Col = 132, Data = ee4ee6dc
|
|
# READ STATUS: Burst-No: 34 Addr: 0023bdc9 Rxd: f695deed
|
|
# tb_core.u_sdram32 : at time 40463.0 ns READ : Bank = 3 Row = 571, Col = 133, Data = bc781078
|
|
# READ STATUS: Burst-No: 35 Addr: 0023bdcb Rxd: ee4ee6dc
|
|
# tb_core.u_sdram32 : at time 40473.0 ns READ : Bank = 3 Row = 571, Col = 134, Data = 13d40d27
|
|
# READ STATUS: Burst-No: 36 Addr: 0023bdcd Rxd: bc781078
|
|
# tb_core.u_sdram32 : at time 40483.0 ns READ : Bank = 3 Row = 571, Col = 135, Data = afed265f
|
|
# READ STATUS: Burst-No: 37 Addr: 0023bdcf Rxd: 13d40d27
|
|
# tb_core.u_sdram32 : at time 40493.0 ns READ : Bank = 3 Row = 571, Col = 136, Data = 11c05b23
|
|
# READ STATUS: Burst-No: 38 Addr: 0023bdd1 Rxd: afed265f
|
|
# tb_core.u_sdram32 : at time 40503.0 ns READ : Bank = 3 Row = 571, Col = 137, Data = 5596ebab
|
|
# READ STATUS: Burst-No: 39 Addr: 0023bdd3 Rxd: 11c05b23
|
|
# tb_core.u_sdram32 : at time 40513.0 ns READ : Bank = 3 Row = 571, Col = 138, Data = 1c421738
|
|
# READ STATUS: Burst-No: 40 Addr: 0023bdd5 Rxd: 5596ebab
|
|
# tb_core.u_sdram32 : at time 40523.0 ns READ : Bank = 3 Row = 571, Col = 139, Data = 11534d22
|
|
# READ STATUS: Burst-No: 41 Addr: 0023bdd7 Rxd: 1c421738
|
|
# tb_core.u_sdram32 : at time 40533.0 ns READ : Bank = 3 Row = 571, Col = 140, Data = 64f2bdc9
|
|
# READ STATUS: Burst-No: 42 Addr: 0023bdd9 Rxd: 11534d22
|
|
# tb_core.u_sdram32 : at time 40543.0 ns READ : Bank = 3 Row = 571, Col = 141, Data = e3eb4cc7
|
|
# READ STATUS: Burst-No: 43 Addr: 0023bddb Rxd: 64f2bdc9
|
|
# tb_core.u_sdram32 : at time 40553.0 ns READ : Bank = 3 Row = 571, Col = 142, Data = c1406282
|
|
# READ STATUS: Burst-No: 44 Addr: 0023bddd Rxd: e3eb4cc7
|
|
# tb_core.u_sdram32 : at time 40563.0 ns READ : Bank = 3 Row = 571, Col = 143, Data = 6754d7ce
|
|
# READ STATUS: Burst-No: 45 Addr: 0023bddf Rxd: c1406282
|
|
# tb_core.u_sdram32 : at time 40573.0 ns READ : Bank = 3 Row = 571, Col = 144, Data = e38e22c7
|
|
# READ STATUS: Burst-No: 46 Addr: 0023bde1 Rxd: 6754d7ce
|
|
# tb_core.u_sdram32 : at time 40583.0 ns READ : Bank = 3 Row = 571, Col = 145, Data = 927fa424
|
|
# READ STATUS: Burst-No: 47 Addr: 0023bde3 Rxd: e38e22c7
|
|
# tb_core.u_sdram32 : at time 40593.0 ns READ : Bank = 3 Row = 571, Col = 146, Data = 6da36fdb
|
|
# READ STATUS: Burst-No: 48 Addr: 0023bde5 Rxd: 927fa424
|
|
# tb_core.u_sdram32 : at time 40603.0 ns READ : Bank = 3 Row = 571, Col = 147, Data = 84651408
|
|
# READ STATUS: Burst-No: 49 Addr: 0023bde7 Rxd: 6da36fdb
|
|
# tb_core.u_sdram32 : at time 40613.0 ns READ : Bank = 3 Row = 571, Col = 148, Data = 3ac26f75
|
|
# READ STATUS: Burst-No: 50 Addr: 0023bde9 Rxd: 84651408
|
|
# tb_core.u_sdram32 : at time 40623.0 ns READ : Bank = 3 Row = 571, Col = 149, Data = 5ad31db5
|
|
# READ STATUS: Burst-No: 51 Addr: 0023bdeb Rxd: 3ac26f75
|
|
# tb_core.u_sdram32 : at time 40633.0 ns READ : Bank = 3 Row = 571, Col = 150, Data = 8d7d721a
|
|
# READ STATUS: Burst-No: 52 Addr: 0023bded Rxd: 5ad31db5
|
|
# tb_core.u_sdram32 : at time 40643.0 ns READ : Bank = 3 Row = 571, Col = 151, Data = 1c2a1338
|
|
# READ STATUS: Burst-No: 53 Addr: 0023bdef Rxd: 8d7d721a
|
|
# tb_core.u_sdram32 : at time 40653.0 ns READ : Bank = 3 Row = 571, Col = 152, Data = c1233a82
|
|
# tb_core.u_sdram32 : at time 40657.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 54 Addr: 0023bdf1 Rxd: 1c2a1338
|
|
# tb_core.u_sdram32 : at time 40663.0 ns READ : Bank = 3 Row = 571, Col = 153, Data = ac05a058
|
|
# READ STATUS: Burst-No: 55 Addr: 0023bdf3 Rxd: c1233a82
|
|
# tb_core.u_sdram32 : at time 40673.0 ns READ : Bank = 3 Row = 571, Col = 154, Data = a85a6a50
|
|
# READ STATUS: Burst-No: 56 Addr: 0023bdf5 Rxd: ac05a058
|
|
# READ STATUS: Burst-No: 57 Addr: 0023bdf7 Rxd: a85a6a50
|
|
# tb_core.u_sdram32 : at time 40843.0 ns READ : Bank = 2 Row = 137, Col = 168, Data = 32c3df65
|
|
# tb_core.u_sdram32 : at time 40853.0 ns READ : Bank = 2 Row = 137, Col = 169, Data = 753c17ea
|
|
# READ STATUS: Burst-No: 0 Addr: 00089aa3 Rxd: 32c3df65
|
|
# tb_core.u_sdram32 : at time 40863.0 ns READ : Bank = 2 Row = 137, Col = 170, Data = 03703906
|
|
# READ STATUS: Burst-No: 1 Addr: 00089aa5 Rxd: 753c17ea
|
|
# tb_core.u_sdram32 : at time 40873.0 ns READ : Bank = 2 Row = 137, Col = 171, Data = aa138054
|
|
# READ STATUS: Burst-No: 2 Addr: 00089aa7 Rxd: 03703906
|
|
# tb_core.u_sdram32 : at time 40883.0 ns READ : Bank = 2 Row = 137, Col = 172, Data = adf3405b
|
|
# READ STATUS: Burst-No: 3 Addr: 00089aa9 Rxd: aa138054
|
|
# tb_core.u_sdram32 : at time 40893.0 ns READ : Bank = 2 Row = 137, Col = 173, Data = e455f0c8
|
|
# READ STATUS: Burst-No: 4 Addr: 00089aab Rxd: adf3405b
|
|
# tb_core.u_sdram32 : at time 40903.0 ns READ : Bank = 2 Row = 137, Col = 174, Data = 24673948
|
|
# READ STATUS: Burst-No: 5 Addr: 00089aad Rxd: e455f0c8
|
|
# tb_core.u_sdram32 : at time 40913.0 ns READ : Bank = 2 Row = 137, Col = 175, Data = 9bf8f237
|
|
# READ STATUS: Burst-No: 6 Addr: 00089aaf Rxd: 24673948
|
|
# tb_core.u_sdram32 : at time 40923.0 ns READ : Bank = 2 Row = 137, Col = 176, Data = 7c1df3f8
|
|
# READ STATUS: Burst-No: 7 Addr: 00089ab1 Rxd: 9bf8f237
|
|
# tb_core.u_sdram32 : at time 40933.0 ns READ : Bank = 2 Row = 137, Col = 177, Data = da8932b5
|
|
# READ STATUS: Burst-No: 8 Addr: 00089ab3 Rxd: 7c1df3f8
|
|
# tb_core.u_sdram32 : at time 40943.0 ns READ : Bank = 2 Row = 137, Col = 178, Data = 28d6a951
|
|
# READ STATUS: Burst-No: 9 Addr: 00089ab5 Rxd: da8932b5
|
|
# tb_core.u_sdram32 : at time 40953.0 ns READ : Bank = 2 Row = 137, Col = 179, Data = 41aed583
|
|
# READ STATUS: Burst-No: 10 Addr: 00089ab7 Rxd: 28d6a951
|
|
# tb_core.u_sdram32 : at time 40963.0 ns READ : Bank = 2 Row = 137, Col = 180, Data = 4d9ee39b
|
|
# READ STATUS: Burst-No: 11 Addr: 00089ab9 Rxd: 41aed583
|
|
# tb_core.u_sdram32 : at time 40973.0 ns READ : Bank = 2 Row = 137, Col = 181, Data = 1aa0dd35
|
|
# READ STATUS: Burst-No: 12 Addr: 00089abb Rxd: 4d9ee39b
|
|
# tb_core.u_sdram32 : at time 40983.0 ns READ : Bank = 2 Row = 137, Col = 182, Data = 581653b0
|
|
# READ STATUS: Burst-No: 13 Addr: 00089abd Rxd: 1aa0dd35
|
|
# tb_core.u_sdram32 : at time 40993.0 ns READ : Bank = 2 Row = 137, Col = 183, Data = fddf82fb
|
|
# READ STATUS: Burst-No: 14 Addr: 00089abf Rxd: 581653b0
|
|
# tb_core.u_sdram32 : at time 41003.0 ns READ : Bank = 2 Row = 137, Col = 184, Data = 278dbb4f
|
|
# READ STATUS: Burst-No: 15 Addr: 00089ac1 Rxd: fddf82fb
|
|
# tb_core.u_sdram32 : at time 41013.0 ns READ : Bank = 2 Row = 137, Col = 185, Data = 984da630
|
|
# READ STATUS: Burst-No: 16 Addr: 00089ac3 Rxd: 278dbb4f
|
|
# tb_core.u_sdram32 : at time 41023.0 ns READ : Bank = 2 Row = 137, Col = 186, Data = 8c38c418
|
|
# READ STATUS: Burst-No: 17 Addr: 00089ac5 Rxd: 984da630
|
|
# tb_core.u_sdram32 : at time 41033.0 ns READ : Bank = 2 Row = 137, Col = 187, Data = ee8118dd
|
|
# READ STATUS: Burst-No: 18 Addr: 00089ac7 Rxd: 8c38c418
|
|
# tb_core.u_sdram32 : at time 41043.0 ns READ : Bank = 2 Row = 137, Col = 188, Data = a36ae846
|
|
# READ STATUS: Burst-No: 19 Addr: 00089ac9 Rxd: ee8118dd
|
|
# tb_core.u_sdram32 : at time 41053.0 ns READ : Bank = 2 Row = 137, Col = 189, Data = 30e20f61
|
|
# READ STATUS: Burst-No: 20 Addr: 00089acb Rxd: a36ae846
|
|
# tb_core.u_sdram32 : at time 41063.0 ns READ : Bank = 2 Row = 137, Col = 190, Data = ac974859
|
|
# READ STATUS: Burst-No: 21 Addr: 00089acd Rxd: 30e20f61
|
|
# tb_core.u_sdram32 : at time 41073.0 ns READ : Bank = 2 Row = 137, Col = 191, Data = 2af17355
|
|
# READ STATUS: Burst-No: 22 Addr: 00089acf Rxd: ac974859
|
|
# tb_core.u_sdram32 : at time 41083.0 ns READ : Bank = 2 Row = 137, Col = 192, Data = 178b972f
|
|
# READ STATUS: Burst-No: 23 Addr: 00089ad1 Rxd: 2af17355
|
|
# tb_core.u_sdram32 : at time 41093.0 ns READ : Bank = 2 Row = 137, Col = 193, Data = 85ce500b
|
|
# READ STATUS: Burst-No: 24 Addr: 00089ad3 Rxd: 178b972f
|
|
# tb_core.u_sdram32 : at time 41103.0 ns READ : Bank = 2 Row = 137, Col = 194, Data = ef1deade
|
|
# READ STATUS: Burst-No: 25 Addr: 00089ad5 Rxd: 85ce500b
|
|
# tb_core.u_sdram32 : at time 41113.0 ns READ : Bank = 2 Row = 137, Col = 195, Data = e9d22cd3
|
|
# READ STATUS: Burst-No: 26 Addr: 00089ad7 Rxd: ef1deade
|
|
# tb_core.u_sdram32 : at time 41123.0 ns READ : Bank = 2 Row = 137, Col = 196, Data = 1445b128
|
|
# READ STATUS: Burst-No: 27 Addr: 00089ad9 Rxd: e9d22cd3
|
|
# tb_core.u_sdram32 : at time 41133.0 ns READ : Bank = 2 Row = 137, Col = 197, Data = 74dc69e9
|
|
# READ STATUS: Burst-No: 28 Addr: 00089adb Rxd: 1445b128
|
|
# tb_core.u_sdram32 : at time 41143.0 ns READ : Bank = 2 Row = 137, Col = 198, Data = 2c577958
|
|
# READ STATUS: Burst-No: 29 Addr: 00089add Rxd: 74dc69e9
|
|
# tb_core.u_sdram32 : at time 41153.0 ns READ : Bank = 2 Row = 137, Col = 199, Data = 6aa4a1d5
|
|
# READ STATUS: Burst-No: 30 Addr: 00089adf Rxd: 2c577958
|
|
# tb_core.u_sdram32 : at time 41163.0 ns READ : Bank = 2 Row = 137, Col = 200, Data = 61dbe5c3
|
|
# READ STATUS: Burst-No: 31 Addr: 00089ae1 Rxd: 6aa4a1d5
|
|
# tb_core.u_sdram32 : at time 41173.0 ns READ : Bank = 2 Row = 137, Col = 201, Data = 6a2c13d4
|
|
# READ STATUS: Burst-No: 32 Addr: 00089ae3 Rxd: 61dbe5c3
|
|
# tb_core.u_sdram32 : at time 41183.0 ns READ : Bank = 2 Row = 137, Col = 202, Data = 52397da4
|
|
# tb_core.u_sdram32 : at time 41187.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 33 Addr: 00089ae5 Rxd: 6a2c13d4
|
|
# tb_core.u_sdram32 : at time 41193.0 ns READ : Bank = 2 Row = 137, Col = 203, Data = 3f25ef7e
|
|
# READ STATUS: Burst-No: 34 Addr: 00089ae7 Rxd: 52397da4
|
|
# tb_core.u_sdram32 : at time 41203.0 ns READ : Bank = 2 Row = 137, Col = 204, Data = 6b299dd6
|
|
# READ STATUS: Burst-No: 35 Addr: 00089ae9 Rxd: 3f25ef7e
|
|
# READ STATUS: Burst-No: 36 Addr: 00089aeb Rxd: 6b299dd6
|
|
# tb_core.u_sdram32 : at time 41237.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 41327.0 ns AREF : Auto Refresh
|
|
# Write Address: 002ec80f, Burst Size: 4
|
|
# tb_core.u_sdram32 : at time 41417.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 41507.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 41597.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 41687.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 41807.0 ns ACT : Bank = 2 Row = 748
|
|
# tb_core.u_sdram32 : at time 41837.0 ns WRITE: Bank = 2 Row = 748, Col = 3, Data = 506aefa0
|
|
# Status: Burst-No: 0 Write Address: 002ec80f WriteData: 506aefa0
|
|
# tb_core.u_sdram32 : at time 41847.0 ns WRITE: Bank = 2 Row = 748, Col = 4, Data = c10f0482
|
|
# Status: Burst-No: 1 Write Address: 002ec80f WriteData: c10f0482
|
|
# tb_core.u_sdram32 : at time 41857.0 ns WRITE: Bank = 2 Row = 748, Col = 5, Data = 5fe3cbbf
|
|
# Status: Burst-No: 2 Write Address: 002ec80f WriteData: 5fe3cbbf
|
|
# tb_core.u_sdram32 : at time 41867.0 ns WRITE: Bank = 2 Row = 748, Col = 6, Data = 22eadb45
|
|
# Status: Burst-No: 3 Write Address: 002ec80f WriteData: 22eadb45
|
|
# tb_core.u_sdram32 : at time 41877.0 ns BST : Burst Terminate
|
|
# Write Address: 003c3e77, Burst Size: 6
|
|
# tb_core.u_sdram32 : at time 42017.0 ns ACT : Bank = 3 Row = 963
|
|
# tb_core.u_sdram32 : at time 42047.0 ns WRITE: Bank = 3 Row = 963, Col = 157, Data = ba941075
|
|
# Status: Burst-No: 0 Write Address: 003c3e77 WriteData: ba941075
|
|
# tb_core.u_sdram32 : at time 42057.0 ns WRITE: Bank = 3 Row = 963, Col = 158, Data = fc670af8
|
|
# Status: Burst-No: 1 Write Address: 003c3e77 WriteData: fc670af8
|
|
# tb_core.u_sdram32 : at time 42067.0 ns WRITE: Bank = 3 Row = 963, Col = 159, Data = 63323bc6
|
|
# Status: Burst-No: 2 Write Address: 003c3e77 WriteData: 63323bc6
|
|
# tb_core.u_sdram32 : at time 42077.0 ns WRITE: Bank = 3 Row = 963, Col = 160, Data = 3601596c
|
|
# Status: Burst-No: 3 Write Address: 003c3e77 WriteData: 3601596c
|
|
# tb_core.u_sdram32 : at time 42087.0 ns WRITE: Bank = 3 Row = 963, Col = 161, Data = a84e5850
|
|
# Status: Burst-No: 4 Write Address: 003c3e77 WriteData: a84e5850
|
|
# tb_core.u_sdram32 : at time 42097.0 ns WRITE: Bank = 3 Row = 963, Col = 162, Data = 18bd6331
|
|
# Status: Burst-No: 5 Write Address: 003c3e77 WriteData: 18bd6331
|
|
# tb_core.u_sdram32 : at time 42107.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 42243.0 ns READ : Bank = 2 Row = 748, Col = 3, Data = 506aefa0
|
|
# tb_core.u_sdram32 : at time 42253.0 ns READ : Bank = 2 Row = 748, Col = 4, Data = c10f0482
|
|
# READ STATUS: Burst-No: 0 Addr: 002ec80f Rxd: 506aefa0
|
|
# tb_core.u_sdram32 : at time 42257.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 42263.0 ns READ : Bank = 2 Row = 748, Col = 5, Data = 5fe3cbbf
|
|
# READ STATUS: Burst-No: 1 Addr: 002ec811 Rxd: c10f0482
|
|
# tb_core.u_sdram32 : at time 42273.0 ns READ : Bank = 2 Row = 748, Col = 6, Data = 22eadb45
|
|
# READ STATUS: Burst-No: 2 Addr: 002ec813 Rxd: 5fe3cbbf
|
|
# READ STATUS: Burst-No: 3 Addr: 002ec815 Rxd: 22eadb45
|
|
# tb_core.u_sdram32 : at time 42443.0 ns READ : Bank = 3 Row = 963, Col = 157, Data = ba941075
|
|
# tb_core.u_sdram32 : at time 42453.0 ns READ : Bank = 3 Row = 963, Col = 158, Data = fc670af8
|
|
# READ STATUS: Burst-No: 0 Addr: 003c3e77 Rxd: ba941075
|
|
# tb_core.u_sdram32 : at time 42463.0 ns READ : Bank = 3 Row = 963, Col = 159, Data = 63323bc6
|
|
# READ STATUS: Burst-No: 1 Addr: 003c3e79 Rxd: fc670af8
|
|
# tb_core.u_sdram32 : at time 42473.0 ns READ : Bank = 3 Row = 963, Col = 160, Data = 3601596c
|
|
# tb_core.u_sdram32 : at time 42477.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 2 Addr: 003c3e7b Rxd: 63323bc6
|
|
# tb_core.u_sdram32 : at time 42483.0 ns READ : Bank = 3 Row = 963, Col = 161, Data = a84e5850
|
|
# READ STATUS: Burst-No: 3 Addr: 003c3e7d Rxd: 3601596c
|
|
# tb_core.u_sdram32 : at time 42493.0 ns READ : Bank = 3 Row = 963, Col = 162, Data = 18bd6331
|
|
# READ STATUS: Burst-No: 4 Addr: 003c3e7f Rxd: a84e5850
|
|
# READ STATUS: Burst-No: 5 Addr: 003c3e81 Rxd: 18bd6331
|
|
# Write Address: 0010fe9c, Burst Size: 61
|
|
# tb_core.u_sdram32 : at time 42667.0 ns ACT : Bank = 3 Row = 271
|
|
# tb_core.u_sdram32 : at time 42697.0 ns WRITE: Bank = 3 Row = 271, Col = 167, Data = d7e31eaf
|
|
# Status: Burst-No: 0 Write Address: 0010fe9c WriteData: d7e31eaf
|
|
# tb_core.u_sdram32 : at time 42707.0 ns WRITE: Bank = 3 Row = 271, Col = 168, Data = 872d2c0e
|
|
# Status: Burst-No: 1 Write Address: 0010fe9c WriteData: 872d2c0e
|
|
# tb_core.u_sdram32 : at time 42717.0 ns WRITE: Bank = 3 Row = 271, Col = 169, Data = b4e46669
|
|
# Status: Burst-No: 2 Write Address: 0010fe9c WriteData: b4e46669
|
|
# tb_core.u_sdram32 : at time 42727.0 ns WRITE: Bank = 3 Row = 271, Col = 170, Data = d95b40b2
|
|
# Status: Burst-No: 3 Write Address: 0010fe9c WriteData: d95b40b2
|
|
# tb_core.u_sdram32 : at time 42737.0 ns WRITE: Bank = 3 Row = 271, Col = 171, Data = ef209ede
|
|
# Status: Burst-No: 4 Write Address: 0010fe9c WriteData: ef209ede
|
|
# tb_core.u_sdram32 : at time 42747.0 ns WRITE: Bank = 3 Row = 271, Col = 172, Data = c2e87485
|
|
# Status: Burst-No: 5 Write Address: 0010fe9c WriteData: c2e87485
|
|
# tb_core.u_sdram32 : at time 42757.0 ns WRITE: Bank = 3 Row = 271, Col = 173, Data = 555c0faa
|
|
# Status: Burst-No: 6 Write Address: 0010fe9c WriteData: 555c0faa
|
|
# tb_core.u_sdram32 : at time 42767.0 ns WRITE: Bank = 3 Row = 271, Col = 174, Data = 1407f128
|
|
# Status: Burst-No: 7 Write Address: 0010fe9c WriteData: 1407f128
|
|
# tb_core.u_sdram32 : at time 42777.0 ns WRITE: Bank = 3 Row = 271, Col = 175, Data = 610ed5c2
|
|
# Status: Burst-No: 8 Write Address: 0010fe9c WriteData: 610ed5c2
|
|
# tb_core.u_sdram32 : at time 42787.0 ns WRITE: Bank = 3 Row = 271, Col = 176, Data = 4d20099a
|
|
# Status: Burst-No: 9 Write Address: 0010fe9c WriteData: 4d20099a
|
|
# tb_core.u_sdram32 : at time 42797.0 ns WRITE: Bank = 3 Row = 271, Col = 177, Data = 69e751d3
|
|
# Status: Burst-No: 10 Write Address: 0010fe9c WriteData: 69e751d3
|
|
# tb_core.u_sdram32 : at time 42807.0 ns WRITE: Bank = 3 Row = 271, Col = 178, Data = dd111aba
|
|
# Status: Burst-No: 11 Write Address: 0010fe9c WriteData: dd111aba
|
|
# tb_core.u_sdram32 : at time 42817.0 ns WRITE: Bank = 3 Row = 271, Col = 179, Data = fdeb7cfb
|
|
# Status: Burst-No: 12 Write Address: 0010fe9c WriteData: fdeb7cfb
|
|
# tb_core.u_sdram32 : at time 42827.0 ns WRITE: Bank = 3 Row = 271, Col = 180, Data = c5cf728b
|
|
# Status: Burst-No: 13 Write Address: 0010fe9c WriteData: c5cf728b
|
|
# tb_core.u_sdram32 : at time 42837.0 ns WRITE: Bank = 3 Row = 271, Col = 181, Data = 61114dc2
|
|
# Status: Burst-No: 14 Write Address: 0010fe9c WriteData: 61114dc2
|
|
# tb_core.u_sdram32 : at time 42847.0 ns WRITE: Bank = 3 Row = 271, Col = 182, Data = e64828cc
|
|
# Status: Burst-No: 15 Write Address: 0010fe9c WriteData: e64828cc
|
|
# tb_core.u_sdram32 : at time 42857.0 ns WRITE: Bank = 3 Row = 271, Col = 183, Data = 38e61371
|
|
# Status: Burst-No: 16 Write Address: 0010fe9c WriteData: 38e61371
|
|
# tb_core.u_sdram32 : at time 42867.0 ns WRITE: Bank = 3 Row = 271, Col = 184, Data = 4f49019e
|
|
# Status: Burst-No: 17 Write Address: 0010fe9c WriteData: 4f49019e
|
|
# tb_core.u_sdram32 : at time 42877.0 ns WRITE: Bank = 3 Row = 271, Col = 185, Data = 309cdb61
|
|
# Status: Burst-No: 18 Write Address: 0010fe9c WriteData: 309cdb61
|
|
# tb_core.u_sdram32 : at time 42887.0 ns WRITE: Bank = 3 Row = 271, Col = 186, Data = bde3487b
|
|
# Status: Burst-No: 19 Write Address: 0010fe9c WriteData: bde3487b
|
|
# tb_core.u_sdram32 : at time 42897.0 ns WRITE: Bank = 3 Row = 271, Col = 187, Data = df9bd0bf
|
|
# Status: Burst-No: 20 Write Address: 0010fe9c WriteData: df9bd0bf
|
|
# tb_core.u_sdram32 : at time 42907.0 ns WRITE: Bank = 3 Row = 271, Col = 188, Data = c881bc91
|
|
# Status: Burst-No: 21 Write Address: 0010fe9c WriteData: c881bc91
|
|
# tb_core.u_sdram32 : at time 42917.0 ns WRITE: Bank = 3 Row = 271, Col = 189, Data = e06098c0
|
|
# Status: Burst-No: 22 Write Address: 0010fe9c WriteData: e06098c0
|
|
# tb_core.u_sdram32 : at time 42927.0 ns WRITE: Bank = 3 Row = 271, Col = 190, Data = 2ca96359
|
|
# Status: Burst-No: 23 Write Address: 0010fe9c WriteData: 2ca96359
|
|
# tb_core.u_sdram32 : at time 42937.0 ns WRITE: Bank = 3 Row = 271, Col = 191, Data = bf53b47e
|
|
# Status: Burst-No: 24 Write Address: 0010fe9c WriteData: bf53b47e
|
|
# tb_core.u_sdram32 : at time 42947.0 ns WRITE: Bank = 3 Row = 271, Col = 192, Data = 2a1d7354
|
|
# Status: Burst-No: 25 Write Address: 0010fe9c WriteData: 2a1d7354
|
|
# tb_core.u_sdram32 : at time 42957.0 ns WRITE: Bank = 3 Row = 271, Col = 193, Data = a8e2e251
|
|
# Status: Burst-No: 26 Write Address: 0010fe9c WriteData: a8e2e251
|
|
# tb_core.u_sdram32 : at time 42967.0 ns WRITE: Bank = 3 Row = 271, Col = 194, Data = a4de2849
|
|
# Status: Burst-No: 27 Write Address: 0010fe9c WriteData: a4de2849
|
|
# tb_core.u_sdram32 : at time 42977.0 ns WRITE: Bank = 3 Row = 271, Col = 195, Data = 73fa7de7
|
|
# Status: Burst-No: 28 Write Address: 0010fe9c WriteData: 73fa7de7
|
|
# tb_core.u_sdram32 : at time 42987.0 ns WRITE: Bank = 3 Row = 271, Col = 196, Data = 123aaf24
|
|
# Status: Burst-No: 29 Write Address: 0010fe9c WriteData: 123aaf24
|
|
# tb_core.u_sdram32 : at time 42997.0 ns WRITE: Bank = 3 Row = 271, Col = 197, Data = 41b5d583
|
|
# Status: Burst-No: 30 Write Address: 0010fe9c WriteData: 41b5d583
|
|
# tb_core.u_sdram32 : at time 43007.0 ns WRITE: Bank = 3 Row = 271, Col = 198, Data = adee005b
|
|
# Status: Burst-No: 31 Write Address: 0010fe9c WriteData: adee005b
|
|
# tb_core.u_sdram32 : at time 43017.0 ns WRITE: Bank = 3 Row = 271, Col = 199, Data = 5cdea1b9
|
|
# Status: Burst-No: 32 Write Address: 0010fe9c WriteData: 5cdea1b9
|
|
# tb_core.u_sdram32 : at time 43027.0 ns WRITE: Bank = 3 Row = 271, Col = 200, Data = 4afebf95
|
|
# Status: Burst-No: 33 Write Address: 0010fe9c WriteData: 4afebf95
|
|
# tb_core.u_sdram32 : at time 43037.0 ns WRITE: Bank = 3 Row = 271, Col = 201, Data = bb934a77
|
|
# Status: Burst-No: 34 Write Address: 0010fe9c WriteData: bb934a77
|
|
# tb_core.u_sdram32 : at time 43047.0 ns WRITE: Bank = 3 Row = 271, Col = 202, Data = f8da1af1
|
|
# Status: Burst-No: 35 Write Address: 0010fe9c WriteData: f8da1af1
|
|
# tb_core.u_sdram32 : at time 43057.0 ns WRITE: Bank = 3 Row = 271, Col = 203, Data = 732c5fe6
|
|
# Status: Burst-No: 36 Write Address: 0010fe9c WriteData: 732c5fe6
|
|
# tb_core.u_sdram32 : at time 43067.0 ns WRITE: Bank = 3 Row = 271, Col = 204, Data = d7e1aeaf
|
|
# Status: Burst-No: 37 Write Address: 0010fe9c WriteData: d7e1aeaf
|
|
# tb_core.u_sdram32 : at time 43077.0 ns WRITE: Bank = 3 Row = 271, Col = 205, Data = 0238e104
|
|
# Status: Burst-No: 38 Write Address: 0010fe9c WriteData: 0238e104
|
|
# tb_core.u_sdram32 : at time 43087.0 ns WRITE: Bank = 3 Row = 271, Col = 206, Data = 89646012
|
|
# Status: Burst-No: 39 Write Address: 0010fe9c WriteData: 89646012
|
|
# tb_core.u_sdram32 : at time 43097.0 ns WRITE: Bank = 3 Row = 271, Col = 207, Data = 7e29b3fc
|
|
# Status: Burst-No: 40 Write Address: 0010fe9c WriteData: 7e29b3fc
|
|
# tb_core.u_sdram32 : at time 43107.0 ns WRITE: Bank = 3 Row = 271, Col = 208, Data = d5ba48ab
|
|
# Status: Burst-No: 41 Write Address: 0010fe9c WriteData: d5ba48ab
|
|
# tb_core.u_sdram32 : at time 43117.0 ns WRITE: Bank = 3 Row = 271, Col = 209, Data = e203f0c4
|
|
# Status: Burst-No: 42 Write Address: 0010fe9c WriteData: e203f0c4
|
|
# tb_core.u_sdram32 : at time 43127.0 ns WRITE: Bank = 3 Row = 271, Col = 210, Data = 1ffb813f
|
|
# Status: Burst-No: 43 Write Address: 0010fe9c WriteData: 1ffb813f
|
|
# tb_core.u_sdram32 : at time 43137.0 ns WRITE: Bank = 3 Row = 271, Col = 211, Data = e13256c2
|
|
# Status: Burst-No: 44 Write Address: 0010fe9c WriteData: e13256c2
|
|
# tb_core.u_sdram32 : at time 43147.0 ns WRITE: Bank = 3 Row = 271, Col = 212, Data = 398a1973
|
|
# Status: Burst-No: 45 Write Address: 0010fe9c WriteData: 398a1973
|
|
# tb_core.u_sdram32 : at time 43157.0 ns WRITE: Bank = 3 Row = 271, Col = 213, Data = 2d4d9b5a
|
|
# Status: Burst-No: 46 Write Address: 0010fe9c WriteData: 2d4d9b5a
|
|
# tb_core.u_sdram32 : at time 43167.0 ns WRITE: Bank = 3 Row = 271, Col = 214, Data = d066e4a0
|
|
# Status: Burst-No: 47 Write Address: 0010fe9c WriteData: d066e4a0
|
|
# tb_core.u_sdram32 : at time 43177.0 ns WRITE: Bank = 3 Row = 271, Col = 215, Data = ff73cafe
|
|
# Status: Burst-No: 48 Write Address: 0010fe9c WriteData: ff73cafe
|
|
# tb_core.u_sdram32 : at time 43187.0 ns WRITE: Bank = 3 Row = 271, Col = 216, Data = 3a096b74
|
|
# Status: Burst-No: 49 Write Address: 0010fe9c WriteData: 3a096b74
|
|
# tb_core.u_sdram32 : at time 43197.0 ns WRITE: Bank = 3 Row = 271, Col = 217, Data = 5d86b7bb
|
|
# Status: Burst-No: 50 Write Address: 0010fe9c WriteData: 5d86b7bb
|
|
# tb_core.u_sdram32 : at time 43207.0 ns WRITE: Bank = 3 Row = 271, Col = 218, Data = 7132bbe2
|
|
# Status: Burst-No: 51 Write Address: 0010fe9c WriteData: 7132bbe2
|
|
# tb_core.u_sdram32 : at time 43217.0 ns WRITE: Bank = 3 Row = 271, Col = 219, Data = f16948e2
|
|
# Status: Burst-No: 52 Write Address: 0010fe9c WriteData: f16948e2
|
|
# tb_core.u_sdram32 : at time 43227.0 ns WRITE: Bank = 3 Row = 271, Col = 220, Data = eff34cdf
|
|
# Status: Burst-No: 53 Write Address: 0010fe9c WriteData: eff34cdf
|
|
# tb_core.u_sdram32 : at time 43237.0 ns WRITE: Bank = 3 Row = 271, Col = 221, Data = cc13e298
|
|
# Status: Burst-No: 54 Write Address: 0010fe9c WriteData: cc13e298
|
|
# tb_core.u_sdram32 : at time 43247.0 ns WRITE: Bank = 3 Row = 271, Col = 222, Data = 4fdbed9f
|
|
# Status: Burst-No: 55 Write Address: 0010fe9c WriteData: 4fdbed9f
|
|
# tb_core.u_sdram32 : at time 43257.0 ns WRITE: Bank = 3 Row = 271, Col = 223, Data = 0817cb10
|
|
# Status: Burst-No: 56 Write Address: 0010fe9c WriteData: 0817cb10
|
|
# tb_core.u_sdram32 : at time 43267.0 ns WRITE: Bank = 3 Row = 271, Col = 224, Data = 791189f2
|
|
# Status: Burst-No: 57 Write Address: 0010fe9c WriteData: 791189f2
|
|
# tb_core.u_sdram32 : at time 43277.0 ns WRITE: Bank = 3 Row = 271, Col = 225, Data = 5ee97bbd
|
|
# Status: Burst-No: 58 Write Address: 0010fe9c WriteData: 5ee97bbd
|
|
# tb_core.u_sdram32 : at time 43287.0 ns WRITE: Bank = 3 Row = 271, Col = 226, Data = 55bc27ab
|
|
# Status: Burst-No: 59 Write Address: 0010fe9c WriteData: 55bc27ab
|
|
# tb_core.u_sdram32 : at time 43297.0 ns WRITE: Bank = 3 Row = 271, Col = 227, Data = 5a0a0fb4
|
|
# Status: Burst-No: 60 Write Address: 0010fe9c WriteData: 5a0a0fb4
|
|
# tb_core.u_sdram32 : at time 43307.0 ns BST : Burst Terminate
|
|
# Write Address: 0008ac54, Burst Size: 10
|
|
# tb_core.u_sdram32 : at time 43447.0 ns ACT : Bank = 3 Row = 138
|
|
# tb_core.u_sdram32 : at time 43477.0 ns WRITE: Bank = 3 Row = 138, Col = 21, Data = 89b5d413
|
|
# Status: Burst-No: 0 Write Address: 0008ac54 WriteData: 89b5d413
|
|
# tb_core.u_sdram32 : at time 43487.0 ns WRITE: Bank = 3 Row = 138, Col = 22, Data = 560c91ac
|
|
# Status: Burst-No: 1 Write Address: 0008ac54 WriteData: 560c91ac
|
|
# tb_core.u_sdram32 : at time 43497.0 ns WRITE: Bank = 3 Row = 138, Col = 23, Data = 1ae40335
|
|
# Status: Burst-No: 2 Write Address: 0008ac54 WriteData: 1ae40335
|
|
# tb_core.u_sdram32 : at time 43507.0 ns WRITE: Bank = 3 Row = 138, Col = 24, Data = 1df61f3b
|
|
# Status: Burst-No: 3 Write Address: 0008ac54 WriteData: 1df61f3b
|
|
# tb_core.u_sdram32 : at time 43517.0 ns WRITE: Bank = 3 Row = 138, Col = 25, Data = 9aa02435
|
|
# Status: Burst-No: 4 Write Address: 0008ac54 WriteData: 9aa02435
|
|
# tb_core.u_sdram32 : at time 43527.0 ns WRITE: Bank = 3 Row = 138, Col = 26, Data = 17a98d2f
|
|
# Status: Burst-No: 5 Write Address: 0008ac54 WriteData: 17a98d2f
|
|
# tb_core.u_sdram32 : at time 43537.0 ns WRITE: Bank = 3 Row = 138, Col = 27, Data = 1a619934
|
|
# Status: Burst-No: 6 Write Address: 0008ac54 WriteData: 1a619934
|
|
# tb_core.u_sdram32 : at time 43547.0 ns WRITE: Bank = 3 Row = 138, Col = 28, Data = aae0a255
|
|
# Status: Burst-No: 7 Write Address: 0008ac54 WriteData: aae0a255
|
|
# tb_core.u_sdram32 : at time 43557.0 ns WRITE: Bank = 3 Row = 138, Col = 29, Data = de7302bc
|
|
# Status: Burst-No: 8 Write Address: 0008ac54 WriteData: de7302bc
|
|
# tb_core.u_sdram32 : at time 43567.0 ns WRITE: Bank = 3 Row = 138, Col = 30, Data = f964fef2
|
|
# Status: Burst-No: 9 Write Address: 0008ac54 WriteData: f964fef2
|
|
# tb_core.u_sdram32 : at time 43577.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 43717.0 ns ACT : Bank = 3 Row = 271
|
|
# tb_core.u_sdram32 : at time 43773.0 ns READ : Bank = 3 Row = 271, Col = 167, Data = d7e31eaf
|
|
# tb_core.u_sdram32 : at time 43783.0 ns READ : Bank = 3 Row = 271, Col = 168, Data = 872d2c0e
|
|
# READ STATUS: Burst-No: 0 Addr: 0010fe9c Rxd: d7e31eaf
|
|
# tb_core.u_sdram32 : at time 43793.0 ns READ : Bank = 3 Row = 271, Col = 169, Data = b4e46669
|
|
# READ STATUS: Burst-No: 1 Addr: 0010fe9e Rxd: 872d2c0e
|
|
# tb_core.u_sdram32 : at time 43803.0 ns READ : Bank = 3 Row = 271, Col = 170, Data = d95b40b2
|
|
# READ STATUS: Burst-No: 2 Addr: 0010fea0 Rxd: b4e46669
|
|
# tb_core.u_sdram32 : at time 43813.0 ns READ : Bank = 3 Row = 271, Col = 171, Data = ef209ede
|
|
# READ STATUS: Burst-No: 3 Addr: 0010fea2 Rxd: d95b40b2
|
|
# tb_core.u_sdram32 : at time 43823.0 ns READ : Bank = 3 Row = 271, Col = 172, Data = c2e87485
|
|
# READ STATUS: Burst-No: 4 Addr: 0010fea4 Rxd: ef209ede
|
|
# tb_core.u_sdram32 : at time 43833.0 ns READ : Bank = 3 Row = 271, Col = 173, Data = 555c0faa
|
|
# READ STATUS: Burst-No: 5 Addr: 0010fea6 Rxd: c2e87485
|
|
# tb_core.u_sdram32 : at time 43843.0 ns READ : Bank = 3 Row = 271, Col = 174, Data = 1407f128
|
|
# READ STATUS: Burst-No: 6 Addr: 0010fea8 Rxd: 555c0faa
|
|
# tb_core.u_sdram32 : at time 43853.0 ns READ : Bank = 3 Row = 271, Col = 175, Data = 610ed5c2
|
|
# READ STATUS: Burst-No: 7 Addr: 0010feaa Rxd: 1407f128
|
|
# tb_core.u_sdram32 : at time 43863.0 ns READ : Bank = 3 Row = 271, Col = 176, Data = 4d20099a
|
|
# READ STATUS: Burst-No: 8 Addr: 0010feac Rxd: 610ed5c2
|
|
# tb_core.u_sdram32 : at time 43873.0 ns READ : Bank = 3 Row = 271, Col = 177, Data = 69e751d3
|
|
# READ STATUS: Burst-No: 9 Addr: 0010feae Rxd: 4d20099a
|
|
# tb_core.u_sdram32 : at time 43883.0 ns READ : Bank = 3 Row = 271, Col = 178, Data = dd111aba
|
|
# READ STATUS: Burst-No: 10 Addr: 0010feb0 Rxd: 69e751d3
|
|
# tb_core.u_sdram32 : at time 43893.0 ns READ : Bank = 3 Row = 271, Col = 179, Data = fdeb7cfb
|
|
# READ STATUS: Burst-No: 11 Addr: 0010feb2 Rxd: dd111aba
|
|
# tb_core.u_sdram32 : at time 43903.0 ns READ : Bank = 3 Row = 271, Col = 180, Data = c5cf728b
|
|
# READ STATUS: Burst-No: 12 Addr: 0010feb4 Rxd: fdeb7cfb
|
|
# tb_core.u_sdram32 : at time 43913.0 ns READ : Bank = 3 Row = 271, Col = 181, Data = 61114dc2
|
|
# READ STATUS: Burst-No: 13 Addr: 0010feb6 Rxd: c5cf728b
|
|
# tb_core.u_sdram32 : at time 43923.0 ns READ : Bank = 3 Row = 271, Col = 182, Data = e64828cc
|
|
# READ STATUS: Burst-No: 14 Addr: 0010feb8 Rxd: 61114dc2
|
|
# tb_core.u_sdram32 : at time 43933.0 ns READ : Bank = 3 Row = 271, Col = 183, Data = 38e61371
|
|
# READ STATUS: Burst-No: 15 Addr: 0010feba Rxd: e64828cc
|
|
# tb_core.u_sdram32 : at time 43943.0 ns READ : Bank = 3 Row = 271, Col = 184, Data = 4f49019e
|
|
# READ STATUS: Burst-No: 16 Addr: 0010febc Rxd: 38e61371
|
|
# tb_core.u_sdram32 : at time 43953.0 ns READ : Bank = 3 Row = 271, Col = 185, Data = 309cdb61
|
|
# READ STATUS: Burst-No: 17 Addr: 0010febe Rxd: 4f49019e
|
|
# tb_core.u_sdram32 : at time 43963.0 ns READ : Bank = 3 Row = 271, Col = 186, Data = bde3487b
|
|
# READ STATUS: Burst-No: 18 Addr: 0010fec0 Rxd: 309cdb61
|
|
# tb_core.u_sdram32 : at time 43973.0 ns READ : Bank = 3 Row = 271, Col = 187, Data = df9bd0bf
|
|
# READ STATUS: Burst-No: 19 Addr: 0010fec2 Rxd: bde3487b
|
|
# tb_core.u_sdram32 : at time 43983.0 ns READ : Bank = 3 Row = 271, Col = 188, Data = c881bc91
|
|
# READ STATUS: Burst-No: 20 Addr: 0010fec4 Rxd: df9bd0bf
|
|
# tb_core.u_sdram32 : at time 43993.0 ns READ : Bank = 3 Row = 271, Col = 189, Data = e06098c0
|
|
# READ STATUS: Burst-No: 21 Addr: 0010fec6 Rxd: c881bc91
|
|
# tb_core.u_sdram32 : at time 44003.0 ns READ : Bank = 3 Row = 271, Col = 190, Data = 2ca96359
|
|
# READ STATUS: Burst-No: 22 Addr: 0010fec8 Rxd: e06098c0
|
|
# tb_core.u_sdram32 : at time 44013.0 ns READ : Bank = 3 Row = 271, Col = 191, Data = bf53b47e
|
|
# READ STATUS: Burst-No: 23 Addr: 0010feca Rxd: 2ca96359
|
|
# tb_core.u_sdram32 : at time 44023.0 ns READ : Bank = 3 Row = 271, Col = 192, Data = 2a1d7354
|
|
# READ STATUS: Burst-No: 24 Addr: 0010fecc Rxd: bf53b47e
|
|
# tb_core.u_sdram32 : at time 44033.0 ns READ : Bank = 3 Row = 271, Col = 193, Data = a8e2e251
|
|
# READ STATUS: Burst-No: 25 Addr: 0010fece Rxd: 2a1d7354
|
|
# tb_core.u_sdram32 : at time 44043.0 ns READ : Bank = 3 Row = 271, Col = 194, Data = a4de2849
|
|
# READ STATUS: Burst-No: 26 Addr: 0010fed0 Rxd: a8e2e251
|
|
# tb_core.u_sdram32 : at time 44053.0 ns READ : Bank = 3 Row = 271, Col = 195, Data = 73fa7de7
|
|
# READ STATUS: Burst-No: 27 Addr: 0010fed2 Rxd: a4de2849
|
|
# tb_core.u_sdram32 : at time 44063.0 ns READ : Bank = 3 Row = 271, Col = 196, Data = 123aaf24
|
|
# READ STATUS: Burst-No: 28 Addr: 0010fed4 Rxd: 73fa7de7
|
|
# tb_core.u_sdram32 : at time 44073.0 ns READ : Bank = 3 Row = 271, Col = 197, Data = 41b5d583
|
|
# READ STATUS: Burst-No: 29 Addr: 0010fed6 Rxd: 123aaf24
|
|
# tb_core.u_sdram32 : at time 44083.0 ns READ : Bank = 3 Row = 271, Col = 198, Data = adee005b
|
|
# READ STATUS: Burst-No: 30 Addr: 0010fed8 Rxd: 41b5d583
|
|
# tb_core.u_sdram32 : at time 44093.0 ns READ : Bank = 3 Row = 271, Col = 199, Data = 5cdea1b9
|
|
# READ STATUS: Burst-No: 31 Addr: 0010feda Rxd: adee005b
|
|
# tb_core.u_sdram32 : at time 44103.0 ns READ : Bank = 3 Row = 271, Col = 200, Data = 4afebf95
|
|
# READ STATUS: Burst-No: 32 Addr: 0010fedc Rxd: 5cdea1b9
|
|
# tb_core.u_sdram32 : at time 44113.0 ns READ : Bank = 3 Row = 271, Col = 201, Data = bb934a77
|
|
# READ STATUS: Burst-No: 33 Addr: 0010fede Rxd: 4afebf95
|
|
# tb_core.u_sdram32 : at time 44123.0 ns READ : Bank = 3 Row = 271, Col = 202, Data = f8da1af1
|
|
# READ STATUS: Burst-No: 34 Addr: 0010fee0 Rxd: bb934a77
|
|
# tb_core.u_sdram32 : at time 44133.0 ns READ : Bank = 3 Row = 271, Col = 203, Data = 732c5fe6
|
|
# READ STATUS: Burst-No: 35 Addr: 0010fee2 Rxd: f8da1af1
|
|
# tb_core.u_sdram32 : at time 44143.0 ns READ : Bank = 3 Row = 271, Col = 204, Data = d7e1aeaf
|
|
# READ STATUS: Burst-No: 36 Addr: 0010fee4 Rxd: 732c5fe6
|
|
# tb_core.u_sdram32 : at time 44153.0 ns READ : Bank = 3 Row = 271, Col = 205, Data = 0238e104
|
|
# READ STATUS: Burst-No: 37 Addr: 0010fee6 Rxd: d7e1aeaf
|
|
# tb_core.u_sdram32 : at time 44163.0 ns READ : Bank = 3 Row = 271, Col = 206, Data = 89646012
|
|
# READ STATUS: Burst-No: 38 Addr: 0010fee8 Rxd: 0238e104
|
|
# tb_core.u_sdram32 : at time 44173.0 ns READ : Bank = 3 Row = 271, Col = 207, Data = 7e29b3fc
|
|
# READ STATUS: Burst-No: 39 Addr: 0010feea Rxd: 89646012
|
|
# tb_core.u_sdram32 : at time 44183.0 ns READ : Bank = 3 Row = 271, Col = 208, Data = d5ba48ab
|
|
# READ STATUS: Burst-No: 40 Addr: 0010feec Rxd: 7e29b3fc
|
|
# tb_core.u_sdram32 : at time 44193.0 ns READ : Bank = 3 Row = 271, Col = 209, Data = e203f0c4
|
|
# READ STATUS: Burst-No: 41 Addr: 0010feee Rxd: d5ba48ab
|
|
# tb_core.u_sdram32 : at time 44203.0 ns READ : Bank = 3 Row = 271, Col = 210, Data = 1ffb813f
|
|
# READ STATUS: Burst-No: 42 Addr: 0010fef0 Rxd: e203f0c4
|
|
# tb_core.u_sdram32 : at time 44213.0 ns READ : Bank = 3 Row = 271, Col = 211, Data = e13256c2
|
|
# READ STATUS: Burst-No: 43 Addr: 0010fef2 Rxd: 1ffb813f
|
|
# tb_core.u_sdram32 : at time 44223.0 ns READ : Bank = 3 Row = 271, Col = 212, Data = 398a1973
|
|
# READ STATUS: Burst-No: 44 Addr: 0010fef4 Rxd: e13256c2
|
|
# tb_core.u_sdram32 : at time 44233.0 ns READ : Bank = 3 Row = 271, Col = 213, Data = 2d4d9b5a
|
|
# READ STATUS: Burst-No: 45 Addr: 0010fef6 Rxd: 398a1973
|
|
# tb_core.u_sdram32 : at time 44243.0 ns READ : Bank = 3 Row = 271, Col = 214, Data = d066e4a0
|
|
# READ STATUS: Burst-No: 46 Addr: 0010fef8 Rxd: 2d4d9b5a
|
|
# tb_core.u_sdram32 : at time 44253.0 ns READ : Bank = 3 Row = 271, Col = 215, Data = ff73cafe
|
|
# READ STATUS: Burst-No: 47 Addr: 0010fefa Rxd: d066e4a0
|
|
# tb_core.u_sdram32 : at time 44263.0 ns READ : Bank = 3 Row = 271, Col = 216, Data = 3a096b74
|
|
# READ STATUS: Burst-No: 48 Addr: 0010fefc Rxd: ff73cafe
|
|
# tb_core.u_sdram32 : at time 44273.0 ns READ : Bank = 3 Row = 271, Col = 217, Data = 5d86b7bb
|
|
# READ STATUS: Burst-No: 49 Addr: 0010fefe Rxd: 3a096b74
|
|
# tb_core.u_sdram32 : at time 44283.0 ns READ : Bank = 3 Row = 271, Col = 218, Data = 7132bbe2
|
|
# READ STATUS: Burst-No: 50 Addr: 0010ff00 Rxd: 5d86b7bb
|
|
# tb_core.u_sdram32 : at time 44293.0 ns READ : Bank = 3 Row = 271, Col = 219, Data = f16948e2
|
|
# READ STATUS: Burst-No: 51 Addr: 0010ff02 Rxd: 7132bbe2
|
|
# tb_core.u_sdram32 : at time 44303.0 ns READ : Bank = 3 Row = 271, Col = 220, Data = eff34cdf
|
|
# READ STATUS: Burst-No: 52 Addr: 0010ff04 Rxd: f16948e2
|
|
# tb_core.u_sdram32 : at time 44313.0 ns READ : Bank = 3 Row = 271, Col = 221, Data = cc13e298
|
|
# READ STATUS: Burst-No: 53 Addr: 0010ff06 Rxd: eff34cdf
|
|
# tb_core.u_sdram32 : at time 44323.0 ns READ : Bank = 3 Row = 271, Col = 222, Data = 4fdbed9f
|
|
# READ STATUS: Burst-No: 54 Addr: 0010ff08 Rxd: cc13e298
|
|
# tb_core.u_sdram32 : at time 44333.0 ns READ : Bank = 3 Row = 271, Col = 223, Data = 0817cb10
|
|
# READ STATUS: Burst-No: 55 Addr: 0010ff0a Rxd: 4fdbed9f
|
|
# tb_core.u_sdram32 : at time 44343.0 ns READ : Bank = 3 Row = 271, Col = 224, Data = 791189f2
|
|
# READ STATUS: Burst-No: 56 Addr: 0010ff0c Rxd: 0817cb10
|
|
# tb_core.u_sdram32 : at time 44353.0 ns READ : Bank = 3 Row = 271, Col = 225, Data = 5ee97bbd
|
|
# tb_core.u_sdram32 : at time 44357.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 57 Addr: 0010ff0e Rxd: 791189f2
|
|
# tb_core.u_sdram32 : at time 44363.0 ns READ : Bank = 3 Row = 271, Col = 226, Data = 55bc27ab
|
|
# READ STATUS: Burst-No: 58 Addr: 0010ff10 Rxd: 5ee97bbd
|
|
# tb_core.u_sdram32 : at time 44373.0 ns READ : Bank = 3 Row = 271, Col = 227, Data = 5a0a0fb4
|
|
# READ STATUS: Burst-No: 59 Addr: 0010ff12 Rxd: 55bc27ab
|
|
# READ STATUS: Burst-No: 60 Addr: 0010ff14 Rxd: 5a0a0fb4
|
|
# tb_core.u_sdram32 : at time 44547.0 ns ACT : Bank = 3 Row = 138
|
|
# tb_core.u_sdram32 : at time 44603.0 ns READ : Bank = 3 Row = 138, Col = 21, Data = 89b5d413
|
|
# tb_core.u_sdram32 : at time 44613.0 ns READ : Bank = 3 Row = 138, Col = 22, Data = 560c91ac
|
|
# READ STATUS: Burst-No: 0 Addr: 0008ac54 Rxd: 89b5d413
|
|
# tb_core.u_sdram32 : at time 44623.0 ns READ : Bank = 3 Row = 138, Col = 23, Data = 1ae40335
|
|
# READ STATUS: Burst-No: 1 Addr: 0008ac56 Rxd: 560c91ac
|
|
# tb_core.u_sdram32 : at time 44633.0 ns READ : Bank = 3 Row = 138, Col = 24, Data = 1df61f3b
|
|
# READ STATUS: Burst-No: 2 Addr: 0008ac58 Rxd: 1ae40335
|
|
# tb_core.u_sdram32 : at time 44643.0 ns READ : Bank = 3 Row = 138, Col = 25, Data = 9aa02435
|
|
# READ STATUS: Burst-No: 3 Addr: 0008ac5a Rxd: 1df61f3b
|
|
# tb_core.u_sdram32 : at time 44653.0 ns READ : Bank = 3 Row = 138, Col = 26, Data = 17a98d2f
|
|
# READ STATUS: Burst-No: 4 Addr: 0008ac5c Rxd: 9aa02435
|
|
# tb_core.u_sdram32 : at time 44663.0 ns READ : Bank = 3 Row = 138, Col = 27, Data = 1a619934
|
|
# READ STATUS: Burst-No: 5 Addr: 0008ac5e Rxd: 17a98d2f
|
|
# tb_core.u_sdram32 : at time 44673.0 ns READ : Bank = 3 Row = 138, Col = 28, Data = aae0a255
|
|
# tb_core.u_sdram32 : at time 44677.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 6 Addr: 0008ac60 Rxd: 1a619934
|
|
# tb_core.u_sdram32 : at time 44683.0 ns READ : Bank = 3 Row = 138, Col = 29, Data = de7302bc
|
|
# READ STATUS: Burst-No: 7 Addr: 0008ac62 Rxd: aae0a255
|
|
# tb_core.u_sdram32 : at time 44693.0 ns READ : Bank = 3 Row = 138, Col = 30, Data = f964fef2
|
|
# READ STATUS: Burst-No: 8 Addr: 0008ac64 Rxd: de7302bc
|
|
# READ STATUS: Burst-No: 9 Addr: 0008ac66 Rxd: f964fef2
|
|
# Write Address: 003e36a7, Burst Size: 2
|
|
# tb_core.u_sdram32 : at time 44867.0 ns ACT : Bank = 1 Row = 995
|
|
# tb_core.u_sdram32 : at time 44897.0 ns WRITE: Bank = 1 Row = 995, Col = 169, Data = f23316e4
|
|
# Status: Burst-No: 0 Write Address: 003e36a7 WriteData: f23316e4
|
|
# tb_core.u_sdram32 : at time 44907.0 ns WRITE: Bank = 1 Row = 995, Col = 170, Data = a0b8a241
|
|
# Status: Burst-No: 1 Write Address: 003e36a7 WriteData: a0b8a241
|
|
# tb_core.u_sdram32 : at time 44917.0 ns BST : Burst Terminate
|
|
# Write Address: 00016c69, Burst Size: 59
|
|
# tb_core.u_sdram32 : at time 45057.0 ns ACT : Bank = 3 Row = 22
|
|
# tb_core.u_sdram32 : at time 45087.0 ns WRITE: Bank = 3 Row = 22, Col = 26, Data = e69dd0cd
|
|
# Status: Burst-No: 0 Write Address: 00016c69 WriteData: e69dd0cd
|
|
# tb_core.u_sdram32 : at time 45097.0 ns WRITE: Bank = 3 Row = 22, Col = 27, Data = 7fcff3ff
|
|
# Status: Burst-No: 1 Write Address: 00016c69 WriteData: 7fcff3ff
|
|
# tb_core.u_sdram32 : at time 45107.0 ns WRITE: Bank = 3 Row = 22, Col = 28, Data = dac986b5
|
|
# Status: Burst-No: 2 Write Address: 00016c69 WriteData: dac986b5
|
|
# tb_core.u_sdram32 : at time 45117.0 ns WRITE: Bank = 3 Row = 22, Col = 29, Data = f42082e8
|
|
# Status: Burst-No: 3 Write Address: 00016c69 WriteData: f42082e8
|
|
# tb_core.u_sdram32 : at time 45127.0 ns WRITE: Bank = 3 Row = 22, Col = 30, Data = a5955c4b
|
|
# Status: Burst-No: 4 Write Address: 00016c69 WriteData: a5955c4b
|
|
# tb_core.u_sdram32 : at time 45137.0 ns WRITE: Bank = 3 Row = 22, Col = 31, Data = 89042e12
|
|
# Status: Burst-No: 5 Write Address: 00016c69 WriteData: 89042e12
|
|
# tb_core.u_sdram32 : at time 45147.0 ns WRITE: Bank = 3 Row = 22, Col = 32, Data = 1b978f37
|
|
# Status: Burst-No: 6 Write Address: 00016c69 WriteData: 1b978f37
|
|
# tb_core.u_sdram32 : at time 45157.0 ns WRITE: Bank = 3 Row = 22, Col = 33, Data = 574e1dae
|
|
# Status: Burst-No: 7 Write Address: 00016c69 WriteData: 574e1dae
|
|
# tb_core.u_sdram32 : at time 45167.0 ns WRITE: Bank = 3 Row = 22, Col = 34, Data = fc4ca4f8
|
|
# Status: Burst-No: 8 Write Address: 00016c69 WriteData: fc4ca4f8
|
|
# tb_core.u_sdram32 : at time 45177.0 ns WRITE: Bank = 3 Row = 22, Col = 35, Data = 90184e20
|
|
# Status: Burst-No: 9 Write Address: 00016c69 WriteData: 90184e20
|
|
# tb_core.u_sdram32 : at time 45187.0 ns WRITE: Bank = 3 Row = 22, Col = 36, Data = ed1b50da
|
|
# Status: Burst-No: 10 Write Address: 00016c69 WriteData: ed1b50da
|
|
# tb_core.u_sdram32 : at time 45197.0 ns WRITE: Bank = 3 Row = 22, Col = 37, Data = 913e0222
|
|
# Status: Burst-No: 11 Write Address: 00016c69 WriteData: 913e0222
|
|
# tb_core.u_sdram32 : at time 45207.0 ns WRITE: Bank = 3 Row = 22, Col = 38, Data = 763355ec
|
|
# Status: Burst-No: 12 Write Address: 00016c69 WriteData: 763355ec
|
|
# tb_core.u_sdram32 : at time 45217.0 ns WRITE: Bank = 3 Row = 22, Col = 39, Data = 9535122a
|
|
# Status: Burst-No: 13 Write Address: 00016c69 WriteData: 9535122a
|
|
# tb_core.u_sdram32 : at time 45227.0 ns WRITE: Bank = 3 Row = 22, Col = 40, Data = 3d7f5b7a
|
|
# Status: Burst-No: 14 Write Address: 00016c69 WriteData: 3d7f5b7a
|
|
# tb_core.u_sdram32 : at time 45237.0 ns WRITE: Bank = 3 Row = 22, Col = 41, Data = 0f1e511e
|
|
# Status: Burst-No: 15 Write Address: 00016c69 WriteData: 0f1e511e
|
|
# tb_core.u_sdram32 : at time 45247.0 ns WRITE: Bank = 3 Row = 22, Col = 42, Data = f4a1dae9
|
|
# Status: Burst-No: 16 Write Address: 00016c69 WriteData: f4a1dae9
|
|
# tb_core.u_sdram32 : at time 45257.0 ns WRITE: Bank = 3 Row = 22, Col = 43, Data = f5a4f2eb
|
|
# Status: Burst-No: 17 Write Address: 00016c69 WriteData: f5a4f2eb
|
|
# tb_core.u_sdram32 : at time 45267.0 ns WRITE: Bank = 3 Row = 22, Col = 44, Data = 05b4f70b
|
|
# Status: Burst-No: 18 Write Address: 00016c69 WriteData: 05b4f70b
|
|
# tb_core.u_sdram32 : at time 45277.0 ns WRITE: Bank = 3 Row = 22, Col = 45, Data = b704e26e
|
|
# Status: Burst-No: 19 Write Address: 00016c69 WriteData: b704e26e
|
|
# tb_core.u_sdram32 : at time 45287.0 ns WRITE: Bank = 3 Row = 22, Col = 46, Data = af455e5e
|
|
# Status: Burst-No: 20 Write Address: 00016c69 WriteData: af455e5e
|
|
# tb_core.u_sdram32 : at time 45297.0 ns WRITE: Bank = 3 Row = 22, Col = 47, Data = 3e502d7c
|
|
# Status: Burst-No: 21 Write Address: 00016c69 WriteData: 3e502d7c
|
|
# tb_core.u_sdram32 : at time 45307.0 ns WRITE: Bank = 3 Row = 22, Col = 48, Data = 22c03145
|
|
# Status: Burst-No: 22 Write Address: 00016c69 WriteData: 22c03145
|
|
# tb_core.u_sdram32 : at time 45317.0 ns WRITE: Bank = 3 Row = 22, Col = 49, Data = c5cb548b
|
|
# Status: Burst-No: 23 Write Address: 00016c69 WriteData: c5cb548b
|
|
# tb_core.u_sdram32 : at time 45327.0 ns WRITE: Bank = 3 Row = 22, Col = 50, Data = 094bd312
|
|
# Status: Burst-No: 24 Write Address: 00016c69 WriteData: 094bd312
|
|
# tb_core.u_sdram32 : at time 45337.0 ns WRITE: Bank = 3 Row = 22, Col = 51, Data = 1bf8bd37
|
|
# Status: Burst-No: 25 Write Address: 00016c69 WriteData: 1bf8bd37
|
|
# tb_core.u_sdram32 : at time 45347.0 ns WRITE: Bank = 3 Row = 22, Col = 52, Data = c1c3d683
|
|
# Status: Burst-No: 26 Write Address: 00016c69 WriteData: c1c3d683
|
|
# tb_core.u_sdram32 : at time 45357.0 ns WRITE: Bank = 3 Row = 22, Col = 53, Data = f0ab00e1
|
|
# Status: Burst-No: 27 Write Address: 00016c69 WriteData: f0ab00e1
|
|
# tb_core.u_sdram32 : at time 45367.0 ns WRITE: Bank = 3 Row = 22, Col = 54, Data = 674fdfce
|
|
# Status: Burst-No: 28 Write Address: 00016c69 WriteData: 674fdfce
|
|
# tb_core.u_sdram32 : at time 45377.0 ns WRITE: Bank = 3 Row = 22, Col = 55, Data = a5365c4a
|
|
# Status: Burst-No: 29 Write Address: 00016c69 WriteData: a5365c4a
|
|
# tb_core.u_sdram32 : at time 45387.0 ns WRITE: Bank = 3 Row = 22, Col = 56, Data = 6acd73d5
|
|
# Status: Burst-No: 30 Write Address: 00016c69 WriteData: 6acd73d5
|
|
# tb_core.u_sdram32 : at time 45397.0 ns WRITE: Bank = 3 Row = 22, Col = 57, Data = 669907cd
|
|
# Status: Burst-No: 31 Write Address: 00016c69 WriteData: 669907cd
|
|
# tb_core.u_sdram32 : at time 45407.0 ns WRITE: Bank = 3 Row = 22, Col = 58, Data = f204eee4
|
|
# Status: Burst-No: 32 Write Address: 00016c69 WriteData: f204eee4
|
|
# tb_core.u_sdram32 : at time 45417.0 ns WRITE: Bank = 3 Row = 22, Col = 59, Data = fa328cf4
|
|
# Status: Burst-No: 33 Write Address: 00016c69 WriteData: fa328cf4
|
|
# tb_core.u_sdram32 : at time 45427.0 ns WRITE: Bank = 3 Row = 22, Col = 60, Data = 766153ec
|
|
# Status: Burst-No: 34 Write Address: 00016c69 WriteData: 766153ec
|
|
# tb_core.u_sdram32 : at time 45437.0 ns WRITE: Bank = 3 Row = 22, Col = 61, Data = 0d623f1a
|
|
# Status: Burst-No: 35 Write Address: 00016c69 WriteData: 0d623f1a
|
|
# tb_core.u_sdram32 : at time 45447.0 ns WRITE: Bank = 3 Row = 22, Col = 62, Data = f1a32ee3
|
|
# Status: Burst-No: 36 Write Address: 00016c69 WriteData: f1a32ee3
|
|
# tb_core.u_sdram32 : at time 45457.0 ns WRITE: Bank = 3 Row = 22, Col = 63, Data = f62484ec
|
|
# Status: Burst-No: 37 Write Address: 00016c69 WriteData: f62484ec
|
|
# tb_core.u_sdram32 : at time 45467.0 ns WRITE: Bank = 3 Row = 22, Col = 64, Data = 79c681f3
|
|
# Status: Burst-No: 38 Write Address: 00016c69 WriteData: 79c681f3
|
|
# tb_core.u_sdram32 : at time 45477.0 ns WRITE: Bank = 3 Row = 22, Col = 65, Data = 1687472d
|
|
# Status: Burst-No: 39 Write Address: 00016c69 WriteData: 1687472d
|
|
# tb_core.u_sdram32 : at time 45487.0 ns WRITE: Bank = 3 Row = 22, Col = 66, Data = 2e138d5c
|
|
# Status: Burst-No: 40 Write Address: 00016c69 WriteData: 2e138d5c
|
|
# tb_core.u_sdram32 : at time 45497.0 ns WRITE: Bank = 3 Row = 22, Col = 67, Data = 6e8d45dd
|
|
# Status: Burst-No: 41 Write Address: 00016c69 WriteData: 6e8d45dd
|
|
# tb_core.u_sdram32 : at time 45507.0 ns WRITE: Bank = 3 Row = 22, Col = 68, Data = f612c8ec
|
|
# Status: Burst-No: 42 Write Address: 00016c69 WriteData: f612c8ec
|
|
# tb_core.u_sdram32 : at time 45517.0 ns WRITE: Bank = 3 Row = 22, Col = 69, Data = c7d87a8f
|
|
# Status: Burst-No: 43 Write Address: 00016c69 WriteData: c7d87a8f
|
|
# tb_core.u_sdram32 : at time 45527.0 ns WRITE: Bank = 3 Row = 22, Col = 70, Data = 7fdbb3ff
|
|
# Status: Burst-No: 44 Write Address: 00016c69 WriteData: 7fdbb3ff
|
|
# tb_core.u_sdram32 : at time 45537.0 ns WRITE: Bank = 3 Row = 22, Col = 71, Data = 3c338578
|
|
# Status: Burst-No: 45 Write Address: 00016c69 WriteData: 3c338578
|
|
# tb_core.u_sdram32 : at time 45547.0 ns WRITE: Bank = 3 Row = 22, Col = 72, Data = 55f6b9ab
|
|
# Status: Burst-No: 46 Write Address: 00016c69 WriteData: 55f6b9ab
|
|
# tb_core.u_sdram32 : at time 45557.0 ns WRITE: Bank = 3 Row = 22, Col = 73, Data = 13d1f727
|
|
# Status: Burst-No: 47 Write Address: 00016c69 WriteData: 13d1f727
|
|
# tb_core.u_sdram32 : at time 45567.0 ns WRITE: Bank = 3 Row = 22, Col = 74, Data = 7dca0ffb
|
|
# Status: Burst-No: 48 Write Address: 00016c69 WriteData: 7dca0ffb
|
|
# tb_core.u_sdram32 : at time 45577.0 ns WRITE: Bank = 3 Row = 22, Col = 75, Data = 09dfc313
|
|
# Status: Burst-No: 49 Write Address: 00016c69 WriteData: 09dfc313
|
|
# tb_core.u_sdram32 : at time 45587.0 ns WRITE: Bank = 3 Row = 22, Col = 76, Data = 06499b0c
|
|
# Status: Burst-No: 50 Write Address: 00016c69 WriteData: 06499b0c
|
|
# tb_core.u_sdram32 : at time 45597.0 ns WRITE: Bank = 3 Row = 22, Col = 77, Data = 5db797bb
|
|
# Status: Burst-No: 51 Write Address: 00016c69 WriteData: 5db797bb
|
|
# tb_core.u_sdram32 : at time 45607.0 ns WRITE: Bank = 3 Row = 22, Col = 78, Data = f361cae6
|
|
# Status: Burst-No: 52 Write Address: 00016c69 WriteData: f361cae6
|
|
# tb_core.u_sdram32 : at time 45617.0 ns WRITE: Bank = 3 Row = 22, Col = 79, Data = a4d83a49
|
|
# Status: Burst-No: 53 Write Address: 00016c69 WriteData: a4d83a49
|
|
# tb_core.u_sdram32 : at time 45627.0 ns WRITE: Bank = 3 Row = 22, Col = 80, Data = 35557b6a
|
|
# Status: Burst-No: 54 Write Address: 00016c69 WriteData: 35557b6a
|
|
# tb_core.u_sdram32 : at time 45637.0 ns WRITE: Bank = 3 Row = 22, Col = 81, Data = 8570f60a
|
|
# Status: Burst-No: 55 Write Address: 00016c69 WriteData: 8570f60a
|
|
# tb_core.u_sdram32 : at time 45647.0 ns WRITE: Bank = 3 Row = 22, Col = 82, Data = 8c06d218
|
|
# Status: Burst-No: 56 Write Address: 00016c69 WriteData: 8c06d218
|
|
# tb_core.u_sdram32 : at time 45657.0 ns WRITE: Bank = 3 Row = 22, Col = 83, Data = 4b1ce996
|
|
# Status: Burst-No: 57 Write Address: 00016c69 WriteData: 4b1ce996
|
|
# tb_core.u_sdram32 : at time 45667.0 ns WRITE: Bank = 3 Row = 22, Col = 84, Data = 84e32609
|
|
# Status: Burst-No: 58 Write Address: 00016c69 WriteData: 84e32609
|
|
# tb_core.u_sdram32 : at time 45677.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 45807.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 45813.0 ns READ : Bank = 1 Row = 995, Col = 169, Data = f23316e4
|
|
# tb_core.u_sdram32 : at time 45823.0 ns READ : Bank = 1 Row = 995, Col = 170, Data = a0b8a241
|
|
# READ STATUS: Burst-No: 0 Addr: 003e36a7 Rxd: f23316e4
|
|
# READ STATUS: Burst-No: 1 Addr: 003e36a9 Rxd: a0b8a241
|
|
# tb_core.u_sdram32 : at time 45993.0 ns READ : Bank = 3 Row = 22, Col = 26, Data = e69dd0cd
|
|
# tb_core.u_sdram32 : at time 46003.0 ns READ : Bank = 3 Row = 22, Col = 27, Data = 7fcff3ff
|
|
# READ STATUS: Burst-No: 0 Addr: 00016c69 Rxd: e69dd0cd
|
|
# tb_core.u_sdram32 : at time 46013.0 ns READ : Bank = 3 Row = 22, Col = 28, Data = dac986b5
|
|
# READ STATUS: Burst-No: 1 Addr: 00016c6b Rxd: 7fcff3ff
|
|
# tb_core.u_sdram32 : at time 46023.0 ns READ : Bank = 3 Row = 22, Col = 29, Data = f42082e8
|
|
# READ STATUS: Burst-No: 2 Addr: 00016c6d Rxd: dac986b5
|
|
# tb_core.u_sdram32 : at time 46033.0 ns READ : Bank = 3 Row = 22, Col = 30, Data = a5955c4b
|
|
# READ STATUS: Burst-No: 3 Addr: 00016c6f Rxd: f42082e8
|
|
# tb_core.u_sdram32 : at time 46043.0 ns READ : Bank = 3 Row = 22, Col = 31, Data = 89042e12
|
|
# READ STATUS: Burst-No: 4 Addr: 00016c71 Rxd: a5955c4b
|
|
# tb_core.u_sdram32 : at time 46053.0 ns READ : Bank = 3 Row = 22, Col = 32, Data = 1b978f37
|
|
# READ STATUS: Burst-No: 5 Addr: 00016c73 Rxd: 89042e12
|
|
# tb_core.u_sdram32 : at time 46063.0 ns READ : Bank = 3 Row = 22, Col = 33, Data = 574e1dae
|
|
# READ STATUS: Burst-No: 6 Addr: 00016c75 Rxd: 1b978f37
|
|
# tb_core.u_sdram32 : at time 46073.0 ns READ : Bank = 3 Row = 22, Col = 34, Data = fc4ca4f8
|
|
# READ STATUS: Burst-No: 7 Addr: 00016c77 Rxd: 574e1dae
|
|
# tb_core.u_sdram32 : at time 46083.0 ns READ : Bank = 3 Row = 22, Col = 35, Data = 90184e20
|
|
# READ STATUS: Burst-No: 8 Addr: 00016c79 Rxd: fc4ca4f8
|
|
# tb_core.u_sdram32 : at time 46093.0 ns READ : Bank = 3 Row = 22, Col = 36, Data = ed1b50da
|
|
# READ STATUS: Burst-No: 9 Addr: 00016c7b Rxd: 90184e20
|
|
# tb_core.u_sdram32 : at time 46103.0 ns READ : Bank = 3 Row = 22, Col = 37, Data = 913e0222
|
|
# READ STATUS: Burst-No: 10 Addr: 00016c7d Rxd: ed1b50da
|
|
# tb_core.u_sdram32 : at time 46113.0 ns READ : Bank = 3 Row = 22, Col = 38, Data = 763355ec
|
|
# READ STATUS: Burst-No: 11 Addr: 00016c7f Rxd: 913e0222
|
|
# tb_core.u_sdram32 : at time 46123.0 ns READ : Bank = 3 Row = 22, Col = 39, Data = 9535122a
|
|
# READ STATUS: Burst-No: 12 Addr: 00016c81 Rxd: 763355ec
|
|
# tb_core.u_sdram32 : at time 46133.0 ns READ : Bank = 3 Row = 22, Col = 40, Data = 3d7f5b7a
|
|
# READ STATUS: Burst-No: 13 Addr: 00016c83 Rxd: 9535122a
|
|
# tb_core.u_sdram32 : at time 46143.0 ns READ : Bank = 3 Row = 22, Col = 41, Data = 0f1e511e
|
|
# READ STATUS: Burst-No: 14 Addr: 00016c85 Rxd: 3d7f5b7a
|
|
# tb_core.u_sdram32 : at time 46153.0 ns READ : Bank = 3 Row = 22, Col = 42, Data = f4a1dae9
|
|
# READ STATUS: Burst-No: 15 Addr: 00016c87 Rxd: 0f1e511e
|
|
# tb_core.u_sdram32 : at time 46163.0 ns READ : Bank = 3 Row = 22, Col = 43, Data = f5a4f2eb
|
|
# READ STATUS: Burst-No: 16 Addr: 00016c89 Rxd: f4a1dae9
|
|
# tb_core.u_sdram32 : at time 46173.0 ns READ : Bank = 3 Row = 22, Col = 44, Data = 05b4f70b
|
|
# READ STATUS: Burst-No: 17 Addr: 00016c8b Rxd: f5a4f2eb
|
|
# tb_core.u_sdram32 : at time 46183.0 ns READ : Bank = 3 Row = 22, Col = 45, Data = b704e26e
|
|
# READ STATUS: Burst-No: 18 Addr: 00016c8d Rxd: 05b4f70b
|
|
# tb_core.u_sdram32 : at time 46193.0 ns READ : Bank = 3 Row = 22, Col = 46, Data = af455e5e
|
|
# READ STATUS: Burst-No: 19 Addr: 00016c8f Rxd: b704e26e
|
|
# tb_core.u_sdram32 : at time 46203.0 ns READ : Bank = 3 Row = 22, Col = 47, Data = 3e502d7c
|
|
# READ STATUS: Burst-No: 20 Addr: 00016c91 Rxd: af455e5e
|
|
# tb_core.u_sdram32 : at time 46213.0 ns READ : Bank = 3 Row = 22, Col = 48, Data = 22c03145
|
|
# READ STATUS: Burst-No: 21 Addr: 00016c93 Rxd: 3e502d7c
|
|
# tb_core.u_sdram32 : at time 46223.0 ns READ : Bank = 3 Row = 22, Col = 49, Data = c5cb548b
|
|
# READ STATUS: Burst-No: 22 Addr: 00016c95 Rxd: 22c03145
|
|
# tb_core.u_sdram32 : at time 46233.0 ns READ : Bank = 3 Row = 22, Col = 50, Data = 094bd312
|
|
# READ STATUS: Burst-No: 23 Addr: 00016c97 Rxd: c5cb548b
|
|
# tb_core.u_sdram32 : at time 46243.0 ns READ : Bank = 3 Row = 22, Col = 51, Data = 1bf8bd37
|
|
# READ STATUS: Burst-No: 24 Addr: 00016c99 Rxd: 094bd312
|
|
# tb_core.u_sdram32 : at time 46253.0 ns READ : Bank = 3 Row = 22, Col = 52, Data = c1c3d683
|
|
# READ STATUS: Burst-No: 25 Addr: 00016c9b Rxd: 1bf8bd37
|
|
# tb_core.u_sdram32 : at time 46263.0 ns READ : Bank = 3 Row = 22, Col = 53, Data = f0ab00e1
|
|
# READ STATUS: Burst-No: 26 Addr: 00016c9d Rxd: c1c3d683
|
|
# tb_core.u_sdram32 : at time 46273.0 ns READ : Bank = 3 Row = 22, Col = 54, Data = 674fdfce
|
|
# READ STATUS: Burst-No: 27 Addr: 00016c9f Rxd: f0ab00e1
|
|
# tb_core.u_sdram32 : at time 46283.0 ns READ : Bank = 3 Row = 22, Col = 55, Data = a5365c4a
|
|
# READ STATUS: Burst-No: 28 Addr: 00016ca1 Rxd: 674fdfce
|
|
# tb_core.u_sdram32 : at time 46293.0 ns READ : Bank = 3 Row = 22, Col = 56, Data = 6acd73d5
|
|
# READ STATUS: Burst-No: 29 Addr: 00016ca3 Rxd: a5365c4a
|
|
# tb_core.u_sdram32 : at time 46303.0 ns READ : Bank = 3 Row = 22, Col = 57, Data = 669907cd
|
|
# READ STATUS: Burst-No: 30 Addr: 00016ca5 Rxd: 6acd73d5
|
|
# tb_core.u_sdram32 : at time 46313.0 ns READ : Bank = 3 Row = 22, Col = 58, Data = f204eee4
|
|
# READ STATUS: Burst-No: 31 Addr: 00016ca7 Rxd: 669907cd
|
|
# tb_core.u_sdram32 : at time 46323.0 ns READ : Bank = 3 Row = 22, Col = 59, Data = fa328cf4
|
|
# READ STATUS: Burst-No: 32 Addr: 00016ca9 Rxd: f204eee4
|
|
# tb_core.u_sdram32 : at time 46333.0 ns READ : Bank = 3 Row = 22, Col = 60, Data = 766153ec
|
|
# READ STATUS: Burst-No: 33 Addr: 00016cab Rxd: fa328cf4
|
|
# tb_core.u_sdram32 : at time 46343.0 ns READ : Bank = 3 Row = 22, Col = 61, Data = 0d623f1a
|
|
# READ STATUS: Burst-No: 34 Addr: 00016cad Rxd: 766153ec
|
|
# tb_core.u_sdram32 : at time 46353.0 ns READ : Bank = 3 Row = 22, Col = 62, Data = f1a32ee3
|
|
# READ STATUS: Burst-No: 35 Addr: 00016caf Rxd: 0d623f1a
|
|
# tb_core.u_sdram32 : at time 46363.0 ns READ : Bank = 3 Row = 22, Col = 63, Data = f62484ec
|
|
# READ STATUS: Burst-No: 36 Addr: 00016cb1 Rxd: f1a32ee3
|
|
# tb_core.u_sdram32 : at time 46373.0 ns READ : Bank = 3 Row = 22, Col = 64, Data = 79c681f3
|
|
# READ STATUS: Burst-No: 37 Addr: 00016cb3 Rxd: f62484ec
|
|
# tb_core.u_sdram32 : at time 46383.0 ns READ : Bank = 3 Row = 22, Col = 65, Data = 1687472d
|
|
# READ STATUS: Burst-No: 38 Addr: 00016cb5 Rxd: 79c681f3
|
|
# tb_core.u_sdram32 : at time 46393.0 ns READ : Bank = 3 Row = 22, Col = 66, Data = 2e138d5c
|
|
# READ STATUS: Burst-No: 39 Addr: 00016cb7 Rxd: 1687472d
|
|
# tb_core.u_sdram32 : at time 46403.0 ns READ : Bank = 3 Row = 22, Col = 67, Data = 6e8d45dd
|
|
# READ STATUS: Burst-No: 40 Addr: 00016cb9 Rxd: 2e138d5c
|
|
# tb_core.u_sdram32 : at time 46413.0 ns READ : Bank = 3 Row = 22, Col = 68, Data = f612c8ec
|
|
# READ STATUS: Burst-No: 41 Addr: 00016cbb Rxd: 6e8d45dd
|
|
# tb_core.u_sdram32 : at time 46423.0 ns READ : Bank = 3 Row = 22, Col = 69, Data = c7d87a8f
|
|
# READ STATUS: Burst-No: 42 Addr: 00016cbd Rxd: f612c8ec
|
|
# tb_core.u_sdram32 : at time 46433.0 ns READ : Bank = 3 Row = 22, Col = 70, Data = 7fdbb3ff
|
|
# READ STATUS: Burst-No: 43 Addr: 00016cbf Rxd: c7d87a8f
|
|
# tb_core.u_sdram32 : at time 46443.0 ns READ : Bank = 3 Row = 22, Col = 71, Data = 3c338578
|
|
# READ STATUS: Burst-No: 44 Addr: 00016cc1 Rxd: 7fdbb3ff
|
|
# tb_core.u_sdram32 : at time 46453.0 ns READ : Bank = 3 Row = 22, Col = 72, Data = 55f6b9ab
|
|
# READ STATUS: Burst-No: 45 Addr: 00016cc3 Rxd: 3c338578
|
|
# tb_core.u_sdram32 : at time 46463.0 ns READ : Bank = 3 Row = 22, Col = 73, Data = 13d1f727
|
|
# READ STATUS: Burst-No: 46 Addr: 00016cc5 Rxd: 55f6b9ab
|
|
# tb_core.u_sdram32 : at time 46473.0 ns READ : Bank = 3 Row = 22, Col = 74, Data = 7dca0ffb
|
|
# READ STATUS: Burst-No: 47 Addr: 00016cc7 Rxd: 13d1f727
|
|
# tb_core.u_sdram32 : at time 46483.0 ns READ : Bank = 3 Row = 22, Col = 75, Data = 09dfc313
|
|
# READ STATUS: Burst-No: 48 Addr: 00016cc9 Rxd: 7dca0ffb
|
|
# tb_core.u_sdram32 : at time 46493.0 ns READ : Bank = 3 Row = 22, Col = 76, Data = 06499b0c
|
|
# READ STATUS: Burst-No: 49 Addr: 00016ccb Rxd: 09dfc313
|
|
# tb_core.u_sdram32 : at time 46503.0 ns READ : Bank = 3 Row = 22, Col = 77, Data = 5db797bb
|
|
# READ STATUS: Burst-No: 50 Addr: 00016ccd Rxd: 06499b0c
|
|
# tb_core.u_sdram32 : at time 46513.0 ns READ : Bank = 3 Row = 22, Col = 78, Data = f361cae6
|
|
# READ STATUS: Burst-No: 51 Addr: 00016ccf Rxd: 5db797bb
|
|
# tb_core.u_sdram32 : at time 46523.0 ns READ : Bank = 3 Row = 22, Col = 79, Data = a4d83a49
|
|
# READ STATUS: Burst-No: 52 Addr: 00016cd1 Rxd: f361cae6
|
|
# tb_core.u_sdram32 : at time 46533.0 ns READ : Bank = 3 Row = 22, Col = 80, Data = 35557b6a
|
|
# READ STATUS: Burst-No: 53 Addr: 00016cd3 Rxd: a4d83a49
|
|
# tb_core.u_sdram32 : at time 46543.0 ns READ : Bank = 3 Row = 22, Col = 81, Data = 8570f60a
|
|
# READ STATUS: Burst-No: 54 Addr: 00016cd5 Rxd: 35557b6a
|
|
# tb_core.u_sdram32 : at time 46553.0 ns READ : Bank = 3 Row = 22, Col = 82, Data = 8c06d218
|
|
# tb_core.u_sdram32 : at time 46557.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 55 Addr: 00016cd7 Rxd: 8570f60a
|
|
# tb_core.u_sdram32 : at time 46563.0 ns READ : Bank = 3 Row = 22, Col = 83, Data = 4b1ce996
|
|
# READ STATUS: Burst-No: 56 Addr: 00016cd9 Rxd: 8c06d218
|
|
# tb_core.u_sdram32 : at time 46573.0 ns READ : Bank = 3 Row = 22, Col = 84, Data = 84e32609
|
|
# READ STATUS: Burst-No: 57 Addr: 00016cdb Rxd: 4b1ce996
|
|
# READ STATUS: Burst-No: 58 Addr: 00016cdd Rxd: 84e32609
|
|
# Write Address: 0025712e, Burst Size: 62
|
|
# tb_core.u_sdram32 : at time 46747.0 ns ACT : Bank = 0 Row = 599
|
|
# tb_core.u_sdram32 : at time 46777.0 ns WRITE: Bank = 0 Row = 599, Col = 75, Data = 33638966
|
|
# Status: Burst-No: 0 Write Address: 0025712e WriteData: 33638966
|
|
# tb_core.u_sdram32 : at time 46787.0 ns WRITE: Bank = 0 Row = 599, Col = 76, Data = bb062876
|
|
# Status: Burst-No: 1 Write Address: 0025712e WriteData: bb062876
|
|
# tb_core.u_sdram32 : at time 46797.0 ns WRITE: Bank = 0 Row = 599, Col = 77, Data = 3a982575
|
|
# Status: Burst-No: 2 Write Address: 0025712e WriteData: 3a982575
|
|
# tb_core.u_sdram32 : at time 46807.0 ns WRITE: Bank = 0 Row = 599, Col = 78, Data = c7b43a8f
|
|
# Status: Burst-No: 3 Write Address: 0025712e WriteData: c7b43a8f
|
|
# tb_core.u_sdram32 : at time 46817.0 ns WRITE: Bank = 0 Row = 599, Col = 79, Data = 4ad39595
|
|
# Status: Burst-No: 4 Write Address: 0025712e WriteData: 4ad39595
|
|
# tb_core.u_sdram32 : at time 46827.0 ns WRITE: Bank = 0 Row = 599, Col = 80, Data = 3da8cd7b
|
|
# Status: Burst-No: 5 Write Address: 0025712e WriteData: 3da8cd7b
|
|
# tb_core.u_sdram32 : at time 46837.0 ns WRITE: Bank = 0 Row = 599, Col = 81, Data = be43ea7c
|
|
# Status: Burst-No: 6 Write Address: 0025712e WriteData: be43ea7c
|
|
# tb_core.u_sdram32 : at time 46847.0 ns WRITE: Bank = 0 Row = 599, Col = 82, Data = b7f4306f
|
|
# Status: Burst-No: 7 Write Address: 0025712e WriteData: b7f4306f
|
|
# tb_core.u_sdram32 : at time 46857.0 ns WRITE: Bank = 0 Row = 599, Col = 83, Data = e4824cc9
|
|
# Status: Burst-No: 8 Write Address: 0025712e WriteData: e4824cc9
|
|
# tb_core.u_sdram32 : at time 46867.0 ns WRITE: Bank = 0 Row = 599, Col = 84, Data = e4d820c9
|
|
# Status: Burst-No: 9 Write Address: 0025712e WriteData: e4d820c9
|
|
# tb_core.u_sdram32 : at time 46877.0 ns WRITE: Bank = 0 Row = 599, Col = 85, Data = 5a3761b4
|
|
# Status: Burst-No: 10 Write Address: 0025712e WriteData: 5a3761b4
|
|
# tb_core.u_sdram32 : at time 46887.0 ns WRITE: Bank = 0 Row = 599, Col = 86, Data = 6d48a5da
|
|
# Status: Burst-No: 11 Write Address: 0025712e WriteData: 6d48a5da
|
|
# tb_core.u_sdram32 : at time 46897.0 ns WRITE: Bank = 0 Row = 599, Col = 87, Data = d6aea8ad
|
|
# Status: Burst-No: 12 Write Address: 0025712e WriteData: d6aea8ad
|
|
# tb_core.u_sdram32 : at time 46907.0 ns WRITE: Bank = 0 Row = 599, Col = 88, Data = 6fcff1df
|
|
# Status: Burst-No: 13 Write Address: 0025712e WriteData: 6fcff1df
|
|
# tb_core.u_sdram32 : at time 46917.0 ns WRITE: Bank = 0 Row = 599, Col = 89, Data = 06b0e30d
|
|
# Status: Burst-No: 14 Write Address: 0025712e WriteData: 06b0e30d
|
|
# tb_core.u_sdram32 : at time 46927.0 ns WRITE: Bank = 0 Row = 599, Col = 90, Data = 384d4170
|
|
# Status: Burst-No: 15 Write Address: 0025712e WriteData: 384d4170
|
|
# tb_core.u_sdram32 : at time 46937.0 ns WRITE: Bank = 0 Row = 599, Col = 91, Data = 41bd6783
|
|
# Status: Burst-No: 16 Write Address: 0025712e WriteData: 41bd6783
|
|
# tb_core.u_sdram32 : at time 46947.0 ns WRITE: Bank = 0 Row = 599, Col = 92, Data = a8c6c451
|
|
# Status: Burst-No: 17 Write Address: 0025712e WriteData: a8c6c451
|
|
# tb_core.u_sdram32 : at time 46957.0 ns WRITE: Bank = 0 Row = 599, Col = 93, Data = 027a8d04
|
|
# Status: Burst-No: 18 Write Address: 0025712e WriteData: 027a8d04
|
|
# tb_core.u_sdram32 : at time 46967.0 ns WRITE: Bank = 0 Row = 599, Col = 94, Data = c0467280
|
|
# Status: Burst-No: 19 Write Address: 0025712e WriteData: c0467280
|
|
# tb_core.u_sdram32 : at time 46977.0 ns WRITE: Bank = 0 Row = 599, Col = 95, Data = fcf504f9
|
|
# Status: Burst-No: 20 Write Address: 0025712e WriteData: fcf504f9
|
|
# tb_core.u_sdram32 : at time 46987.0 ns WRITE: Bank = 0 Row = 599, Col = 96, Data = 0379ed06
|
|
# Status: Burst-No: 21 Write Address: 0025712e WriteData: 0379ed06
|
|
# tb_core.u_sdram32 : at time 46997.0 ns WRITE: Bank = 0 Row = 599, Col = 97, Data = e5063aca
|
|
# Status: Burst-No: 22 Write Address: 0025712e WriteData: e5063aca
|
|
# tb_core.u_sdram32 : at time 47007.0 ns WRITE: Bank = 0 Row = 599, Col = 98, Data = ef8d64df
|
|
# Status: Burst-No: 23 Write Address: 0025712e WriteData: ef8d64df
|
|
# tb_core.u_sdram32 : at time 47017.0 ns WRITE: Bank = 0 Row = 599, Col = 99, Data = 64f9bbc9
|
|
# Status: Burst-No: 24 Write Address: 0025712e WriteData: 64f9bbc9
|
|
# tb_core.u_sdram32 : at time 47027.0 ns WRITE: Bank = 0 Row = 599, Col = 100, Data = 42797584
|
|
# Status: Burst-No: 25 Write Address: 0025712e WriteData: 42797584
|
|
# tb_core.u_sdram32 : at time 47037.0 ns WRITE: Bank = 0 Row = 599, Col = 101, Data = d84988b0
|
|
# Status: Burst-No: 26 Write Address: 0025712e WriteData: d84988b0
|
|
# tb_core.u_sdram32 : at time 47047.0 ns WRITE: Bank = 0 Row = 599, Col = 102, Data = 74bc03e9
|
|
# Status: Burst-No: 27 Write Address: 0025712e WriteData: 74bc03e9
|
|
# tb_core.u_sdram32 : at time 47057.0 ns WRITE: Bank = 0 Row = 599, Col = 103, Data = 08098510
|
|
# Status: Burst-No: 28 Write Address: 0025712e WriteData: 08098510
|
|
# tb_core.u_sdram32 : at time 47067.0 ns WRITE: Bank = 0 Row = 599, Col = 104, Data = 6f3425de
|
|
# Status: Burst-No: 29 Write Address: 0025712e WriteData: 6f3425de
|
|
# tb_core.u_sdram32 : at time 47077.0 ns WRITE: Bank = 0 Row = 599, Col = 105, Data = d659d0ac
|
|
# Status: Burst-No: 30 Write Address: 0025712e WriteData: d659d0ac
|
|
# tb_core.u_sdram32 : at time 47087.0 ns WRITE: Bank = 0 Row = 599, Col = 106, Data = 0498fb09
|
|
# Status: Burst-No: 31 Write Address: 0025712e WriteData: 0498fb09
|
|
# tb_core.u_sdram32 : at time 47097.0 ns WRITE: Bank = 0 Row = 599, Col = 107, Data = 6bf823d7
|
|
# Status: Burst-No: 32 Write Address: 0025712e WriteData: 6bf823d7
|
|
# tb_core.u_sdram32 : at time 47107.0 ns WRITE: Bank = 0 Row = 599, Col = 108, Data = 30c38f61
|
|
# Status: Burst-No: 33 Write Address: 0025712e WriteData: 30c38f61
|
|
# tb_core.u_sdram32 : at time 47117.0 ns WRITE: Bank = 0 Row = 599, Col = 109, Data = 86c8320d
|
|
# Status: Burst-No: 34 Write Address: 0025712e WriteData: 86c8320d
|
|
# tb_core.u_sdram32 : at time 47127.0 ns WRITE: Bank = 0 Row = 599, Col = 110, Data = 48c3b791
|
|
# Status: Burst-No: 35 Write Address: 0025712e WriteData: 48c3b791
|
|
# tb_core.u_sdram32 : at time 47137.0 ns WRITE: Bank = 0 Row = 599, Col = 111, Data = e9eb0ed3
|
|
# Status: Burst-No: 36 Write Address: 0025712e WriteData: e9eb0ed3
|
|
# tb_core.u_sdram32 : at time 47147.0 ns WRITE: Bank = 0 Row = 599, Col = 112, Data = 4d77f99a
|
|
# Status: Burst-No: 37 Write Address: 0025712e WriteData: 4d77f99a
|
|
# tb_core.u_sdram32 : at time 47157.0 ns WRITE: Bank = 0 Row = 599, Col = 113, Data = 17bd872f
|
|
# Status: Burst-No: 38 Write Address: 0025712e WriteData: 17bd872f
|
|
# tb_core.u_sdram32 : at time 47167.0 ns WRITE: Bank = 0 Row = 599, Col = 114, Data = 2720634e
|
|
# Status: Burst-No: 39 Write Address: 0025712e WriteData: 2720634e
|
|
# tb_core.u_sdram32 : at time 47177.0 ns WRITE: Bank = 0 Row = 599, Col = 115, Data = 5bd583b7
|
|
# Status: Burst-No: 40 Write Address: 0025712e WriteData: 5bd583b7
|
|
# tb_core.u_sdram32 : at time 47187.0 ns WRITE: Bank = 0 Row = 599, Col = 116, Data = e32472c6
|
|
# Status: Burst-No: 41 Write Address: 0025712e WriteData: e32472c6
|
|
# tb_core.u_sdram32 : at time 47197.0 ns WRITE: Bank = 0 Row = 599, Col = 117, Data = 2ed66b5d
|
|
# Status: Burst-No: 42 Write Address: 0025712e WriteData: 2ed66b5d
|
|
# tb_core.u_sdram32 : at time 47207.0 ns WRITE: Bank = 0 Row = 599, Col = 118, Data = ce03ec9c
|
|
# Status: Burst-No: 43 Write Address: 0025712e WriteData: ce03ec9c
|
|
# tb_core.u_sdram32 : at time 47217.0 ns WRITE: Bank = 0 Row = 599, Col = 119, Data = 17b47f2f
|
|
# Status: Burst-No: 44 Write Address: 0025712e WriteData: 17b47f2f
|
|
# tb_core.u_sdram32 : at time 47227.0 ns WRITE: Bank = 0 Row = 599, Col = 120, Data = a22ac644
|
|
# Status: Burst-No: 45 Write Address: 0025712e WriteData: a22ac644
|
|
# tb_core.u_sdram32 : at time 47237.0 ns WRITE: Bank = 0 Row = 599, Col = 121, Data = cdbf3a9b
|
|
# Status: Burst-No: 46 Write Address: 0025712e WriteData: cdbf3a9b
|
|
# tb_core.u_sdram32 : at time 47247.0 ns WRITE: Bank = 0 Row = 599, Col = 122, Data = b1200062
|
|
# Status: Burst-No: 47 Write Address: 0025712e WriteData: b1200062
|
|
# tb_core.u_sdram32 : at time 47257.0 ns WRITE: Bank = 0 Row = 599, Col = 123, Data = 748abbe9
|
|
# Status: Burst-No: 48 Write Address: 0025712e WriteData: 748abbe9
|
|
# tb_core.u_sdram32 : at time 47267.0 ns WRITE: Bank = 0 Row = 599, Col = 124, Data = 1747832e
|
|
# Status: Burst-No: 49 Write Address: 0025712e WriteData: 1747832e
|
|
# tb_core.u_sdram32 : at time 47277.0 ns WRITE: Bank = 0 Row = 599, Col = 125, Data = c690128d
|
|
# Status: Burst-No: 50 Write Address: 0025712e WriteData: c690128d
|
|
# tb_core.u_sdram32 : at time 47287.0 ns WRITE: Bank = 0 Row = 599, Col = 126, Data = 632f07c6
|
|
# Status: Burst-No: 51 Write Address: 0025712e WriteData: 632f07c6
|
|
# tb_core.u_sdram32 : at time 47297.0 ns WRITE: Bank = 0 Row = 599, Col = 127, Data = d51cb4aa
|
|
# Status: Burst-No: 52 Write Address: 0025712e WriteData: d51cb4aa
|
|
# tb_core.u_sdram32 : at time 47307.0 ns WRITE: Bank = 0 Row = 599, Col = 128, Data = d01df0a0
|
|
# Status: Burst-No: 53 Write Address: 0025712e WriteData: d01df0a0
|
|
# tb_core.u_sdram32 : at time 47317.0 ns WRITE: Bank = 0 Row = 599, Col = 129, Data = 1be8cf37
|
|
# Status: Burst-No: 54 Write Address: 0025712e WriteData: 1be8cf37
|
|
# tb_core.u_sdram32 : at time 47327.0 ns WRITE: Bank = 0 Row = 599, Col = 130, Data = f8602ef0
|
|
# Status: Burst-No: 55 Write Address: 0025712e WriteData: f8602ef0
|
|
# tb_core.u_sdram32 : at time 47337.0 ns WRITE: Bank = 0 Row = 599, Col = 131, Data = f46ca8e8
|
|
# Status: Burst-No: 56 Write Address: 0025712e WriteData: f46ca8e8
|
|
# tb_core.u_sdram32 : at time 47347.0 ns WRITE: Bank = 0 Row = 599, Col = 132, Data = e6841ccd
|
|
# Status: Burst-No: 57 Write Address: 0025712e WriteData: e6841ccd
|
|
# tb_core.u_sdram32 : at time 47357.0 ns WRITE: Bank = 0 Row = 599, Col = 133, Data = 68cd09d1
|
|
# Status: Burst-No: 58 Write Address: 0025712e WriteData: 68cd09d1
|
|
# tb_core.u_sdram32 : at time 47367.0 ns WRITE: Bank = 0 Row = 599, Col = 134, Data = 5d8363bb
|
|
# Status: Burst-No: 59 Write Address: 0025712e WriteData: 5d8363bb
|
|
# tb_core.u_sdram32 : at time 47377.0 ns WRITE: Bank = 0 Row = 599, Col = 135, Data = eff692df
|
|
# Status: Burst-No: 60 Write Address: 0025712e WriteData: eff692df
|
|
# tb_core.u_sdram32 : at time 47387.0 ns WRITE: Bank = 0 Row = 599, Col = 136, Data = 3e8ed57d
|
|
# Status: Burst-No: 61 Write Address: 0025712e WriteData: 3e8ed57d
|
|
# tb_core.u_sdram32 : at time 47397.0 ns BST : Burst Terminate
|
|
# Write Address: 00002158, Burst Size: 32
|
|
# tb_core.u_sdram32 : at time 47537.0 ns ACT : Bank = 0 Row = 2
|
|
# tb_core.u_sdram32 : at time 47567.0 ns WRITE: Bank = 0 Row = 2, Col = 86, Data = 4bac2f97
|
|
# Status: Burst-No: 0 Write Address: 00002158 WriteData: 4bac2f97
|
|
# tb_core.u_sdram32 : at time 47577.0 ns WRITE: Bank = 0 Row = 2, Col = 87, Data = 835da206
|
|
# Status: Burst-No: 1 Write Address: 00002158 WriteData: 835da206
|
|
# tb_core.u_sdram32 : at time 47587.0 ns WRITE: Bank = 0 Row = 2, Col = 88, Data = 94a12e29
|
|
# Status: Burst-No: 2 Write Address: 00002158 WriteData: 94a12e29
|
|
# tb_core.u_sdram32 : at time 47597.0 ns WRITE: Bank = 0 Row = 2, Col = 89, Data = 624b63c4
|
|
# Status: Burst-No: 3 Write Address: 00002158 WriteData: 624b63c4
|
|
# tb_core.u_sdram32 : at time 47607.0 ns WRITE: Bank = 0 Row = 2, Col = 90, Data = ebb0f6d7
|
|
# Status: Burst-No: 4 Write Address: 00002158 WriteData: ebb0f6d7
|
|
# tb_core.u_sdram32 : at time 47617.0 ns WRITE: Bank = 0 Row = 2, Col = 91, Data = aea6d45d
|
|
# Status: Burst-No: 5 Write Address: 00002158 WriteData: aea6d45d
|
|
# tb_core.u_sdram32 : at time 47627.0 ns WRITE: Bank = 0 Row = 2, Col = 92, Data = 26c7134d
|
|
# Status: Burst-No: 6 Write Address: 00002158 WriteData: 26c7134d
|
|
# tb_core.u_sdram32 : at time 47637.0 ns WRITE: Bank = 0 Row = 2, Col = 93, Data = 39bfc773
|
|
# Status: Burst-No: 7 Write Address: 00002158 WriteData: 39bfc773
|
|
# tb_core.u_sdram32 : at time 47647.0 ns WRITE: Bank = 0 Row = 2, Col = 94, Data = bfd62a7f
|
|
# Status: Burst-No: 8 Write Address: 00002158 WriteData: bfd62a7f
|
|
# tb_core.u_sdram32 : at time 47657.0 ns WRITE: Bank = 0 Row = 2, Col = 95, Data = a703744e
|
|
# Status: Burst-No: 9 Write Address: 00002158 WriteData: a703744e
|
|
# tb_core.u_sdram32 : at time 47667.0 ns WRITE: Bank = 0 Row = 2, Col = 96, Data = 5cdc65b9
|
|
# Status: Burst-No: 10 Write Address: 00002158 WriteData: 5cdc65b9
|
|
# tb_core.u_sdram32 : at time 47677.0 ns WRITE: Bank = 0 Row = 2, Col = 97, Data = f05d64e0
|
|
# Status: Burst-No: 11 Write Address: 00002158 WriteData: f05d64e0
|
|
# tb_core.u_sdram32 : at time 47687.0 ns WRITE: Bank = 0 Row = 2, Col = 98, Data = 9cd6c239
|
|
# Status: Burst-No: 12 Write Address: 00002158 WriteData: 9cd6c239
|
|
# tb_core.u_sdram32 : at time 47697.0 ns WRITE: Bank = 0 Row = 2, Col = 99, Data = 40fb4f81
|
|
# Status: Burst-No: 13 Write Address: 00002158 WriteData: 40fb4f81
|
|
# tb_core.u_sdram32 : at time 47707.0 ns WRITE: Bank = 0 Row = 2, Col = 100, Data = 18fb8331
|
|
# Status: Burst-No: 14 Write Address: 00002158 WriteData: 18fb8331
|
|
# tb_core.u_sdram32 : at time 47717.0 ns WRITE: Bank = 0 Row = 2, Col = 101, Data = 47ebef8f
|
|
# Status: Burst-No: 15 Write Address: 00002158 WriteData: 47ebef8f
|
|
# tb_core.u_sdram32 : at time 47727.0 ns WRITE: Bank = 0 Row = 2, Col = 102, Data = 7f537dfe
|
|
# Status: Burst-No: 16 Write Address: 00002158 WriteData: 7f537dfe
|
|
# tb_core.u_sdram32 : at time 47737.0 ns WRITE: Bank = 0 Row = 2, Col = 103, Data = aed0f05d
|
|
# Status: Burst-No: 17 Write Address: 00002158 WriteData: aed0f05d
|
|
# tb_core.u_sdram32 : at time 47747.0 ns WRITE: Bank = 0 Row = 2, Col = 104, Data = 878a880f
|
|
# Status: Burst-No: 18 Write Address: 00002158 WriteData: 878a880f
|
|
# tb_core.u_sdram32 : at time 47757.0 ns WRITE: Bank = 0 Row = 2, Col = 105, Data = 199bcb33
|
|
# Status: Burst-No: 19 Write Address: 00002158 WriteData: 199bcb33
|
|
# tb_core.u_sdram32 : at time 47767.0 ns WRITE: Bank = 0 Row = 2, Col = 106, Data = 348ed569
|
|
# Status: Burst-No: 20 Write Address: 00002158 WriteData: 348ed569
|
|
# tb_core.u_sdram32 : at time 47777.0 ns WRITE: Bank = 0 Row = 2, Col = 107, Data = 2b0da556
|
|
# Status: Burst-No: 21 Write Address: 00002158 WriteData: 2b0da556
|
|
# tb_core.u_sdram32 : at time 47787.0 ns WRITE: Bank = 0 Row = 2, Col = 108, Data = cd57529a
|
|
# Status: Burst-No: 22 Write Address: 00002158 WriteData: cd57529a
|
|
# tb_core.u_sdram32 : at time 47797.0 ns WRITE: Bank = 0 Row = 2, Col = 109, Data = 2e72295c
|
|
# Status: Burst-No: 23 Write Address: 00002158 WriteData: 2e72295c
|
|
# tb_core.u_sdram32 : at time 47807.0 ns WRITE: Bank = 0 Row = 2, Col = 110, Data = 24e90749
|
|
# Status: Burst-No: 24 Write Address: 00002158 WriteData: 24e90749
|
|
# tb_core.u_sdram32 : at time 47817.0 ns WRITE: Bank = 0 Row = 2, Col = 111, Data = 69cd77d3
|
|
# Status: Burst-No: 25 Write Address: 00002158 WriteData: 69cd77d3
|
|
# tb_core.u_sdram32 : at time 47827.0 ns WRITE: Bank = 0 Row = 2, Col = 112, Data = 9d737a3a
|
|
# Status: Burst-No: 26 Write Address: 00002158 WriteData: 9d737a3a
|
|
# tb_core.u_sdram32 : at time 47837.0 ns WRITE: Bank = 0 Row = 2, Col = 113, Data = 6c74f5d8
|
|
# Status: Burst-No: 27 Write Address: 00002158 WriteData: 6c74f5d8
|
|
# tb_core.u_sdram32 : at time 47847.0 ns WRITE: Bank = 0 Row = 2, Col = 114, Data = bc1c0e78
|
|
# Status: Burst-No: 28 Write Address: 00002158 WriteData: bc1c0e78
|
|
# tb_core.u_sdram32 : at time 47857.0 ns WRITE: Bank = 0 Row = 2, Col = 115, Data = 1ccb3539
|
|
# Status: Burst-No: 29 Write Address: 00002158 WriteData: 1ccb3539
|
|
# tb_core.u_sdram32 : at time 47867.0 ns WRITE: Bank = 0 Row = 2, Col = 116, Data = 92d06025
|
|
# Status: Burst-No: 30 Write Address: 00002158 WriteData: 92d06025
|
|
# tb_core.u_sdram32 : at time 47877.0 ns WRITE: Bank = 0 Row = 2, Col = 117, Data = 8496d609
|
|
# Status: Burst-No: 31 Write Address: 00002158 WriteData: 8496d609
|
|
# tb_core.u_sdram32 : at time 47887.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 48027.0 ns ACT : Bank = 0 Row = 599
|
|
# tb_core.u_sdram32 : at time 48083.0 ns READ : Bank = 0 Row = 599, Col = 75, Data = 33638966
|
|
# tb_core.u_sdram32 : at time 48093.0 ns READ : Bank = 0 Row = 599, Col = 76, Data = bb062876
|
|
# READ STATUS: Burst-No: 0 Addr: 0025712e Rxd: 33638966
|
|
# tb_core.u_sdram32 : at time 48103.0 ns READ : Bank = 0 Row = 599, Col = 77, Data = 3a982575
|
|
# READ STATUS: Burst-No: 1 Addr: 00257130 Rxd: bb062876
|
|
# tb_core.u_sdram32 : at time 48113.0 ns READ : Bank = 0 Row = 599, Col = 78, Data = c7b43a8f
|
|
# READ STATUS: Burst-No: 2 Addr: 00257132 Rxd: 3a982575
|
|
# tb_core.u_sdram32 : at time 48123.0 ns READ : Bank = 0 Row = 599, Col = 79, Data = 4ad39595
|
|
# READ STATUS: Burst-No: 3 Addr: 00257134 Rxd: c7b43a8f
|
|
# tb_core.u_sdram32 : at time 48133.0 ns READ : Bank = 0 Row = 599, Col = 80, Data = 3da8cd7b
|
|
# READ STATUS: Burst-No: 4 Addr: 00257136 Rxd: 4ad39595
|
|
# tb_core.u_sdram32 : at time 48143.0 ns READ : Bank = 0 Row = 599, Col = 81, Data = be43ea7c
|
|
# READ STATUS: Burst-No: 5 Addr: 00257138 Rxd: 3da8cd7b
|
|
# tb_core.u_sdram32 : at time 48153.0 ns READ : Bank = 0 Row = 599, Col = 82, Data = b7f4306f
|
|
# READ STATUS: Burst-No: 6 Addr: 0025713a Rxd: be43ea7c
|
|
# tb_core.u_sdram32 : at time 48163.0 ns READ : Bank = 0 Row = 599, Col = 83, Data = e4824cc9
|
|
# READ STATUS: Burst-No: 7 Addr: 0025713c Rxd: b7f4306f
|
|
# tb_core.u_sdram32 : at time 48173.0 ns READ : Bank = 0 Row = 599, Col = 84, Data = e4d820c9
|
|
# READ STATUS: Burst-No: 8 Addr: 0025713e Rxd: e4824cc9
|
|
# tb_core.u_sdram32 : at time 48183.0 ns READ : Bank = 0 Row = 599, Col = 85, Data = 5a3761b4
|
|
# READ STATUS: Burst-No: 9 Addr: 00257140 Rxd: e4d820c9
|
|
# tb_core.u_sdram32 : at time 48193.0 ns READ : Bank = 0 Row = 599, Col = 86, Data = 6d48a5da
|
|
# READ STATUS: Burst-No: 10 Addr: 00257142 Rxd: 5a3761b4
|
|
# tb_core.u_sdram32 : at time 48203.0 ns READ : Bank = 0 Row = 599, Col = 87, Data = d6aea8ad
|
|
# READ STATUS: Burst-No: 11 Addr: 00257144 Rxd: 6d48a5da
|
|
# tb_core.u_sdram32 : at time 48213.0 ns READ : Bank = 0 Row = 599, Col = 88, Data = 6fcff1df
|
|
# READ STATUS: Burst-No: 12 Addr: 00257146 Rxd: d6aea8ad
|
|
# tb_core.u_sdram32 : at time 48223.0 ns READ : Bank = 0 Row = 599, Col = 89, Data = 06b0e30d
|
|
# READ STATUS: Burst-No: 13 Addr: 00257148 Rxd: 6fcff1df
|
|
# tb_core.u_sdram32 : at time 48233.0 ns READ : Bank = 0 Row = 599, Col = 90, Data = 384d4170
|
|
# READ STATUS: Burst-No: 14 Addr: 0025714a Rxd: 06b0e30d
|
|
# tb_core.u_sdram32 : at time 48243.0 ns READ : Bank = 0 Row = 599, Col = 91, Data = 41bd6783
|
|
# READ STATUS: Burst-No: 15 Addr: 0025714c Rxd: 384d4170
|
|
# tb_core.u_sdram32 : at time 48253.0 ns READ : Bank = 0 Row = 599, Col = 92, Data = a8c6c451
|
|
# READ STATUS: Burst-No: 16 Addr: 0025714e Rxd: 41bd6783
|
|
# tb_core.u_sdram32 : at time 48263.0 ns READ : Bank = 0 Row = 599, Col = 93, Data = 027a8d04
|
|
# READ STATUS: Burst-No: 17 Addr: 00257150 Rxd: a8c6c451
|
|
# tb_core.u_sdram32 : at time 48273.0 ns READ : Bank = 0 Row = 599, Col = 94, Data = c0467280
|
|
# READ STATUS: Burst-No: 18 Addr: 00257152 Rxd: 027a8d04
|
|
# tb_core.u_sdram32 : at time 48283.0 ns READ : Bank = 0 Row = 599, Col = 95, Data = fcf504f9
|
|
# READ STATUS: Burst-No: 19 Addr: 00257154 Rxd: c0467280
|
|
# tb_core.u_sdram32 : at time 48293.0 ns READ : Bank = 0 Row = 599, Col = 96, Data = 0379ed06
|
|
# READ STATUS: Burst-No: 20 Addr: 00257156 Rxd: fcf504f9
|
|
# tb_core.u_sdram32 : at time 48303.0 ns READ : Bank = 0 Row = 599, Col = 97, Data = e5063aca
|
|
# READ STATUS: Burst-No: 21 Addr: 00257158 Rxd: 0379ed06
|
|
# tb_core.u_sdram32 : at time 48313.0 ns READ : Bank = 0 Row = 599, Col = 98, Data = ef8d64df
|
|
# READ STATUS: Burst-No: 22 Addr: 0025715a Rxd: e5063aca
|
|
# tb_core.u_sdram32 : at time 48323.0 ns READ : Bank = 0 Row = 599, Col = 99, Data = 64f9bbc9
|
|
# READ STATUS: Burst-No: 23 Addr: 0025715c Rxd: ef8d64df
|
|
# tb_core.u_sdram32 : at time 48333.0 ns READ : Bank = 0 Row = 599, Col = 100, Data = 42797584
|
|
# READ STATUS: Burst-No: 24 Addr: 0025715e Rxd: 64f9bbc9
|
|
# tb_core.u_sdram32 : at time 48343.0 ns READ : Bank = 0 Row = 599, Col = 101, Data = d84988b0
|
|
# READ STATUS: Burst-No: 25 Addr: 00257160 Rxd: 42797584
|
|
# tb_core.u_sdram32 : at time 48353.0 ns READ : Bank = 0 Row = 599, Col = 102, Data = 74bc03e9
|
|
# READ STATUS: Burst-No: 26 Addr: 00257162 Rxd: d84988b0
|
|
# tb_core.u_sdram32 : at time 48363.0 ns READ : Bank = 0 Row = 599, Col = 103, Data = 08098510
|
|
# READ STATUS: Burst-No: 27 Addr: 00257164 Rxd: 74bc03e9
|
|
# tb_core.u_sdram32 : at time 48373.0 ns READ : Bank = 0 Row = 599, Col = 104, Data = 6f3425de
|
|
# READ STATUS: Burst-No: 28 Addr: 00257166 Rxd: 08098510
|
|
# tb_core.u_sdram32 : at time 48383.0 ns READ : Bank = 0 Row = 599, Col = 105, Data = d659d0ac
|
|
# READ STATUS: Burst-No: 29 Addr: 00257168 Rxd: 6f3425de
|
|
# tb_core.u_sdram32 : at time 48393.0 ns READ : Bank = 0 Row = 599, Col = 106, Data = 0498fb09
|
|
# READ STATUS: Burst-No: 30 Addr: 0025716a Rxd: d659d0ac
|
|
# tb_core.u_sdram32 : at time 48403.0 ns READ : Bank = 0 Row = 599, Col = 107, Data = 6bf823d7
|
|
# READ STATUS: Burst-No: 31 Addr: 0025716c Rxd: 0498fb09
|
|
# tb_core.u_sdram32 : at time 48413.0 ns READ : Bank = 0 Row = 599, Col = 108, Data = 30c38f61
|
|
# READ STATUS: Burst-No: 32 Addr: 0025716e Rxd: 6bf823d7
|
|
# tb_core.u_sdram32 : at time 48423.0 ns READ : Bank = 0 Row = 599, Col = 109, Data = 86c8320d
|
|
# READ STATUS: Burst-No: 33 Addr: 00257170 Rxd: 30c38f61
|
|
# tb_core.u_sdram32 : at time 48433.0 ns READ : Bank = 0 Row = 599, Col = 110, Data = 48c3b791
|
|
# READ STATUS: Burst-No: 34 Addr: 00257172 Rxd: 86c8320d
|
|
# tb_core.u_sdram32 : at time 48443.0 ns READ : Bank = 0 Row = 599, Col = 111, Data = e9eb0ed3
|
|
# READ STATUS: Burst-No: 35 Addr: 00257174 Rxd: 48c3b791
|
|
# tb_core.u_sdram32 : at time 48453.0 ns READ : Bank = 0 Row = 599, Col = 112, Data = 4d77f99a
|
|
# READ STATUS: Burst-No: 36 Addr: 00257176 Rxd: e9eb0ed3
|
|
# tb_core.u_sdram32 : at time 48463.0 ns READ : Bank = 0 Row = 599, Col = 113, Data = 17bd872f
|
|
# READ STATUS: Burst-No: 37 Addr: 00257178 Rxd: 4d77f99a
|
|
# tb_core.u_sdram32 : at time 48473.0 ns READ : Bank = 0 Row = 599, Col = 114, Data = 2720634e
|
|
# READ STATUS: Burst-No: 38 Addr: 0025717a Rxd: 17bd872f
|
|
# tb_core.u_sdram32 : at time 48483.0 ns READ : Bank = 0 Row = 599, Col = 115, Data = 5bd583b7
|
|
# READ STATUS: Burst-No: 39 Addr: 0025717c Rxd: 2720634e
|
|
# tb_core.u_sdram32 : at time 48493.0 ns READ : Bank = 0 Row = 599, Col = 116, Data = e32472c6
|
|
# READ STATUS: Burst-No: 40 Addr: 0025717e Rxd: 5bd583b7
|
|
# tb_core.u_sdram32 : at time 48503.0 ns READ : Bank = 0 Row = 599, Col = 117, Data = 2ed66b5d
|
|
# READ STATUS: Burst-No: 41 Addr: 00257180 Rxd: e32472c6
|
|
# tb_core.u_sdram32 : at time 48513.0 ns READ : Bank = 0 Row = 599, Col = 118, Data = ce03ec9c
|
|
# READ STATUS: Burst-No: 42 Addr: 00257182 Rxd: 2ed66b5d
|
|
# tb_core.u_sdram32 : at time 48523.0 ns READ : Bank = 0 Row = 599, Col = 119, Data = 17b47f2f
|
|
# READ STATUS: Burst-No: 43 Addr: 00257184 Rxd: ce03ec9c
|
|
# tb_core.u_sdram32 : at time 48533.0 ns READ : Bank = 0 Row = 599, Col = 120, Data = a22ac644
|
|
# READ STATUS: Burst-No: 44 Addr: 00257186 Rxd: 17b47f2f
|
|
# tb_core.u_sdram32 : at time 48543.0 ns READ : Bank = 0 Row = 599, Col = 121, Data = cdbf3a9b
|
|
# READ STATUS: Burst-No: 45 Addr: 00257188 Rxd: a22ac644
|
|
# tb_core.u_sdram32 : at time 48553.0 ns READ : Bank = 0 Row = 599, Col = 122, Data = b1200062
|
|
# READ STATUS: Burst-No: 46 Addr: 0025718a Rxd: cdbf3a9b
|
|
# tb_core.u_sdram32 : at time 48563.0 ns READ : Bank = 0 Row = 599, Col = 123, Data = 748abbe9
|
|
# READ STATUS: Burst-No: 47 Addr: 0025718c Rxd: b1200062
|
|
# tb_core.u_sdram32 : at time 48573.0 ns READ : Bank = 0 Row = 599, Col = 124, Data = 1747832e
|
|
# READ STATUS: Burst-No: 48 Addr: 0025718e Rxd: 748abbe9
|
|
# tb_core.u_sdram32 : at time 48583.0 ns READ : Bank = 0 Row = 599, Col = 125, Data = c690128d
|
|
# READ STATUS: Burst-No: 49 Addr: 00257190 Rxd: 1747832e
|
|
# tb_core.u_sdram32 : at time 48593.0 ns READ : Bank = 0 Row = 599, Col = 126, Data = 632f07c6
|
|
# READ STATUS: Burst-No: 50 Addr: 00257192 Rxd: c690128d
|
|
# tb_core.u_sdram32 : at time 48603.0 ns READ : Bank = 0 Row = 599, Col = 127, Data = d51cb4aa
|
|
# READ STATUS: Burst-No: 51 Addr: 00257194 Rxd: 632f07c6
|
|
# tb_core.u_sdram32 : at time 48613.0 ns READ : Bank = 0 Row = 599, Col = 128, Data = d01df0a0
|
|
# READ STATUS: Burst-No: 52 Addr: 00257196 Rxd: d51cb4aa
|
|
# tb_core.u_sdram32 : at time 48623.0 ns READ : Bank = 0 Row = 599, Col = 129, Data = 1be8cf37
|
|
# READ STATUS: Burst-No: 53 Addr: 00257198 Rxd: d01df0a0
|
|
# tb_core.u_sdram32 : at time 48633.0 ns READ : Bank = 0 Row = 599, Col = 130, Data = f8602ef0
|
|
# READ STATUS: Burst-No: 54 Addr: 0025719a Rxd: 1be8cf37
|
|
# tb_core.u_sdram32 : at time 48643.0 ns READ : Bank = 0 Row = 599, Col = 131, Data = f46ca8e8
|
|
# READ STATUS: Burst-No: 55 Addr: 0025719c Rxd: f8602ef0
|
|
# tb_core.u_sdram32 : at time 48653.0 ns READ : Bank = 0 Row = 599, Col = 132, Data = e6841ccd
|
|
# READ STATUS: Burst-No: 56 Addr: 0025719e Rxd: f46ca8e8
|
|
# tb_core.u_sdram32 : at time 48663.0 ns READ : Bank = 0 Row = 599, Col = 133, Data = 68cd09d1
|
|
# READ STATUS: Burst-No: 57 Addr: 002571a0 Rxd: e6841ccd
|
|
# tb_core.u_sdram32 : at time 48673.0 ns READ : Bank = 0 Row = 599, Col = 134, Data = 5d8363bb
|
|
# tb_core.u_sdram32 : at time 48677.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 58 Addr: 002571a2 Rxd: 68cd09d1
|
|
# tb_core.u_sdram32 : at time 48683.0 ns READ : Bank = 0 Row = 599, Col = 135, Data = eff692df
|
|
# READ STATUS: Burst-No: 59 Addr: 002571a4 Rxd: 5d8363bb
|
|
# tb_core.u_sdram32 : at time 48693.0 ns READ : Bank = 0 Row = 599, Col = 136, Data = 3e8ed57d
|
|
# READ STATUS: Burst-No: 60 Addr: 002571a6 Rxd: eff692df
|
|
# READ STATUS: Burst-No: 61 Addr: 002571a8 Rxd: 3e8ed57d
|
|
# tb_core.u_sdram32 : at time 48867.0 ns ACT : Bank = 0 Row = 2
|
|
# tb_core.u_sdram32 : at time 48923.0 ns READ : Bank = 0 Row = 2, Col = 86, Data = 4bac2f97
|
|
# tb_core.u_sdram32 : at time 48933.0 ns READ : Bank = 0 Row = 2, Col = 87, Data = 835da206
|
|
# READ STATUS: Burst-No: 0 Addr: 00002158 Rxd: 4bac2f97
|
|
# tb_core.u_sdram32 : at time 48943.0 ns READ : Bank = 0 Row = 2, Col = 88, Data = 94a12e29
|
|
# READ STATUS: Burst-No: 1 Addr: 0000215a Rxd: 835da206
|
|
# tb_core.u_sdram32 : at time 48953.0 ns READ : Bank = 0 Row = 2, Col = 89, Data = 624b63c4
|
|
# READ STATUS: Burst-No: 2 Addr: 0000215c Rxd: 94a12e29
|
|
# tb_core.u_sdram32 : at time 48963.0 ns READ : Bank = 0 Row = 2, Col = 90, Data = ebb0f6d7
|
|
# READ STATUS: Burst-No: 3 Addr: 0000215e Rxd: 624b63c4
|
|
# tb_core.u_sdram32 : at time 48973.0 ns READ : Bank = 0 Row = 2, Col = 91, Data = aea6d45d
|
|
# READ STATUS: Burst-No: 4 Addr: 00002160 Rxd: ebb0f6d7
|
|
# tb_core.u_sdram32 : at time 48983.0 ns READ : Bank = 0 Row = 2, Col = 92, Data = 26c7134d
|
|
# READ STATUS: Burst-No: 5 Addr: 00002162 Rxd: aea6d45d
|
|
# tb_core.u_sdram32 : at time 48993.0 ns READ : Bank = 0 Row = 2, Col = 93, Data = 39bfc773
|
|
# READ STATUS: Burst-No: 6 Addr: 00002164 Rxd: 26c7134d
|
|
# tb_core.u_sdram32 : at time 49003.0 ns READ : Bank = 0 Row = 2, Col = 94, Data = bfd62a7f
|
|
# READ STATUS: Burst-No: 7 Addr: 00002166 Rxd: 39bfc773
|
|
# tb_core.u_sdram32 : at time 49013.0 ns READ : Bank = 0 Row = 2, Col = 95, Data = a703744e
|
|
# READ STATUS: Burst-No: 8 Addr: 00002168 Rxd: bfd62a7f
|
|
# tb_core.u_sdram32 : at time 49023.0 ns READ : Bank = 0 Row = 2, Col = 96, Data = 5cdc65b9
|
|
# READ STATUS: Burst-No: 9 Addr: 0000216a Rxd: a703744e
|
|
# tb_core.u_sdram32 : at time 49033.0 ns READ : Bank = 0 Row = 2, Col = 97, Data = f05d64e0
|
|
# READ STATUS: Burst-No: 10 Addr: 0000216c Rxd: 5cdc65b9
|
|
# tb_core.u_sdram32 : at time 49043.0 ns READ : Bank = 0 Row = 2, Col = 98, Data = 9cd6c239
|
|
# READ STATUS: Burst-No: 11 Addr: 0000216e Rxd: f05d64e0
|
|
# tb_core.u_sdram32 : at time 49053.0 ns READ : Bank = 0 Row = 2, Col = 99, Data = 40fb4f81
|
|
# READ STATUS: Burst-No: 12 Addr: 00002170 Rxd: 9cd6c239
|
|
# tb_core.u_sdram32 : at time 49063.0 ns READ : Bank = 0 Row = 2, Col = 100, Data = 18fb8331
|
|
# READ STATUS: Burst-No: 13 Addr: 00002172 Rxd: 40fb4f81
|
|
# tb_core.u_sdram32 : at time 49073.0 ns READ : Bank = 0 Row = 2, Col = 101, Data = 47ebef8f
|
|
# READ STATUS: Burst-No: 14 Addr: 00002174 Rxd: 18fb8331
|
|
# tb_core.u_sdram32 : at time 49083.0 ns READ : Bank = 0 Row = 2, Col = 102, Data = 7f537dfe
|
|
# READ STATUS: Burst-No: 15 Addr: 00002176 Rxd: 47ebef8f
|
|
# tb_core.u_sdram32 : at time 49093.0 ns READ : Bank = 0 Row = 2, Col = 103, Data = aed0f05d
|
|
# READ STATUS: Burst-No: 16 Addr: 00002178 Rxd: 7f537dfe
|
|
# tb_core.u_sdram32 : at time 49103.0 ns READ : Bank = 0 Row = 2, Col = 104, Data = 878a880f
|
|
# READ STATUS: Burst-No: 17 Addr: 0000217a Rxd: aed0f05d
|
|
# tb_core.u_sdram32 : at time 49113.0 ns READ : Bank = 0 Row = 2, Col = 105, Data = 199bcb33
|
|
# READ STATUS: Burst-No: 18 Addr: 0000217c Rxd: 878a880f
|
|
# tb_core.u_sdram32 : at time 49123.0 ns READ : Bank = 0 Row = 2, Col = 106, Data = 348ed569
|
|
# READ STATUS: Burst-No: 19 Addr: 0000217e Rxd: 199bcb33
|
|
# tb_core.u_sdram32 : at time 49133.0 ns READ : Bank = 0 Row = 2, Col = 107, Data = 2b0da556
|
|
# READ STATUS: Burst-No: 20 Addr: 00002180 Rxd: 348ed569
|
|
# tb_core.u_sdram32 : at time 49143.0 ns READ : Bank = 0 Row = 2, Col = 108, Data = cd57529a
|
|
# READ STATUS: Burst-No: 21 Addr: 00002182 Rxd: 2b0da556
|
|
# tb_core.u_sdram32 : at time 49153.0 ns READ : Bank = 0 Row = 2, Col = 109, Data = 2e72295c
|
|
# READ STATUS: Burst-No: 22 Addr: 00002184 Rxd: cd57529a
|
|
# tb_core.u_sdram32 : at time 49163.0 ns READ : Bank = 0 Row = 2, Col = 110, Data = 24e90749
|
|
# READ STATUS: Burst-No: 23 Addr: 00002186 Rxd: 2e72295c
|
|
# tb_core.u_sdram32 : at time 49173.0 ns READ : Bank = 0 Row = 2, Col = 111, Data = 69cd77d3
|
|
# READ STATUS: Burst-No: 24 Addr: 00002188 Rxd: 24e90749
|
|
# tb_core.u_sdram32 : at time 49183.0 ns READ : Bank = 0 Row = 2, Col = 112, Data = 9d737a3a
|
|
# READ STATUS: Burst-No: 25 Addr: 0000218a Rxd: 69cd77d3
|
|
# tb_core.u_sdram32 : at time 49193.0 ns READ : Bank = 0 Row = 2, Col = 113, Data = 6c74f5d8
|
|
# READ STATUS: Burst-No: 26 Addr: 0000218c Rxd: 9d737a3a
|
|
# tb_core.u_sdram32 : at time 49203.0 ns READ : Bank = 0 Row = 2, Col = 114, Data = bc1c0e78
|
|
# READ STATUS: Burst-No: 27 Addr: 0000218e Rxd: 6c74f5d8
|
|
# tb_core.u_sdram32 : at time 49213.0 ns READ : Bank = 0 Row = 2, Col = 115, Data = 1ccb3539
|
|
# tb_core.u_sdram32 : at time 49217.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 28 Addr: 00002190 Rxd: bc1c0e78
|
|
# tb_core.u_sdram32 : at time 49223.0 ns READ : Bank = 0 Row = 2, Col = 116, Data = 92d06025
|
|
# READ STATUS: Burst-No: 29 Addr: 00002192 Rxd: 1ccb3539
|
|
# tb_core.u_sdram32 : at time 49233.0 ns READ : Bank = 0 Row = 2, Col = 117, Data = 8496d609
|
|
# READ STATUS: Burst-No: 30 Addr: 00002194 Rxd: 92d06025
|
|
# READ STATUS: Burst-No: 31 Addr: 00002196 Rxd: 8496d609
|
|
# Write Address: 0037a856, Burst Size: 45
|
|
# tb_core.u_sdram32 : at time 49407.0 ns ACT : Bank = 2 Row = 890
|
|
# tb_core.u_sdram32 : at time 49437.0 ns WRITE: Bank = 2 Row = 890, Col = 21, Data = e99b1cd3
|
|
# Status: Burst-No: 0 Write Address: 0037a856 WriteData: e99b1cd3
|
|
# tb_core.u_sdram32 : at time 49447.0 ns WRITE: Bank = 2 Row = 890, Col = 22, Data = 0d633f1a
|
|
# Status: Burst-No: 1 Write Address: 0037a856 WriteData: 0d633f1a
|
|
# tb_core.u_sdram32 : at time 49457.0 ns WRITE: Bank = 2 Row = 890, Col = 23, Data = 005d5100
|
|
# Status: Burst-No: 2 Write Address: 0037a856 WriteData: 005d5100
|
|
# tb_core.u_sdram32 : at time 49467.0 ns WRITE: Bank = 2 Row = 890, Col = 24, Data = 560d5fac
|
|
# Status: Burst-No: 3 Write Address: 0037a856 WriteData: 560d5fac
|
|
# tb_core.u_sdram32 : at time 49477.0 ns WRITE: Bank = 2 Row = 890, Col = 25, Data = f4588ee8
|
|
# Status: Burst-No: 4 Write Address: 0037a856 WriteData: f4588ee8
|
|
# tb_core.u_sdram32 : at time 49487.0 ns WRITE: Bank = 2 Row = 890, Col = 26, Data = b66a586c
|
|
# Status: Burst-No: 5 Write Address: 0037a856 WriteData: b66a586c
|
|
# tb_core.u_sdram32 : at time 49497.0 ns WRITE: Bank = 2 Row = 890, Col = 27, Data = d03c40a0
|
|
# Status: Burst-No: 6 Write Address: 0037a856 WriteData: d03c40a0
|
|
# tb_core.u_sdram32 : at time 49507.0 ns WRITE: Bank = 2 Row = 890, Col = 28, Data = 0ecd251d
|
|
# Status: Burst-No: 7 Write Address: 0037a856 WriteData: 0ecd251d
|
|
# tb_core.u_sdram32 : at time 49517.0 ns WRITE: Bank = 2 Row = 890, Col = 29, Data = 68c14fd1
|
|
# Status: Burst-No: 8 Write Address: 0037a856 WriteData: 68c14fd1
|
|
# tb_core.u_sdram32 : at time 49527.0 ns WRITE: Bank = 2 Row = 890, Col = 30, Data = 006d0f00
|
|
# Status: Burst-No: 9 Write Address: 0037a856 WriteData: 006d0f00
|
|
# tb_core.u_sdram32 : at time 49537.0 ns WRITE: Bank = 2 Row = 890, Col = 31, Data = ed4d78da
|
|
# Status: Burst-No: 10 Write Address: 0037a856 WriteData: ed4d78da
|
|
# tb_core.u_sdram32 : at time 49547.0 ns WRITE: Bank = 2 Row = 890, Col = 32, Data = 6c1987d8
|
|
# Status: Burst-No: 11 Write Address: 0037a856 WriteData: 6c1987d8
|
|
# tb_core.u_sdram32 : at time 49557.0 ns WRITE: Bank = 2 Row = 890, Col = 33, Data = 605dbbc0
|
|
# Status: Burst-No: 12 Write Address: 0037a856 WriteData: 605dbbc0
|
|
# tb_core.u_sdram32 : at time 49567.0 ns WRITE: Bank = 2 Row = 890, Col = 34, Data = a6490c4c
|
|
# Status: Burst-No: 13 Write Address: 0037a856 WriteData: a6490c4c
|
|
# tb_core.u_sdram32 : at time 49577.0 ns WRITE: Bank = 2 Row = 890, Col = 35, Data = e8cfb0d1
|
|
# Status: Burst-No: 14 Write Address: 0037a856 WriteData: e8cfb0d1
|
|
# tb_core.u_sdram32 : at time 49587.0 ns WRITE: Bank = 2 Row = 890, Col = 36, Data = a8bb0c51
|
|
# Status: Burst-No: 15 Write Address: 0037a856 WriteData: a8bb0c51
|
|
# tb_core.u_sdram32 : at time 49597.0 ns WRITE: Bank = 2 Row = 890, Col = 37, Data = a8e1ee51
|
|
# Status: Burst-No: 16 Write Address: 0037a856 WriteData: a8e1ee51
|
|
# tb_core.u_sdram32 : at time 49607.0 ns WRITE: Bank = 2 Row = 890, Col = 38, Data = a2a4be45
|
|
# Status: Burst-No: 17 Write Address: 0037a856 WriteData: a2a4be45
|
|
# tb_core.u_sdram32 : at time 49617.0 ns WRITE: Bank = 2 Row = 890, Col = 39, Data = 598367b3
|
|
# Status: Burst-No: 18 Write Address: 0037a856 WriteData: 598367b3
|
|
# tb_core.u_sdram32 : at time 49627.0 ns WRITE: Bank = 2 Row = 890, Col = 40, Data = bf21067e
|
|
# Status: Burst-No: 19 Write Address: 0037a856 WriteData: bf21067e
|
|
# tb_core.u_sdram32 : at time 49637.0 ns WRITE: Bank = 2 Row = 890, Col = 41, Data = c049c680
|
|
# Status: Burst-No: 20 Write Address: 0037a856 WriteData: c049c680
|
|
# tb_core.u_sdram32 : at time 49647.0 ns WRITE: Bank = 2 Row = 890, Col = 42, Data = 7e5b53fc
|
|
# Status: Burst-No: 21 Write Address: 0037a856 WriteData: 7e5b53fc
|
|
# tb_core.u_sdram32 : at time 49657.0 ns WRITE: Bank = 2 Row = 890, Col = 43, Data = 2426d748
|
|
# Status: Burst-No: 22 Write Address: 0037a856 WriteData: 2426d748
|
|
# tb_core.u_sdram32 : at time 49667.0 ns WRITE: Bank = 2 Row = 890, Col = 44, Data = c0ad8081
|
|
# Status: Burst-No: 23 Write Address: 0037a856 WriteData: c0ad8081
|
|
# tb_core.u_sdram32 : at time 49677.0 ns WRITE: Bank = 2 Row = 890, Col = 45, Data = 98b4dc31
|
|
# Status: Burst-No: 24 Write Address: 0037a856 WriteData: 98b4dc31
|
|
# tb_core.u_sdram32 : at time 49687.0 ns WRITE: Bank = 2 Row = 890, Col = 46, Data = 53a8b5a7
|
|
# Status: Burst-No: 25 Write Address: 0037a856 WriteData: 53a8b5a7
|
|
# tb_core.u_sdram32 : at time 49697.0 ns WRITE: Bank = 2 Row = 890, Col = 47, Data = 41b1fd83
|
|
# Status: Burst-No: 26 Write Address: 0037a856 WriteData: 41b1fd83
|
|
# tb_core.u_sdram32 : at time 49707.0 ns WRITE: Bank = 2 Row = 890, Col = 48, Data = 9fc1423f
|
|
# Status: Burst-No: 27 Write Address: 0037a856 WriteData: 9fc1423f
|
|
# tb_core.u_sdram32 : at time 49717.0 ns WRITE: Bank = 2 Row = 890, Col = 49, Data = 00029100
|
|
# Status: Burst-No: 28 Write Address: 0037a856 WriteData: 00029100
|
|
# tb_core.u_sdram32 : at time 49727.0 ns WRITE: Bank = 2 Row = 890, Col = 50, Data = b2158c64
|
|
# Status: Burst-No: 29 Write Address: 0037a856 WriteData: b2158c64
|
|
# tb_core.u_sdram32 : at time 49737.0 ns WRITE: Bank = 2 Row = 890, Col = 51, Data = 3f52937e
|
|
# Status: Burst-No: 30 Write Address: 0037a856 WriteData: 3f52937e
|
|
# tb_core.u_sdram32 : at time 49747.0 ns WRITE: Bank = 2 Row = 890, Col = 52, Data = 7887dff1
|
|
# Status: Burst-No: 31 Write Address: 0037a856 WriteData: 7887dff1
|
|
# tb_core.u_sdram32 : at time 49757.0 ns WRITE: Bank = 2 Row = 890, Col = 53, Data = 472dfb8e
|
|
# Status: Burst-No: 32 Write Address: 0037a856 WriteData: 472dfb8e
|
|
# tb_core.u_sdram32 : at time 49767.0 ns WRITE: Bank = 2 Row = 890, Col = 54, Data = 4f234d9e
|
|
# Status: Burst-No: 33 Write Address: 0037a856 WriteData: 4f234d9e
|
|
# tb_core.u_sdram32 : at time 49777.0 ns WRITE: Bank = 2 Row = 890, Col = 55, Data = 742819e8
|
|
# Status: Burst-No: 34 Write Address: 0037a856 WriteData: 742819e8
|
|
# tb_core.u_sdram32 : at time 49787.0 ns WRITE: Bank = 2 Row = 890, Col = 56, Data = 24839b49
|
|
# Status: Burst-No: 35 Write Address: 0037a856 WriteData: 24839b49
|
|
# tb_core.u_sdram32 : at time 49797.0 ns WRITE: Bank = 2 Row = 890, Col = 57, Data = 8569fa0a
|
|
# Status: Burst-No: 36 Write Address: 0037a856 WriteData: 8569fa0a
|
|
# tb_core.u_sdram32 : at time 49807.0 ns WRITE: Bank = 2 Row = 890, Col = 58, Data = 2fb81b5f
|
|
# Status: Burst-No: 37 Write Address: 0037a856 WriteData: 2fb81b5f
|
|
# tb_core.u_sdram32 : at time 49817.0 ns WRITE: Bank = 2 Row = 890, Col = 59, Data = a8bfc851
|
|
# Status: Burst-No: 38 Write Address: 0037a856 WriteData: a8bfc851
|
|
# tb_core.u_sdram32 : at time 49827.0 ns WRITE: Bank = 2 Row = 890, Col = 60, Data = a4d98649
|
|
# Status: Burst-No: 39 Write Address: 0037a856 WriteData: a4d98649
|
|
# tb_core.u_sdram32 : at time 49837.0 ns WRITE: Bank = 2 Row = 890, Col = 61, Data = 92fd2825
|
|
# Status: Burst-No: 40 Write Address: 0037a856 WriteData: 92fd2825
|
|
# tb_core.u_sdram32 : at time 49847.0 ns WRITE: Bank = 2 Row = 890, Col = 62, Data = b64ae66c
|
|
# Status: Burst-No: 41 Write Address: 0037a856 WriteData: b64ae66c
|
|
# tb_core.u_sdram32 : at time 49857.0 ns WRITE: Bank = 2 Row = 890, Col = 63, Data = ac509c58
|
|
# Status: Burst-No: 42 Write Address: 0037a856 WriteData: ac509c58
|
|
# tb_core.u_sdram32 : at time 49867.0 ns WRITE: Bank = 2 Row = 890, Col = 64, Data = af5d6c5e
|
|
# Status: Burst-No: 43 Write Address: 0037a856 WriteData: af5d6c5e
|
|
# tb_core.u_sdram32 : at time 49877.0 ns WRITE: Bank = 2 Row = 890, Col = 65, Data = 97dde22f
|
|
# Status: Burst-No: 44 Write Address: 0037a856 WriteData: 97dde22f
|
|
# tb_core.u_sdram32 : at time 49887.0 ns BST : Burst Terminate
|
|
# Write Address: 000f5a83, Burst Size: 40
|
|
# tb_core.u_sdram32 : at time 50027.0 ns ACT : Bank = 2 Row = 245
|
|
# tb_core.u_sdram32 : at time 50057.0 ns WRITE: Bank = 2 Row = 245, Col = 160, Data = 6a5ddbd4
|
|
# Status: Burst-No: 0 Write Address: 000f5a83 WriteData: 6a5ddbd4
|
|
# tb_core.u_sdram32 : at time 50067.0 ns WRITE: Bank = 2 Row = 245, Col = 161, Data = ca0e4494
|
|
# Status: Burst-No: 1 Write Address: 000f5a83 WriteData: ca0e4494
|
|
# tb_core.u_sdram32 : at time 50077.0 ns WRITE: Bank = 2 Row = 245, Col = 162, Data = c961e492
|
|
# Status: Burst-No: 2 Write Address: 000f5a83 WriteData: c961e492
|
|
# tb_core.u_sdram32 : at time 50087.0 ns WRITE: Bank = 2 Row = 245, Col = 163, Data = 1e32673c
|
|
# Status: Burst-No: 3 Write Address: 000f5a83 WriteData: 1e32673c
|
|
# tb_core.u_sdram32 : at time 50097.0 ns WRITE: Bank = 2 Row = 245, Col = 164, Data = 23301b46
|
|
# Status: Burst-No: 4 Write Address: 000f5a83 WriteData: 23301b46
|
|
# tb_core.u_sdram32 : at time 50107.0 ns WRITE: Bank = 2 Row = 245, Col = 165, Data = b7b82a6f
|
|
# Status: Burst-No: 5 Write Address: 000f5a83 WriteData: b7b82a6f
|
|
# tb_core.u_sdram32 : at time 50117.0 ns WRITE: Bank = 2 Row = 245, Col = 166, Data = a0b3ae41
|
|
# Status: Burst-No: 6 Write Address: 000f5a83 WriteData: a0b3ae41
|
|
# tb_core.u_sdram32 : at time 50127.0 ns WRITE: Bank = 2 Row = 245, Col = 167, Data = 7bde15f7
|
|
# Status: Burst-No: 7 Write Address: 000f5a83 WriteData: 7bde15f7
|
|
# tb_core.u_sdram32 : at time 50137.0 ns WRITE: Bank = 2 Row = 245, Col = 168, Data = 8b7c3816
|
|
# Status: Burst-No: 8 Write Address: 000f5a83 WriteData: 8b7c3816
|
|
# tb_core.u_sdram32 : at time 50147.0 ns WRITE: Bank = 2 Row = 245, Col = 169, Data = 39092f72
|
|
# Status: Burst-No: 9 Write Address: 000f5a83 WriteData: 39092f72
|
|
# tb_core.u_sdram32 : at time 50157.0 ns WRITE: Bank = 2 Row = 245, Col = 170, Data = 5136a5a2
|
|
# Status: Burst-No: 10 Write Address: 000f5a83 WriteData: 5136a5a2
|
|
# tb_core.u_sdram32 : at time 50167.0 ns WRITE: Bank = 2 Row = 245, Col = 171, Data = 71f059e3
|
|
# Status: Burst-No: 11 Write Address: 000f5a83 WriteData: 71f059e3
|
|
# tb_core.u_sdram32 : at time 50177.0 ns WRITE: Bank = 2 Row = 245, Col = 172, Data = c9490292
|
|
# Status: Burst-No: 12 Write Address: 000f5a83 WriteData: c9490292
|
|
# tb_core.u_sdram32 : at time 50187.0 ns WRITE: Bank = 2 Row = 245, Col = 173, Data = e5ceb0cb
|
|
# Status: Burst-No: 13 Write Address: 000f5a83 WriteData: e5ceb0cb
|
|
# tb_core.u_sdram32 : at time 50197.0 ns WRITE: Bank = 2 Row = 245, Col = 174, Data = 34097568
|
|
# Status: Burst-No: 14 Write Address: 000f5a83 WriteData: 34097568
|
|
# tb_core.u_sdram32 : at time 50207.0 ns WRITE: Bank = 2 Row = 245, Col = 175, Data = 98b4ee31
|
|
# Status: Burst-No: 15 Write Address: 000f5a83 WriteData: 98b4ee31
|
|
# tb_core.u_sdram32 : at time 50217.0 ns WRITE: Bank = 2 Row = 245, Col = 176, Data = 65c803cb
|
|
# Status: Burst-No: 16 Write Address: 000f5a83 WriteData: 65c803cb
|
|
# tb_core.u_sdram32 : at time 50227.0 ns WRITE: Bank = 2 Row = 245, Col = 177, Data = aad1c855
|
|
# Status: Burst-No: 17 Write Address: 000f5a83 WriteData: aad1c855
|
|
# tb_core.u_sdram32 : at time 50237.0 ns WRITE: Bank = 2 Row = 245, Col = 178, Data = 38a38971
|
|
# Status: Burst-No: 18 Write Address: 000f5a83 WriteData: 38a38971
|
|
# tb_core.u_sdram32 : at time 50247.0 ns WRITE: Bank = 2 Row = 245, Col = 179, Data = 2f49535e
|
|
# Status: Burst-No: 19 Write Address: 000f5a83 WriteData: 2f49535e
|
|
# tb_core.u_sdram32 : at time 50257.0 ns WRITE: Bank = 2 Row = 245, Col = 180, Data = e6e186cd
|
|
# Status: Burst-No: 20 Write Address: 000f5a83 WriteData: e6e186cd
|
|
# tb_core.u_sdram32 : at time 50267.0 ns WRITE: Bank = 2 Row = 245, Col = 181, Data = daf356b5
|
|
# Status: Burst-No: 21 Write Address: 000f5a83 WriteData: daf356b5
|
|
# tb_core.u_sdram32 : at time 50277.0 ns WRITE: Bank = 2 Row = 245, Col = 182, Data = 04410d08
|
|
# Status: Burst-No: 22 Write Address: 000f5a83 WriteData: 04410d08
|
|
# tb_core.u_sdram32 : at time 50287.0 ns WRITE: Bank = 2 Row = 245, Col = 183, Data = c118be82
|
|
# Status: Burst-No: 23 Write Address: 000f5a83 WriteData: c118be82
|
|
# tb_core.u_sdram32 : at time 50297.0 ns WRITE: Bank = 2 Row = 245, Col = 184, Data = 9f80983f
|
|
# Status: Burst-No: 24 Write Address: 000f5a83 WriteData: 9f80983f
|
|
# tb_core.u_sdram32 : at time 50307.0 ns WRITE: Bank = 2 Row = 245, Col = 185, Data = d807f2b0
|
|
# Status: Burst-No: 25 Write Address: 000f5a83 WriteData: d807f2b0
|
|
# tb_core.u_sdram32 : at time 50317.0 ns WRITE: Bank = 2 Row = 245, Col = 186, Data = 560eefac
|
|
# Status: Burst-No: 26 Write Address: 000f5a83 WriteData: 560eefac
|
|
# tb_core.u_sdram32 : at time 50327.0 ns WRITE: Bank = 2 Row = 245, Col = 187, Data = 99183032
|
|
# Status: Burst-No: 27 Write Address: 000f5a83 WriteData: 99183032
|
|
# tb_core.u_sdram32 : at time 50337.0 ns WRITE: Bank = 2 Row = 245, Col = 188, Data = 029f0505
|
|
# Status: Burst-No: 28 Write Address: 000f5a83 WriteData: 029f0505
|
|
# tb_core.u_sdram32 : at time 50347.0 ns WRITE: Bank = 2 Row = 245, Col = 189, Data = 2f73fb5e
|
|
# Status: Burst-No: 29 Write Address: 000f5a83 WriteData: 2f73fb5e
|
|
# tb_core.u_sdram32 : at time 50357.0 ns WRITE: Bank = 2 Row = 245, Col = 190, Data = dc16d8b8
|
|
# Status: Burst-No: 30 Write Address: 000f5a83 WriteData: dc16d8b8
|
|
# tb_core.u_sdram32 : at time 50367.0 ns WRITE: Bank = 2 Row = 245, Col = 191, Data = 3ec2677d
|
|
# Status: Burst-No: 31 Write Address: 000f5a83 WriteData: 3ec2677d
|
|
# tb_core.u_sdram32 : at time 50377.0 ns WRITE: Bank = 2 Row = 245, Col = 192, Data = 8511580a
|
|
# Status: Burst-No: 32 Write Address: 000f5a83 WriteData: 8511580a
|
|
# tb_core.u_sdram32 : at time 50387.0 ns WRITE: Bank = 2 Row = 245, Col = 193, Data = c6878a8d
|
|
# Status: Burst-No: 33 Write Address: 000f5a83 WriteData: c6878a8d
|
|
# tb_core.u_sdram32 : at time 50397.0 ns WRITE: Bank = 2 Row = 245, Col = 194, Data = 64eb39c9
|
|
# Status: Burst-No: 34 Write Address: 000f5a83 WriteData: 64eb39c9
|
|
# tb_core.u_sdram32 : at time 50407.0 ns WRITE: Bank = 2 Row = 245, Col = 195, Data = f8d3d8f1
|
|
# Status: Burst-No: 35 Write Address: 000f5a83 WriteData: f8d3d8f1
|
|
# tb_core.u_sdram32 : at time 50417.0 ns WRITE: Bank = 2 Row = 245, Col = 196, Data = da12deb4
|
|
# Status: Burst-No: 36 Write Address: 000f5a83 WriteData: da12deb4
|
|
# tb_core.u_sdram32 : at time 50427.0 ns WRITE: Bank = 2 Row = 245, Col = 197, Data = 729a7fe5
|
|
# Status: Burst-No: 37 Write Address: 000f5a83 WriteData: 729a7fe5
|
|
# tb_core.u_sdram32 : at time 50437.0 ns WRITE: Bank = 2 Row = 245, Col = 198, Data = 1a133934
|
|
# Status: Burst-No: 38 Write Address: 000f5a83 WriteData: 1a133934
|
|
# tb_core.u_sdram32 : at time 50447.0 ns WRITE: Bank = 2 Row = 245, Col = 199, Data = 11c6c523
|
|
# Status: Burst-No: 39 Write Address: 000f5a83 WriteData: 11c6c523
|
|
# tb_core.u_sdram32 : at time 50457.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 50597.0 ns ACT : Bank = 2 Row = 890
|
|
# tb_core.u_sdram32 : at time 50653.0 ns READ : Bank = 2 Row = 890, Col = 21, Data = e99b1cd3
|
|
# tb_core.u_sdram32 : at time 50663.0 ns READ : Bank = 2 Row = 890, Col = 22, Data = 0d633f1a
|
|
# READ STATUS: Burst-No: 0 Addr: 0037a856 Rxd: e99b1cd3
|
|
# tb_core.u_sdram32 : at time 50673.0 ns READ : Bank = 2 Row = 890, Col = 23, Data = 005d5100
|
|
# READ STATUS: Burst-No: 1 Addr: 0037a858 Rxd: 0d633f1a
|
|
# tb_core.u_sdram32 : at time 50683.0 ns READ : Bank = 2 Row = 890, Col = 24, Data = 560d5fac
|
|
# READ STATUS: Burst-No: 2 Addr: 0037a85a Rxd: 005d5100
|
|
# tb_core.u_sdram32 : at time 50693.0 ns READ : Bank = 2 Row = 890, Col = 25, Data = f4588ee8
|
|
# READ STATUS: Burst-No: 3 Addr: 0037a85c Rxd: 560d5fac
|
|
# tb_core.u_sdram32 : at time 50703.0 ns READ : Bank = 2 Row = 890, Col = 26, Data = b66a586c
|
|
# READ STATUS: Burst-No: 4 Addr: 0037a85e Rxd: f4588ee8
|
|
# tb_core.u_sdram32 : at time 50713.0 ns READ : Bank = 2 Row = 890, Col = 27, Data = d03c40a0
|
|
# READ STATUS: Burst-No: 5 Addr: 0037a860 Rxd: b66a586c
|
|
# tb_core.u_sdram32 : at time 50723.0 ns READ : Bank = 2 Row = 890, Col = 28, Data = 0ecd251d
|
|
# READ STATUS: Burst-No: 6 Addr: 0037a862 Rxd: d03c40a0
|
|
# tb_core.u_sdram32 : at time 50733.0 ns READ : Bank = 2 Row = 890, Col = 29, Data = 68c14fd1
|
|
# READ STATUS: Burst-No: 7 Addr: 0037a864 Rxd: 0ecd251d
|
|
# tb_core.u_sdram32 : at time 50743.0 ns READ : Bank = 2 Row = 890, Col = 30, Data = 006d0f00
|
|
# READ STATUS: Burst-No: 8 Addr: 0037a866 Rxd: 68c14fd1
|
|
# tb_core.u_sdram32 : at time 50753.0 ns READ : Bank = 2 Row = 890, Col = 31, Data = ed4d78da
|
|
# READ STATUS: Burst-No: 9 Addr: 0037a868 Rxd: 006d0f00
|
|
# tb_core.u_sdram32 : at time 50763.0 ns READ : Bank = 2 Row = 890, Col = 32, Data = 6c1987d8
|
|
# READ STATUS: Burst-No: 10 Addr: 0037a86a Rxd: ed4d78da
|
|
# tb_core.u_sdram32 : at time 50773.0 ns READ : Bank = 2 Row = 890, Col = 33, Data = 605dbbc0
|
|
# READ STATUS: Burst-No: 11 Addr: 0037a86c Rxd: 6c1987d8
|
|
# tb_core.u_sdram32 : at time 50783.0 ns READ : Bank = 2 Row = 890, Col = 34, Data = a6490c4c
|
|
# READ STATUS: Burst-No: 12 Addr: 0037a86e Rxd: 605dbbc0
|
|
# tb_core.u_sdram32 : at time 50793.0 ns READ : Bank = 2 Row = 890, Col = 35, Data = e8cfb0d1
|
|
# READ STATUS: Burst-No: 13 Addr: 0037a870 Rxd: a6490c4c
|
|
# tb_core.u_sdram32 : at time 50803.0 ns READ : Bank = 2 Row = 890, Col = 36, Data = a8bb0c51
|
|
# READ STATUS: Burst-No: 14 Addr: 0037a872 Rxd: e8cfb0d1
|
|
# tb_core.u_sdram32 : at time 50813.0 ns READ : Bank = 2 Row = 890, Col = 37, Data = a8e1ee51
|
|
# READ STATUS: Burst-No: 15 Addr: 0037a874 Rxd: a8bb0c51
|
|
# tb_core.u_sdram32 : at time 50823.0 ns READ : Bank = 2 Row = 890, Col = 38, Data = a2a4be45
|
|
# READ STATUS: Burst-No: 16 Addr: 0037a876 Rxd: a8e1ee51
|
|
# tb_core.u_sdram32 : at time 50833.0 ns READ : Bank = 2 Row = 890, Col = 39, Data = 598367b3
|
|
# READ STATUS: Burst-No: 17 Addr: 0037a878 Rxd: a2a4be45
|
|
# tb_core.u_sdram32 : at time 50843.0 ns READ : Bank = 2 Row = 890, Col = 40, Data = bf21067e
|
|
# READ STATUS: Burst-No: 18 Addr: 0037a87a Rxd: 598367b3
|
|
# tb_core.u_sdram32 : at time 50853.0 ns READ : Bank = 2 Row = 890, Col = 41, Data = c049c680
|
|
# READ STATUS: Burst-No: 19 Addr: 0037a87c Rxd: bf21067e
|
|
# tb_core.u_sdram32 : at time 50863.0 ns READ : Bank = 2 Row = 890, Col = 42, Data = 7e5b53fc
|
|
# READ STATUS: Burst-No: 20 Addr: 0037a87e Rxd: c049c680
|
|
# tb_core.u_sdram32 : at time 50873.0 ns READ : Bank = 2 Row = 890, Col = 43, Data = 2426d748
|
|
# READ STATUS: Burst-No: 21 Addr: 0037a880 Rxd: 7e5b53fc
|
|
# tb_core.u_sdram32 : at time 50883.0 ns READ : Bank = 2 Row = 890, Col = 44, Data = c0ad8081
|
|
# READ STATUS: Burst-No: 22 Addr: 0037a882 Rxd: 2426d748
|
|
# tb_core.u_sdram32 : at time 50893.0 ns READ : Bank = 2 Row = 890, Col = 45, Data = 98b4dc31
|
|
# READ STATUS: Burst-No: 23 Addr: 0037a884 Rxd: c0ad8081
|
|
# tb_core.u_sdram32 : at time 50903.0 ns READ : Bank = 2 Row = 890, Col = 46, Data = 53a8b5a7
|
|
# READ STATUS: Burst-No: 24 Addr: 0037a886 Rxd: 98b4dc31
|
|
# tb_core.u_sdram32 : at time 50913.0 ns READ : Bank = 2 Row = 890, Col = 47, Data = 41b1fd83
|
|
# READ STATUS: Burst-No: 25 Addr: 0037a888 Rxd: 53a8b5a7
|
|
# tb_core.u_sdram32 : at time 50923.0 ns READ : Bank = 2 Row = 890, Col = 48, Data = 9fc1423f
|
|
# READ STATUS: Burst-No: 26 Addr: 0037a88a Rxd: 41b1fd83
|
|
# tb_core.u_sdram32 : at time 50933.0 ns READ : Bank = 2 Row = 890, Col = 49, Data = 00029100
|
|
# READ STATUS: Burst-No: 27 Addr: 0037a88c Rxd: 9fc1423f
|
|
# tb_core.u_sdram32 : at time 50943.0 ns READ : Bank = 2 Row = 890, Col = 50, Data = b2158c64
|
|
# READ STATUS: Burst-No: 28 Addr: 0037a88e Rxd: 00029100
|
|
# tb_core.u_sdram32 : at time 50953.0 ns READ : Bank = 2 Row = 890, Col = 51, Data = 3f52937e
|
|
# READ STATUS: Burst-No: 29 Addr: 0037a890 Rxd: b2158c64
|
|
# tb_core.u_sdram32 : at time 50963.0 ns READ : Bank = 2 Row = 890, Col = 52, Data = 7887dff1
|
|
# READ STATUS: Burst-No: 30 Addr: 0037a892 Rxd: 3f52937e
|
|
# tb_core.u_sdram32 : at time 50973.0 ns READ : Bank = 2 Row = 890, Col = 53, Data = 472dfb8e
|
|
# READ STATUS: Burst-No: 31 Addr: 0037a894 Rxd: 7887dff1
|
|
# tb_core.u_sdram32 : at time 50983.0 ns READ : Bank = 2 Row = 890, Col = 54, Data = 4f234d9e
|
|
# READ STATUS: Burst-No: 32 Addr: 0037a896 Rxd: 472dfb8e
|
|
# tb_core.u_sdram32 : at time 50993.0 ns READ : Bank = 2 Row = 890, Col = 55, Data = 742819e8
|
|
# READ STATUS: Burst-No: 33 Addr: 0037a898 Rxd: 4f234d9e
|
|
# tb_core.u_sdram32 : at time 51003.0 ns READ : Bank = 2 Row = 890, Col = 56, Data = 24839b49
|
|
# READ STATUS: Burst-No: 34 Addr: 0037a89a Rxd: 742819e8
|
|
# tb_core.u_sdram32 : at time 51013.0 ns READ : Bank = 2 Row = 890, Col = 57, Data = 8569fa0a
|
|
# READ STATUS: Burst-No: 35 Addr: 0037a89c Rxd: 24839b49
|
|
# tb_core.u_sdram32 : at time 51023.0 ns READ : Bank = 2 Row = 890, Col = 58, Data = 2fb81b5f
|
|
# READ STATUS: Burst-No: 36 Addr: 0037a89e Rxd: 8569fa0a
|
|
# tb_core.u_sdram32 : at time 51033.0 ns READ : Bank = 2 Row = 890, Col = 59, Data = a8bfc851
|
|
# READ STATUS: Burst-No: 37 Addr: 0037a8a0 Rxd: 2fb81b5f
|
|
# tb_core.u_sdram32 : at time 51043.0 ns READ : Bank = 2 Row = 890, Col = 60, Data = a4d98649
|
|
# READ STATUS: Burst-No: 38 Addr: 0037a8a2 Rxd: a8bfc851
|
|
# tb_core.u_sdram32 : at time 51053.0 ns READ : Bank = 2 Row = 890, Col = 61, Data = 92fd2825
|
|
# READ STATUS: Burst-No: 39 Addr: 0037a8a4 Rxd: a4d98649
|
|
# tb_core.u_sdram32 : at time 51063.0 ns READ : Bank = 2 Row = 890, Col = 62, Data = b64ae66c
|
|
# READ STATUS: Burst-No: 40 Addr: 0037a8a6 Rxd: 92fd2825
|
|
# tb_core.u_sdram32 : at time 51073.0 ns READ : Bank = 2 Row = 890, Col = 63, Data = ac509c58
|
|
# tb_core.u_sdram32 : at time 51077.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 41 Addr: 0037a8a8 Rxd: b64ae66c
|
|
# tb_core.u_sdram32 : at time 51083.0 ns READ : Bank = 2 Row = 890, Col = 64, Data = af5d6c5e
|
|
# READ STATUS: Burst-No: 42 Addr: 0037a8aa Rxd: ac509c58
|
|
# tb_core.u_sdram32 : at time 51093.0 ns READ : Bank = 2 Row = 890, Col = 65, Data = 97dde22f
|
|
# READ STATUS: Burst-No: 43 Addr: 0037a8ac Rxd: af5d6c5e
|
|
# READ STATUS: Burst-No: 44 Addr: 0037a8ae Rxd: 97dde22f
|
|
# tb_core.u_sdram32 : at time 51267.0 ns ACT : Bank = 2 Row = 245
|
|
# tb_core.u_sdram32 : at time 51323.0 ns READ : Bank = 2 Row = 245, Col = 160, Data = 6a5ddbd4
|
|
# tb_core.u_sdram32 : at time 51333.0 ns READ : Bank = 2 Row = 245, Col = 161, Data = ca0e4494
|
|
# READ STATUS: Burst-No: 0 Addr: 000f5a83 Rxd: 6a5ddbd4
|
|
# tb_core.u_sdram32 : at time 51343.0 ns READ : Bank = 2 Row = 245, Col = 162, Data = c961e492
|
|
# READ STATUS: Burst-No: 1 Addr: 000f5a85 Rxd: ca0e4494
|
|
# tb_core.u_sdram32 : at time 51353.0 ns READ : Bank = 2 Row = 245, Col = 163, Data = 1e32673c
|
|
# READ STATUS: Burst-No: 2 Addr: 000f5a87 Rxd: c961e492
|
|
# tb_core.u_sdram32 : at time 51363.0 ns READ : Bank = 2 Row = 245, Col = 164, Data = 23301b46
|
|
# READ STATUS: Burst-No: 3 Addr: 000f5a89 Rxd: 1e32673c
|
|
# tb_core.u_sdram32 : at time 51373.0 ns READ : Bank = 2 Row = 245, Col = 165, Data = b7b82a6f
|
|
# READ STATUS: Burst-No: 4 Addr: 000f5a8b Rxd: 23301b46
|
|
# tb_core.u_sdram32 : at time 51383.0 ns READ : Bank = 2 Row = 245, Col = 166, Data = a0b3ae41
|
|
# READ STATUS: Burst-No: 5 Addr: 000f5a8d Rxd: b7b82a6f
|
|
# tb_core.u_sdram32 : at time 51393.0 ns READ : Bank = 2 Row = 245, Col = 167, Data = 7bde15f7
|
|
# READ STATUS: Burst-No: 6 Addr: 000f5a8f Rxd: a0b3ae41
|
|
# tb_core.u_sdram32 : at time 51403.0 ns READ : Bank = 2 Row = 245, Col = 168, Data = 8b7c3816
|
|
# READ STATUS: Burst-No: 7 Addr: 000f5a91 Rxd: 7bde15f7
|
|
# tb_core.u_sdram32 : at time 51413.0 ns READ : Bank = 2 Row = 245, Col = 169, Data = 39092f72
|
|
# READ STATUS: Burst-No: 8 Addr: 000f5a93 Rxd: 8b7c3816
|
|
# tb_core.u_sdram32 : at time 51423.0 ns READ : Bank = 2 Row = 245, Col = 170, Data = 5136a5a2
|
|
# READ STATUS: Burst-No: 9 Addr: 000f5a95 Rxd: 39092f72
|
|
# tb_core.u_sdram32 : at time 51433.0 ns READ : Bank = 2 Row = 245, Col = 171, Data = 71f059e3
|
|
# READ STATUS: Burst-No: 10 Addr: 000f5a97 Rxd: 5136a5a2
|
|
# tb_core.u_sdram32 : at time 51443.0 ns READ : Bank = 2 Row = 245, Col = 172, Data = c9490292
|
|
# READ STATUS: Burst-No: 11 Addr: 000f5a99 Rxd: 71f059e3
|
|
# tb_core.u_sdram32 : at time 51453.0 ns READ : Bank = 2 Row = 245, Col = 173, Data = e5ceb0cb
|
|
# READ STATUS: Burst-No: 12 Addr: 000f5a9b Rxd: c9490292
|
|
# tb_core.u_sdram32 : at time 51463.0 ns READ : Bank = 2 Row = 245, Col = 174, Data = 34097568
|
|
# READ STATUS: Burst-No: 13 Addr: 000f5a9d Rxd: e5ceb0cb
|
|
# tb_core.u_sdram32 : at time 51473.0 ns READ : Bank = 2 Row = 245, Col = 175, Data = 98b4ee31
|
|
# READ STATUS: Burst-No: 14 Addr: 000f5a9f Rxd: 34097568
|
|
# tb_core.u_sdram32 : at time 51483.0 ns READ : Bank = 2 Row = 245, Col = 176, Data = 65c803cb
|
|
# READ STATUS: Burst-No: 15 Addr: 000f5aa1 Rxd: 98b4ee31
|
|
# tb_core.u_sdram32 : at time 51493.0 ns READ : Bank = 2 Row = 245, Col = 177, Data = aad1c855
|
|
# READ STATUS: Burst-No: 16 Addr: 000f5aa3 Rxd: 65c803cb
|
|
# tb_core.u_sdram32 : at time 51503.0 ns READ : Bank = 2 Row = 245, Col = 178, Data = 38a38971
|
|
# READ STATUS: Burst-No: 17 Addr: 000f5aa5 Rxd: aad1c855
|
|
# tb_core.u_sdram32 : at time 51513.0 ns READ : Bank = 2 Row = 245, Col = 179, Data = 2f49535e
|
|
# READ STATUS: Burst-No: 18 Addr: 000f5aa7 Rxd: 38a38971
|
|
# tb_core.u_sdram32 : at time 51523.0 ns READ : Bank = 2 Row = 245, Col = 180, Data = e6e186cd
|
|
# READ STATUS: Burst-No: 19 Addr: 000f5aa9 Rxd: 2f49535e
|
|
# tb_core.u_sdram32 : at time 51533.0 ns READ : Bank = 2 Row = 245, Col = 181, Data = daf356b5
|
|
# READ STATUS: Burst-No: 20 Addr: 000f5aab Rxd: e6e186cd
|
|
# tb_core.u_sdram32 : at time 51543.0 ns READ : Bank = 2 Row = 245, Col = 182, Data = 04410d08
|
|
# READ STATUS: Burst-No: 21 Addr: 000f5aad Rxd: daf356b5
|
|
# tb_core.u_sdram32 : at time 51553.0 ns READ : Bank = 2 Row = 245, Col = 183, Data = c118be82
|
|
# READ STATUS: Burst-No: 22 Addr: 000f5aaf Rxd: 04410d08
|
|
# tb_core.u_sdram32 : at time 51563.0 ns READ : Bank = 2 Row = 245, Col = 184, Data = 9f80983f
|
|
# READ STATUS: Burst-No: 23 Addr: 000f5ab1 Rxd: c118be82
|
|
# tb_core.u_sdram32 : at time 51573.0 ns READ : Bank = 2 Row = 245, Col = 185, Data = d807f2b0
|
|
# READ STATUS: Burst-No: 24 Addr: 000f5ab3 Rxd: 9f80983f
|
|
# tb_core.u_sdram32 : at time 51583.0 ns READ : Bank = 2 Row = 245, Col = 186, Data = 560eefac
|
|
# READ STATUS: Burst-No: 25 Addr: 000f5ab5 Rxd: d807f2b0
|
|
# tb_core.u_sdram32 : at time 51593.0 ns READ : Bank = 2 Row = 245, Col = 187, Data = 99183032
|
|
# READ STATUS: Burst-No: 26 Addr: 000f5ab7 Rxd: 560eefac
|
|
# tb_core.u_sdram32 : at time 51603.0 ns READ : Bank = 2 Row = 245, Col = 188, Data = 029f0505
|
|
# READ STATUS: Burst-No: 27 Addr: 000f5ab9 Rxd: 99183032
|
|
# tb_core.u_sdram32 : at time 51613.0 ns READ : Bank = 2 Row = 245, Col = 189, Data = 2f73fb5e
|
|
# READ STATUS: Burst-No: 28 Addr: 000f5abb Rxd: 029f0505
|
|
# tb_core.u_sdram32 : at time 51623.0 ns READ : Bank = 2 Row = 245, Col = 190, Data = dc16d8b8
|
|
# READ STATUS: Burst-No: 29 Addr: 000f5abd Rxd: 2f73fb5e
|
|
# tb_core.u_sdram32 : at time 51633.0 ns READ : Bank = 2 Row = 245, Col = 191, Data = 3ec2677d
|
|
# READ STATUS: Burst-No: 30 Addr: 000f5abf Rxd: dc16d8b8
|
|
# tb_core.u_sdram32 : at time 51643.0 ns READ : Bank = 2 Row = 245, Col = 192, Data = 8511580a
|
|
# READ STATUS: Burst-No: 31 Addr: 000f5ac1 Rxd: 3ec2677d
|
|
# tb_core.u_sdram32 : at time 51653.0 ns READ : Bank = 2 Row = 245, Col = 193, Data = c6878a8d
|
|
# READ STATUS: Burst-No: 32 Addr: 000f5ac3 Rxd: 8511580a
|
|
# tb_core.u_sdram32 : at time 51663.0 ns READ : Bank = 2 Row = 245, Col = 194, Data = 64eb39c9
|
|
# READ STATUS: Burst-No: 33 Addr: 000f5ac5 Rxd: c6878a8d
|
|
# tb_core.u_sdram32 : at time 51673.0 ns READ : Bank = 2 Row = 245, Col = 195, Data = f8d3d8f1
|
|
# READ STATUS: Burst-No: 34 Addr: 000f5ac7 Rxd: 64eb39c9
|
|
# tb_core.u_sdram32 : at time 51683.0 ns READ : Bank = 2 Row = 245, Col = 196, Data = da12deb4
|
|
# READ STATUS: Burst-No: 35 Addr: 000f5ac9 Rxd: f8d3d8f1
|
|
# tb_core.u_sdram32 : at time 51693.0 ns READ : Bank = 2 Row = 245, Col = 197, Data = 729a7fe5
|
|
# tb_core.u_sdram32 : at time 51697.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 36 Addr: 000f5acb Rxd: da12deb4
|
|
# tb_core.u_sdram32 : at time 51703.0 ns READ : Bank = 2 Row = 245, Col = 198, Data = 1a133934
|
|
# READ STATUS: Burst-No: 37 Addr: 000f5acd Rxd: 729a7fe5
|
|
# tb_core.u_sdram32 : at time 51713.0 ns READ : Bank = 2 Row = 245, Col = 199, Data = 11c6c523
|
|
# READ STATUS: Burst-No: 38 Addr: 000f5acf Rxd: 1a133934
|
|
# READ STATUS: Burst-No: 39 Addr: 000f5ad1 Rxd: 11c6c523
|
|
# Write Address: 0011a32d, Burst Size: 50
|
|
# tb_core.u_sdram32 : at time 51887.0 ns ACT : Bank = 0 Row = 282
|
|
# tb_core.u_sdram32 : at time 51917.0 ns WRITE: Bank = 0 Row = 282, Col = 203, Data = 2f36c55e
|
|
# Status: Burst-No: 0 Write Address: 0011a32d WriteData: 2f36c55e
|
|
# tb_core.u_sdram32 : at time 51927.0 ns WRITE: Bank = 0 Row = 282, Col = 204, Data = 5a0f27b4
|
|
# Status: Burst-No: 1 Write Address: 0011a32d WriteData: 5a0f27b4
|
|
# tb_core.u_sdram32 : at time 51937.0 ns WRITE: Bank = 0 Row = 282, Col = 205, Data = 073a730e
|
|
# Status: Burst-No: 2 Write Address: 0011a32d WriteData: 073a730e
|
|
# tb_core.u_sdram32 : at time 51947.0 ns WRITE: Bank = 0 Row = 282, Col = 206, Data = 322cc164
|
|
# Status: Burst-No: 3 Write Address: 0011a32d WriteData: 322cc164
|
|
# tb_core.u_sdram32 : at time 51957.0 ns WRITE: Bank = 0 Row = 282, Col = 207, Data = 320a8b64
|
|
# Status: Burst-No: 4 Write Address: 0011a32d WriteData: 320a8b64
|
|
# tb_core.u_sdram32 : at time 51967.0 ns WRITE: Bank = 0 Row = 282, Col = 208, Data = 2416b948
|
|
# Status: Burst-No: 5 Write Address: 0011a32d WriteData: 2416b948
|
|
# tb_core.u_sdram32 : at time 51977.0 ns WRITE: Bank = 0 Row = 282, Col = 209, Data = c544d88a
|
|
# Status: Burst-No: 6 Write Address: 0011a32d WriteData: c544d88a
|
|
# tb_core.u_sdram32 : at time 51987.0 ns WRITE: Bank = 0 Row = 282, Col = 210, Data = 4dfe879b
|
|
# Status: Burst-No: 7 Write Address: 0011a32d WriteData: 4dfe879b
|
|
# tb_core.u_sdram32 : at time 51997.0 ns WRITE: Bank = 0 Row = 282, Col = 211, Data = e6fbf4cd
|
|
# Status: Burst-No: 8 Write Address: 0011a32d WriteData: e6fbf4cd
|
|
# tb_core.u_sdram32 : at time 52007.0 ns WRITE: Bank = 0 Row = 282, Col = 212, Data = b5f8fa6b
|
|
# Status: Burst-No: 9 Write Address: 0011a32d WriteData: b5f8fa6b
|
|
# tb_core.u_sdram32 : at time 52017.0 ns WRITE: Bank = 0 Row = 282, Col = 213, Data = 55ff23ab
|
|
# Status: Burst-No: 10 Write Address: 0011a32d WriteData: 55ff23ab
|
|
# tb_core.u_sdram32 : at time 52027.0 ns WRITE: Bank = 0 Row = 282, Col = 214, Data = f1eca2e3
|
|
# Status: Burst-No: 11 Write Address: 0011a32d WriteData: f1eca2e3
|
|
# tb_core.u_sdram32 : at time 52037.0 ns WRITE: Bank = 0 Row = 282, Col = 215, Data = 5e9d2fbd
|
|
# Status: Burst-No: 12 Write Address: 0011a32d WriteData: 5e9d2fbd
|
|
# tb_core.u_sdram32 : at time 52047.0 ns WRITE: Bank = 0 Row = 282, Col = 216, Data = ecff24d9
|
|
# Status: Burst-No: 13 Write Address: 0011a32d WriteData: ecff24d9
|
|
# tb_core.u_sdram32 : at time 52057.0 ns WRITE: Bank = 0 Row = 282, Col = 217, Data = e11a58c2
|
|
# Status: Burst-No: 14 Write Address: 0011a32d WriteData: e11a58c2
|
|
# tb_core.u_sdram32 : at time 52067.0 ns WRITE: Bank = 0 Row = 282, Col = 218, Data = f059ace0
|
|
# Status: Burst-No: 15 Write Address: 0011a32d WriteData: f059ace0
|
|
# tb_core.u_sdram32 : at time 52077.0 ns WRITE: Bank = 0 Row = 282, Col = 219, Data = afd1265f
|
|
# Status: Burst-No: 16 Write Address: 0011a32d WriteData: afd1265f
|
|
# tb_core.u_sdram32 : at time 52087.0 ns WRITE: Bank = 0 Row = 282, Col = 220, Data = 8edc361d
|
|
# Status: Burst-No: 17 Write Address: 0011a32d WriteData: 8edc361d
|
|
# tb_core.u_sdram32 : at time 52097.0 ns WRITE: Bank = 0 Row = 282, Col = 221, Data = c9b64c93
|
|
# Status: Burst-No: 18 Write Address: 0011a32d WriteData: c9b64c93
|
|
# tb_core.u_sdram32 : at time 52107.0 ns WRITE: Bank = 0 Row = 282, Col = 222, Data = 13180326
|
|
# Status: Burst-No: 19 Write Address: 0011a32d WriteData: 13180326
|
|
# tb_core.u_sdram32 : at time 52117.0 ns WRITE: Bank = 0 Row = 282, Col = 223, Data = 82b78605
|
|
# Status: Burst-No: 20 Write Address: 0011a32d WriteData: 82b78605
|
|
# tb_core.u_sdram32 : at time 52127.0 ns WRITE: Bank = 0 Row = 282, Col = 224, Data = 84a8e809
|
|
# Status: Burst-No: 21 Write Address: 0011a32d WriteData: 84a8e809
|
|
# tb_core.u_sdram32 : at time 52137.0 ns WRITE: Bank = 0 Row = 282, Col = 225, Data = b62d846c
|
|
# Status: Burst-No: 22 Write Address: 0011a32d WriteData: b62d846c
|
|
# tb_core.u_sdram32 : at time 52147.0 ns WRITE: Bank = 0 Row = 282, Col = 226, Data = b5c5c06b
|
|
# Status: Burst-No: 23 Write Address: 0011a32d WriteData: b5c5c06b
|
|
# tb_core.u_sdram32 : at time 52157.0 ns WRITE: Bank = 0 Row = 282, Col = 227, Data = 5858bdb0
|
|
# Status: Burst-No: 24 Write Address: 0011a32d WriteData: 5858bdb0
|
|
# tb_core.u_sdram32 : at time 52167.0 ns WRITE: Bank = 0 Row = 282, Col = 228, Data = fb9fb8f7
|
|
# Status: Burst-No: 25 Write Address: 0011a32d WriteData: fb9fb8f7
|
|
# tb_core.u_sdram32 : at time 52177.0 ns WRITE: Bank = 0 Row = 282, Col = 229, Data = 52a151a5
|
|
# Status: Burst-No: 26 Write Address: 0011a32d WriteData: 52a151a5
|
|
# tb_core.u_sdram32 : at time 52187.0 ns WRITE: Bank = 0 Row = 282, Col = 230, Data = abe8c057
|
|
# Status: Burst-No: 27 Write Address: 0011a32d WriteData: abe8c057
|
|
# tb_core.u_sdram32 : at time 52197.0 ns WRITE: Bank = 0 Row = 282, Col = 231, Data = 3b11f376
|
|
# Status: Burst-No: 28 Write Address: 0011a32d WriteData: 3b11f376
|
|
# tb_core.u_sdram32 : at time 52207.0 ns WRITE: Bank = 0 Row = 282, Col = 232, Data = 2798e34f
|
|
# Status: Burst-No: 29 Write Address: 0011a32d WriteData: 2798e34f
|
|
# tb_core.u_sdram32 : at time 52217.0 ns WRITE: Bank = 0 Row = 282, Col = 233, Data = 5a45bdb4
|
|
# Status: Burst-No: 30 Write Address: 0011a32d WriteData: 5a45bdb4
|
|
# tb_core.u_sdram32 : at time 52227.0 ns WRITE: Bank = 0 Row = 282, Col = 234, Data = 8ecaa21d
|
|
# Status: Burst-No: 31 Write Address: 0011a32d WriteData: 8ecaa21d
|
|
# tb_core.u_sdram32 : at time 52237.0 ns WRITE: Bank = 0 Row = 282, Col = 235, Data = 43c11587
|
|
# Status: Burst-No: 32 Write Address: 0011a32d WriteData: 43c11587
|
|
# tb_core.u_sdram32 : at time 52247.0 ns WRITE: Bank = 0 Row = 282, Col = 236, Data = 23466346
|
|
# Status: Burst-No: 33 Write Address: 0011a32d WriteData: 23466346
|
|
# tb_core.u_sdram32 : at time 52257.0 ns WRITE: Bank = 0 Row = 282, Col = 237, Data = 336d9366
|
|
# Status: Burst-No: 34 Write Address: 0011a32d WriteData: 336d9366
|
|
# tb_core.u_sdram32 : at time 52267.0 ns WRITE: Bank = 0 Row = 282, Col = 238, Data = 4f14c19e
|
|
# Status: Burst-No: 35 Write Address: 0011a32d WriteData: 4f14c19e
|
|
# tb_core.u_sdram32 : at time 52277.0 ns WRITE: Bank = 0 Row = 282, Col = 239, Data = 1fb0d13f
|
|
# Status: Burst-No: 36 Write Address: 0011a32d WriteData: 1fb0d13f
|
|
# tb_core.u_sdram32 : at time 52287.0 ns WRITE: Bank = 0 Row = 282, Col = 240, Data = 2a2ff554
|
|
# Status: Burst-No: 37 Write Address: 0011a32d WriteData: 2a2ff554
|
|
# tb_core.u_sdram32 : at time 52297.0 ns WRITE: Bank = 0 Row = 282, Col = 241, Data = 2a565f54
|
|
# Status: Burst-No: 38 Write Address: 0011a32d WriteData: 2a565f54
|
|
# tb_core.u_sdram32 : at time 52307.0 ns WRITE: Bank = 0 Row = 282, Col = 242, Data = a62c344c
|
|
# Status: Burst-No: 39 Write Address: 0011a32d WriteData: a62c344c
|
|
# tb_core.u_sdram32 : at time 52317.0 ns WRITE: Bank = 0 Row = 282, Col = 243, Data = 83449006
|
|
# Status: Burst-No: 40 Write Address: 0011a32d WriteData: 83449006
|
|
# tb_core.u_sdram32 : at time 52327.0 ns WRITE: Bank = 0 Row = 282, Col = 244, Data = 286f1350
|
|
# Status: Burst-No: 41 Write Address: 0011a32d WriteData: 286f1350
|
|
# tb_core.u_sdram32 : at time 52337.0 ns WRITE: Bank = 0 Row = 282, Col = 245, Data = 16b46d2d
|
|
# Status: Burst-No: 42 Write Address: 0011a32d WriteData: 16b46d2d
|
|
# tb_core.u_sdram32 : at time 52347.0 ns WRITE: Bank = 0 Row = 282, Col = 246, Data = c34ddc86
|
|
# Status: Burst-No: 43 Write Address: 0011a32d WriteData: c34ddc86
|
|
# tb_core.u_sdram32 : at time 52357.0 ns WRITE: Bank = 0 Row = 282, Col = 247, Data = 3564836a
|
|
# Status: Burst-No: 44 Write Address: 0011a32d WriteData: 3564836a
|
|
# tb_core.u_sdram32 : at time 52367.0 ns WRITE: Bank = 0 Row = 282, Col = 248, Data = 5c2afdb8
|
|
# Status: Burst-No: 45 Write Address: 0011a32d WriteData: 5c2afdb8
|
|
# tb_core.u_sdram32 : at time 52377.0 ns WRITE: Bank = 0 Row = 282, Col = 249, Data = f7fecaef
|
|
# Status: Burst-No: 46 Write Address: 0011a32d WriteData: f7fecaef
|
|
# tb_core.u_sdram32 : at time 52387.0 ns WRITE: Bank = 0 Row = 282, Col = 250, Data = 506a57a0
|
|
# Status: Burst-No: 47 Write Address: 0011a32d WriteData: 506a57a0
|
|
# tb_core.u_sdram32 : at time 52397.0 ns WRITE: Bank = 0 Row = 282, Col = 251, Data = 1fa98f3f
|
|
# Status: Burst-No: 48 Write Address: 0011a32d WriteData: 1fa98f3f
|
|
# tb_core.u_sdram32 : at time 52407.0 ns WRITE: Bank = 0 Row = 282, Col = 252, Data = 84d4aa09
|
|
# Status: Burst-No: 49 Write Address: 0011a32d WriteData: 84d4aa09
|
|
# tb_core.u_sdram32 : at time 52417.0 ns BST : Burst Terminate
|
|
# Write Address: 003b42a8, Burst Size: 22
|
|
# tb_core.u_sdram32 : at time 52557.0 ns ACT : Bank = 0 Row = 948
|
|
# tb_core.u_sdram32 : at time 52587.0 ns WRITE: Bank = 0 Row = 948, Col = 170, Data = 8f49661e
|
|
# Status: Burst-No: 0 Write Address: 003b42a8 WriteData: 8f49661e
|
|
# tb_core.u_sdram32 : at time 52597.0 ns WRITE: Bank = 0 Row = 948, Col = 171, Data = dc22dcb8
|
|
# Status: Burst-No: 1 Write Address: 003b42a8 WriteData: dc22dcb8
|
|
# tb_core.u_sdram32 : at time 52607.0 ns WRITE: Bank = 0 Row = 948, Col = 172, Data = e70a62ce
|
|
# Status: Burst-No: 2 Write Address: 003b42a8 WriteData: e70a62ce
|
|
# tb_core.u_sdram32 : at time 52617.0 ns WRITE: Bank = 0 Row = 948, Col = 173, Data = eb40e6d6
|
|
# Status: Burst-No: 3 Write Address: 003b42a8 WriteData: eb40e6d6
|
|
# tb_core.u_sdram32 : at time 52627.0 ns WRITE: Bank = 0 Row = 948, Col = 174, Data = 92c27025
|
|
# Status: Burst-No: 4 Write Address: 003b42a8 WriteData: 92c27025
|
|
# tb_core.u_sdram32 : at time 52637.0 ns WRITE: Bank = 0 Row = 948, Col = 175, Data = d4ce0aa9
|
|
# Status: Burst-No: 5 Write Address: 003b42a8 WriteData: d4ce0aa9
|
|
# tb_core.u_sdram32 : at time 52647.0 ns WRITE: Bank = 0 Row = 948, Col = 176, Data = e7b374cf
|
|
# Status: Burst-No: 6 Write Address: 003b42a8 WriteData: e7b374cf
|
|
# tb_core.u_sdram32 : at time 52657.0 ns WRITE: Bank = 0 Row = 948, Col = 177, Data = 1a9af535
|
|
# Status: Burst-No: 7 Write Address: 003b42a8 WriteData: 1a9af535
|
|
# tb_core.u_sdram32 : at time 52667.0 ns WRITE: Bank = 0 Row = 948, Col = 178, Data = 2047dd40
|
|
# Status: Burst-No: 8 Write Address: 003b42a8 WriteData: 2047dd40
|
|
# tb_core.u_sdram32 : at time 52677.0 ns WRITE: Bank = 0 Row = 948, Col = 179, Data = 5b0c73b6
|
|
# Status: Burst-No: 9 Write Address: 003b42a8 WriteData: 5b0c73b6
|
|
# tb_core.u_sdram32 : at time 52687.0 ns WRITE: Bank = 0 Row = 948, Col = 180, Data = faf084f5
|
|
# Status: Burst-No: 10 Write Address: 003b42a8 WriteData: faf084f5
|
|
# tb_core.u_sdram32 : at time 52697.0 ns WRITE: Bank = 0 Row = 948, Col = 181, Data = ad27c45a
|
|
# Status: Burst-No: 11 Write Address: 003b42a8 WriteData: ad27c45a
|
|
# tb_core.u_sdram32 : at time 52707.0 ns WRITE: Bank = 0 Row = 948, Col = 182, Data = 70ed97e1
|
|
# Status: Burst-No: 12 Write Address: 003b42a8 WriteData: 70ed97e1
|
|
# tb_core.u_sdram32 : at time 52717.0 ns WRITE: Bank = 0 Row = 948, Col = 183, Data = 12ce1125
|
|
# Status: Burst-No: 13 Write Address: 003b42a8 WriteData: 12ce1125
|
|
# tb_core.u_sdram32 : at time 52727.0 ns WRITE: Bank = 0 Row = 948, Col = 184, Data = 93ba6027
|
|
# Status: Burst-No: 14 Write Address: 003b42a8 WriteData: 93ba6027
|
|
# tb_core.u_sdram32 : at time 52737.0 ns WRITE: Bank = 0 Row = 948, Col = 185, Data = 227eb144
|
|
# Status: Burst-No: 15 Write Address: 003b42a8 WriteData: 227eb144
|
|
# tb_core.u_sdram32 : at time 52747.0 ns WRITE: Bank = 0 Row = 948, Col = 186, Data = bc944679
|
|
# Status: Burst-No: 16 Write Address: 003b42a8 WriteData: bc944679
|
|
# tb_core.u_sdram32 : at time 52757.0 ns WRITE: Bank = 0 Row = 948, Col = 187, Data = cfb89e9f
|
|
# Status: Burst-No: 17 Write Address: 003b42a8 WriteData: cfb89e9f
|
|
# tb_core.u_sdram32 : at time 52767.0 ns WRITE: Bank = 0 Row = 948, Col = 188, Data = 545493a8
|
|
# Status: Burst-No: 18 Write Address: 003b42a8 WriteData: 545493a8
|
|
# tb_core.u_sdram32 : at time 52777.0 ns WRITE: Bank = 0 Row = 948, Col = 189, Data = 64d2d3c9
|
|
# Status: Burst-No: 19 Write Address: 003b42a8 WriteData: 64d2d3c9
|
|
# tb_core.u_sdram32 : at time 52787.0 ns WRITE: Bank = 0 Row = 948, Col = 190, Data = 42955d85
|
|
# Status: Burst-No: 20 Write Address: 003b42a8 WriteData: 42955d85
|
|
# tb_core.u_sdram32 : at time 52797.0 ns WRITE: Bank = 0 Row = 948, Col = 191, Data = 42e39d85
|
|
# Status: Burst-No: 21 Write Address: 003b42a8 WriteData: 42e39d85
|
|
# tb_core.u_sdram32 : at time 52807.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 52947.0 ns ACT : Bank = 0 Row = 282
|
|
# tb_core.u_sdram32 : at time 53003.0 ns READ : Bank = 0 Row = 282, Col = 203, Data = 2f36c55e
|
|
# tb_core.u_sdram32 : at time 53013.0 ns READ : Bank = 0 Row = 282, Col = 204, Data = 5a0f27b4
|
|
# READ STATUS: Burst-No: 0 Addr: 0011a32d Rxd: 2f36c55e
|
|
# tb_core.u_sdram32 : at time 53023.0 ns READ : Bank = 0 Row = 282, Col = 205, Data = 073a730e
|
|
# READ STATUS: Burst-No: 1 Addr: 0011a32f Rxd: 5a0f27b4
|
|
# tb_core.u_sdram32 : at time 53033.0 ns READ : Bank = 0 Row = 282, Col = 206, Data = 322cc164
|
|
# READ STATUS: Burst-No: 2 Addr: 0011a331 Rxd: 073a730e
|
|
# tb_core.u_sdram32 : at time 53043.0 ns READ : Bank = 0 Row = 282, Col = 207, Data = 320a8b64
|
|
# READ STATUS: Burst-No: 3 Addr: 0011a333 Rxd: 322cc164
|
|
# tb_core.u_sdram32 : at time 53053.0 ns READ : Bank = 0 Row = 282, Col = 208, Data = 2416b948
|
|
# READ STATUS: Burst-No: 4 Addr: 0011a335 Rxd: 320a8b64
|
|
# tb_core.u_sdram32 : at time 53063.0 ns READ : Bank = 0 Row = 282, Col = 209, Data = c544d88a
|
|
# READ STATUS: Burst-No: 5 Addr: 0011a337 Rxd: 2416b948
|
|
# tb_core.u_sdram32 : at time 53073.0 ns READ : Bank = 0 Row = 282, Col = 210, Data = 4dfe879b
|
|
# READ STATUS: Burst-No: 6 Addr: 0011a339 Rxd: c544d88a
|
|
# tb_core.u_sdram32 : at time 53083.0 ns READ : Bank = 0 Row = 282, Col = 211, Data = e6fbf4cd
|
|
# READ STATUS: Burst-No: 7 Addr: 0011a33b Rxd: 4dfe879b
|
|
# tb_core.u_sdram32 : at time 53093.0 ns READ : Bank = 0 Row = 282, Col = 212, Data = b5f8fa6b
|
|
# READ STATUS: Burst-No: 8 Addr: 0011a33d Rxd: e6fbf4cd
|
|
# tb_core.u_sdram32 : at time 53103.0 ns READ : Bank = 0 Row = 282, Col = 213, Data = 55ff23ab
|
|
# READ STATUS: Burst-No: 9 Addr: 0011a33f Rxd: b5f8fa6b
|
|
# tb_core.u_sdram32 : at time 53113.0 ns READ : Bank = 0 Row = 282, Col = 214, Data = f1eca2e3
|
|
# READ STATUS: Burst-No: 10 Addr: 0011a341 Rxd: 55ff23ab
|
|
# tb_core.u_sdram32 : at time 53123.0 ns READ : Bank = 0 Row = 282, Col = 215, Data = 5e9d2fbd
|
|
# READ STATUS: Burst-No: 11 Addr: 0011a343 Rxd: f1eca2e3
|
|
# tb_core.u_sdram32 : at time 53133.0 ns READ : Bank = 0 Row = 282, Col = 216, Data = ecff24d9
|
|
# READ STATUS: Burst-No: 12 Addr: 0011a345 Rxd: 5e9d2fbd
|
|
# tb_core.u_sdram32 : at time 53143.0 ns READ : Bank = 0 Row = 282, Col = 217, Data = e11a58c2
|
|
# READ STATUS: Burst-No: 13 Addr: 0011a347 Rxd: ecff24d9
|
|
# tb_core.u_sdram32 : at time 53153.0 ns READ : Bank = 0 Row = 282, Col = 218, Data = f059ace0
|
|
# READ STATUS: Burst-No: 14 Addr: 0011a349 Rxd: e11a58c2
|
|
# tb_core.u_sdram32 : at time 53163.0 ns READ : Bank = 0 Row = 282, Col = 219, Data = afd1265f
|
|
# READ STATUS: Burst-No: 15 Addr: 0011a34b Rxd: f059ace0
|
|
# tb_core.u_sdram32 : at time 53173.0 ns READ : Bank = 0 Row = 282, Col = 220, Data = 8edc361d
|
|
# READ STATUS: Burst-No: 16 Addr: 0011a34d Rxd: afd1265f
|
|
# tb_core.u_sdram32 : at time 53183.0 ns READ : Bank = 0 Row = 282, Col = 221, Data = c9b64c93
|
|
# READ STATUS: Burst-No: 17 Addr: 0011a34f Rxd: 8edc361d
|
|
# tb_core.u_sdram32 : at time 53193.0 ns READ : Bank = 0 Row = 282, Col = 222, Data = 13180326
|
|
# READ STATUS: Burst-No: 18 Addr: 0011a351 Rxd: c9b64c93
|
|
# tb_core.u_sdram32 : at time 53203.0 ns READ : Bank = 0 Row = 282, Col = 223, Data = 82b78605
|
|
# READ STATUS: Burst-No: 19 Addr: 0011a353 Rxd: 13180326
|
|
# tb_core.u_sdram32 : at time 53213.0 ns READ : Bank = 0 Row = 282, Col = 224, Data = 84a8e809
|
|
# READ STATUS: Burst-No: 20 Addr: 0011a355 Rxd: 82b78605
|
|
# tb_core.u_sdram32 : at time 53223.0 ns READ : Bank = 0 Row = 282, Col = 225, Data = b62d846c
|
|
# READ STATUS: Burst-No: 21 Addr: 0011a357 Rxd: 84a8e809
|
|
# tb_core.u_sdram32 : at time 53233.0 ns READ : Bank = 0 Row = 282, Col = 226, Data = b5c5c06b
|
|
# READ STATUS: Burst-No: 22 Addr: 0011a359 Rxd: b62d846c
|
|
# tb_core.u_sdram32 : at time 53243.0 ns READ : Bank = 0 Row = 282, Col = 227, Data = 5858bdb0
|
|
# READ STATUS: Burst-No: 23 Addr: 0011a35b Rxd: b5c5c06b
|
|
# tb_core.u_sdram32 : at time 53253.0 ns READ : Bank = 0 Row = 282, Col = 228, Data = fb9fb8f7
|
|
# READ STATUS: Burst-No: 24 Addr: 0011a35d Rxd: 5858bdb0
|
|
# tb_core.u_sdram32 : at time 53263.0 ns READ : Bank = 0 Row = 282, Col = 229, Data = 52a151a5
|
|
# READ STATUS: Burst-No: 25 Addr: 0011a35f Rxd: fb9fb8f7
|
|
# tb_core.u_sdram32 : at time 53273.0 ns READ : Bank = 0 Row = 282, Col = 230, Data = abe8c057
|
|
# READ STATUS: Burst-No: 26 Addr: 0011a361 Rxd: 52a151a5
|
|
# tb_core.u_sdram32 : at time 53283.0 ns READ : Bank = 0 Row = 282, Col = 231, Data = 3b11f376
|
|
# READ STATUS: Burst-No: 27 Addr: 0011a363 Rxd: abe8c057
|
|
# tb_core.u_sdram32 : at time 53293.0 ns READ : Bank = 0 Row = 282, Col = 232, Data = 2798e34f
|
|
# READ STATUS: Burst-No: 28 Addr: 0011a365 Rxd: 3b11f376
|
|
# tb_core.u_sdram32 : at time 53303.0 ns READ : Bank = 0 Row = 282, Col = 233, Data = 5a45bdb4
|
|
# READ STATUS: Burst-No: 29 Addr: 0011a367 Rxd: 2798e34f
|
|
# tb_core.u_sdram32 : at time 53313.0 ns READ : Bank = 0 Row = 282, Col = 234, Data = 8ecaa21d
|
|
# READ STATUS: Burst-No: 30 Addr: 0011a369 Rxd: 5a45bdb4
|
|
# tb_core.u_sdram32 : at time 53323.0 ns READ : Bank = 0 Row = 282, Col = 235, Data = 43c11587
|
|
# READ STATUS: Burst-No: 31 Addr: 0011a36b Rxd: 8ecaa21d
|
|
# tb_core.u_sdram32 : at time 53333.0 ns READ : Bank = 0 Row = 282, Col = 236, Data = 23466346
|
|
# READ STATUS: Burst-No: 32 Addr: 0011a36d Rxd: 43c11587
|
|
# tb_core.u_sdram32 : at time 53343.0 ns READ : Bank = 0 Row = 282, Col = 237, Data = 336d9366
|
|
# READ STATUS: Burst-No: 33 Addr: 0011a36f Rxd: 23466346
|
|
# tb_core.u_sdram32 : at time 53353.0 ns READ : Bank = 0 Row = 282, Col = 238, Data = 4f14c19e
|
|
# READ STATUS: Burst-No: 34 Addr: 0011a371 Rxd: 336d9366
|
|
# tb_core.u_sdram32 : at time 53363.0 ns READ : Bank = 0 Row = 282, Col = 239, Data = 1fb0d13f
|
|
# READ STATUS: Burst-No: 35 Addr: 0011a373 Rxd: 4f14c19e
|
|
# tb_core.u_sdram32 : at time 53373.0 ns READ : Bank = 0 Row = 282, Col = 240, Data = 2a2ff554
|
|
# READ STATUS: Burst-No: 36 Addr: 0011a375 Rxd: 1fb0d13f
|
|
# tb_core.u_sdram32 : at time 53383.0 ns READ : Bank = 0 Row = 282, Col = 241, Data = 2a565f54
|
|
# READ STATUS: Burst-No: 37 Addr: 0011a377 Rxd: 2a2ff554
|
|
# tb_core.u_sdram32 : at time 53393.0 ns READ : Bank = 0 Row = 282, Col = 242, Data = a62c344c
|
|
# READ STATUS: Burst-No: 38 Addr: 0011a379 Rxd: 2a565f54
|
|
# tb_core.u_sdram32 : at time 53403.0 ns READ : Bank = 0 Row = 282, Col = 243, Data = 83449006
|
|
# READ STATUS: Burst-No: 39 Addr: 0011a37b Rxd: a62c344c
|
|
# tb_core.u_sdram32 : at time 53413.0 ns READ : Bank = 0 Row = 282, Col = 244, Data = 286f1350
|
|
# READ STATUS: Burst-No: 40 Addr: 0011a37d Rxd: 83449006
|
|
# tb_core.u_sdram32 : at time 53423.0 ns READ : Bank = 0 Row = 282, Col = 245, Data = 16b46d2d
|
|
# READ STATUS: Burst-No: 41 Addr: 0011a37f Rxd: 286f1350
|
|
# tb_core.u_sdram32 : at time 53433.0 ns READ : Bank = 0 Row = 282, Col = 246, Data = c34ddc86
|
|
# READ STATUS: Burst-No: 42 Addr: 0011a381 Rxd: 16b46d2d
|
|
# tb_core.u_sdram32 : at time 53443.0 ns READ : Bank = 0 Row = 282, Col = 247, Data = 3564836a
|
|
# READ STATUS: Burst-No: 43 Addr: 0011a383 Rxd: c34ddc86
|
|
# tb_core.u_sdram32 : at time 53453.0 ns READ : Bank = 0 Row = 282, Col = 248, Data = 5c2afdb8
|
|
# READ STATUS: Burst-No: 44 Addr: 0011a385 Rxd: 3564836a
|
|
# tb_core.u_sdram32 : at time 53463.0 ns READ : Bank = 0 Row = 282, Col = 249, Data = f7fecaef
|
|
# READ STATUS: Burst-No: 45 Addr: 0011a387 Rxd: 5c2afdb8
|
|
# tb_core.u_sdram32 : at time 53473.0 ns READ : Bank = 0 Row = 282, Col = 250, Data = 506a57a0
|
|
# tb_core.u_sdram32 : at time 53477.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 46 Addr: 0011a389 Rxd: f7fecaef
|
|
# tb_core.u_sdram32 : at time 53483.0 ns READ : Bank = 0 Row = 282, Col = 251, Data = 1fa98f3f
|
|
# READ STATUS: Burst-No: 47 Addr: 0011a38b Rxd: 506a57a0
|
|
# tb_core.u_sdram32 : at time 53493.0 ns READ : Bank = 0 Row = 282, Col = 252, Data = 84d4aa09
|
|
# READ STATUS: Burst-No: 48 Addr: 0011a38d Rxd: 1fa98f3f
|
|
# READ STATUS: Burst-No: 49 Addr: 0011a38f Rxd: 84d4aa09
|
|
# tb_core.u_sdram32 : at time 53667.0 ns ACT : Bank = 0 Row = 948
|
|
# tb_core.u_sdram32 : at time 53723.0 ns READ : Bank = 0 Row = 948, Col = 170, Data = 8f49661e
|
|
# tb_core.u_sdram32 : at time 53733.0 ns READ : Bank = 0 Row = 948, Col = 171, Data = dc22dcb8
|
|
# READ STATUS: Burst-No: 0 Addr: 003b42a8 Rxd: 8f49661e
|
|
# tb_core.u_sdram32 : at time 53743.0 ns READ : Bank = 0 Row = 948, Col = 172, Data = e70a62ce
|
|
# READ STATUS: Burst-No: 1 Addr: 003b42aa Rxd: dc22dcb8
|
|
# tb_core.u_sdram32 : at time 53753.0 ns READ : Bank = 0 Row = 948, Col = 173, Data = eb40e6d6
|
|
# READ STATUS: Burst-No: 2 Addr: 003b42ac Rxd: e70a62ce
|
|
# tb_core.u_sdram32 : at time 53763.0 ns READ : Bank = 0 Row = 948, Col = 174, Data = 92c27025
|
|
# READ STATUS: Burst-No: 3 Addr: 003b42ae Rxd: eb40e6d6
|
|
# tb_core.u_sdram32 : at time 53773.0 ns READ : Bank = 0 Row = 948, Col = 175, Data = d4ce0aa9
|
|
# READ STATUS: Burst-No: 4 Addr: 003b42b0 Rxd: 92c27025
|
|
# tb_core.u_sdram32 : at time 53783.0 ns READ : Bank = 0 Row = 948, Col = 176, Data = e7b374cf
|
|
# READ STATUS: Burst-No: 5 Addr: 003b42b2 Rxd: d4ce0aa9
|
|
# tb_core.u_sdram32 : at time 53793.0 ns READ : Bank = 0 Row = 948, Col = 177, Data = 1a9af535
|
|
# READ STATUS: Burst-No: 6 Addr: 003b42b4 Rxd: e7b374cf
|
|
# tb_core.u_sdram32 : at time 53803.0 ns READ : Bank = 0 Row = 948, Col = 178, Data = 2047dd40
|
|
# READ STATUS: Burst-No: 7 Addr: 003b42b6 Rxd: 1a9af535
|
|
# tb_core.u_sdram32 : at time 53813.0 ns READ : Bank = 0 Row = 948, Col = 179, Data = 5b0c73b6
|
|
# READ STATUS: Burst-No: 8 Addr: 003b42b8 Rxd: 2047dd40
|
|
# tb_core.u_sdram32 : at time 53823.0 ns READ : Bank = 0 Row = 948, Col = 180, Data = faf084f5
|
|
# READ STATUS: Burst-No: 9 Addr: 003b42ba Rxd: 5b0c73b6
|
|
# tb_core.u_sdram32 : at time 53833.0 ns READ : Bank = 0 Row = 948, Col = 181, Data = ad27c45a
|
|
# READ STATUS: Burst-No: 10 Addr: 003b42bc Rxd: faf084f5
|
|
# tb_core.u_sdram32 : at time 53843.0 ns READ : Bank = 0 Row = 948, Col = 182, Data = 70ed97e1
|
|
# READ STATUS: Burst-No: 11 Addr: 003b42be Rxd: ad27c45a
|
|
# tb_core.u_sdram32 : at time 53853.0 ns READ : Bank = 0 Row = 948, Col = 183, Data = 12ce1125
|
|
# READ STATUS: Burst-No: 12 Addr: 003b42c0 Rxd: 70ed97e1
|
|
# tb_core.u_sdram32 : at time 53863.0 ns READ : Bank = 0 Row = 948, Col = 184, Data = 93ba6027
|
|
# READ STATUS: Burst-No: 13 Addr: 003b42c2 Rxd: 12ce1125
|
|
# tb_core.u_sdram32 : at time 53873.0 ns READ : Bank = 0 Row = 948, Col = 185, Data = 227eb144
|
|
# READ STATUS: Burst-No: 14 Addr: 003b42c4 Rxd: 93ba6027
|
|
# tb_core.u_sdram32 : at time 53883.0 ns READ : Bank = 0 Row = 948, Col = 186, Data = bc944679
|
|
# READ STATUS: Burst-No: 15 Addr: 003b42c6 Rxd: 227eb144
|
|
# tb_core.u_sdram32 : at time 53893.0 ns READ : Bank = 0 Row = 948, Col = 187, Data = cfb89e9f
|
|
# READ STATUS: Burst-No: 16 Addr: 003b42c8 Rxd: bc944679
|
|
# tb_core.u_sdram32 : at time 53903.0 ns READ : Bank = 0 Row = 948, Col = 188, Data = 545493a8
|
|
# READ STATUS: Burst-No: 17 Addr: 003b42ca Rxd: cfb89e9f
|
|
# tb_core.u_sdram32 : at time 53913.0 ns READ : Bank = 0 Row = 948, Col = 189, Data = 64d2d3c9
|
|
# tb_core.u_sdram32 : at time 53917.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 18 Addr: 003b42cc Rxd: 545493a8
|
|
# tb_core.u_sdram32 : at time 53923.0 ns READ : Bank = 0 Row = 948, Col = 190, Data = 42955d85
|
|
# READ STATUS: Burst-No: 19 Addr: 003b42ce Rxd: 64d2d3c9
|
|
# tb_core.u_sdram32 : at time 53933.0 ns READ : Bank = 0 Row = 948, Col = 191, Data = 42e39d85
|
|
# READ STATUS: Burst-No: 20 Addr: 003b42d0 Rxd: 42955d85
|
|
# READ STATUS: Burst-No: 21 Addr: 003b42d2 Rxd: 42e39d85
|
|
# Write Address: 00196873, Burst Size: 9
|
|
# tb_core.u_sdram32 : at time 54107.0 ns ACT : Bank = 2 Row = 406
|
|
# tb_core.u_sdram32 : at time 54137.0 ns WRITE: Bank = 2 Row = 406, Col = 28, Data = 4b2f0596
|
|
# Status: Burst-No: 0 Write Address: 00196873 WriteData: 4b2f0596
|
|
# tb_core.u_sdram32 : at time 54147.0 ns WRITE: Bank = 2 Row = 406, Col = 29, Data = 9a544234
|
|
# Status: Burst-No: 1 Write Address: 00196873 WriteData: 9a544234
|
|
# tb_core.u_sdram32 : at time 54157.0 ns WRITE: Bank = 2 Row = 406, Col = 30, Data = 1e85ed3d
|
|
# Status: Burst-No: 2 Write Address: 00196873 WriteData: 1e85ed3d
|
|
# tb_core.u_sdram32 : at time 54167.0 ns WRITE: Bank = 2 Row = 406, Col = 31, Data = 28b1f151
|
|
# Status: Burst-No: 3 Write Address: 00196873 WriteData: 28b1f151
|
|
# tb_core.u_sdram32 : at time 54177.0 ns WRITE: Bank = 2 Row = 406, Col = 32, Data = 8db0281b
|
|
# Status: Burst-No: 4 Write Address: 00196873 WriteData: 8db0281b
|
|
# tb_core.u_sdram32 : at time 54187.0 ns WRITE: Bank = 2 Row = 406, Col = 33, Data = 8e39901c
|
|
# Status: Burst-No: 5 Write Address: 00196873 WriteData: 8e39901c
|
|
# tb_core.u_sdram32 : at time 54197.0 ns WRITE: Bank = 2 Row = 406, Col = 34, Data = 5ec5ebbd
|
|
# Status: Burst-No: 6 Write Address: 00196873 WriteData: 5ec5ebbd
|
|
# tb_core.u_sdram32 : at time 54207.0 ns WRITE: Bank = 2 Row = 406, Col = 35, Data = da69e2b4
|
|
# Status: Burst-No: 7 Write Address: 00196873 WriteData: da69e2b4
|
|
# tb_core.u_sdram32 : at time 54217.0 ns WRITE: Bank = 2 Row = 406, Col = 36, Data = 2764754e
|
|
# Status: Burst-No: 8 Write Address: 00196873 WriteData: 2764754e
|
|
# tb_core.u_sdram32 : at time 54227.0 ns BST : Burst Terminate
|
|
# Write Address: 00283f2f, Burst Size: 26
|
|
# tb_core.u_sdram32 : at time 54367.0 ns ACT : Bank = 3 Row = 643
|
|
# tb_core.u_sdram32 : at time 54397.0 ns WRITE: Bank = 3 Row = 643, Col = 203, Data = f670fcec
|
|
# Status: Burst-No: 0 Write Address: 00283f2f WriteData: f670fcec
|
|
# tb_core.u_sdram32 : at time 54407.0 ns WRITE: Bank = 3 Row = 643, Col = 204, Data = 0f40551e
|
|
# Status: Burst-No: 1 Write Address: 00283f2f WriteData: 0f40551e
|
|
# tb_core.u_sdram32 : at time 54417.0 ns WRITE: Bank = 3 Row = 643, Col = 205, Data = ce96ca9d
|
|
# Status: Burst-No: 2 Write Address: 00283f2f WriteData: ce96ca9d
|
|
# tb_core.u_sdram32 : at time 54427.0 ns WRITE: Bank = 3 Row = 643, Col = 206, Data = e02148c0
|
|
# Status: Burst-No: 3 Write Address: 00283f2f WriteData: e02148c0
|
|
# tb_core.u_sdram32 : at time 54437.0 ns WRITE: Bank = 3 Row = 643, Col = 207, Data = 71a919e3
|
|
# Status: Burst-No: 4 Write Address: 00283f2f WriteData: 71a919e3
|
|
# tb_core.u_sdram32 : at time 54447.0 ns WRITE: Bank = 3 Row = 643, Col = 208, Data = b24cf664
|
|
# Status: Burst-No: 5 Write Address: 00283f2f WriteData: b24cf664
|
|
# tb_core.u_sdram32 : at time 54457.0 ns WRITE: Bank = 3 Row = 643, Col = 209, Data = a5d9704b
|
|
# Status: Burst-No: 6 Write Address: 00283f2f WriteData: a5d9704b
|
|
# tb_core.u_sdram32 : at time 54467.0 ns WRITE: Bank = 3 Row = 643, Col = 210, Data = 48e9ff91
|
|
# Status: Burst-No: 7 Write Address: 00283f2f WriteData: 48e9ff91
|
|
# tb_core.u_sdram32 : at time 54477.0 ns WRITE: Bank = 3 Row = 643, Col = 211, Data = 4277d784
|
|
# Status: Burst-No: 8 Write Address: 00283f2f WriteData: 4277d784
|
|
# tb_core.u_sdram32 : at time 54487.0 ns WRITE: Bank = 3 Row = 643, Col = 212, Data = 24d44749
|
|
# Status: Burst-No: 9 Write Address: 00283f2f WriteData: 24d44749
|
|
# tb_core.u_sdram32 : at time 54497.0 ns WRITE: Bank = 3 Row = 643, Col = 213, Data = 89de2c13
|
|
# Status: Burst-No: 10 Write Address: 00283f2f WriteData: 89de2c13
|
|
# tb_core.u_sdram32 : at time 54507.0 ns WRITE: Bank = 3 Row = 643, Col = 214, Data = d9f8e0b3
|
|
# Status: Burst-No: 11 Write Address: 00283f2f WriteData: d9f8e0b3
|
|
# tb_core.u_sdram32 : at time 54517.0 ns WRITE: Bank = 3 Row = 643, Col = 215, Data = 0e62911c
|
|
# Status: Burst-No: 12 Write Address: 00283f2f WriteData: 0e62911c
|
|
# tb_core.u_sdram32 : at time 54527.0 ns WRITE: Bank = 3 Row = 643, Col = 216, Data = 144ced28
|
|
# Status: Burst-No: 13 Write Address: 00283f2f WriteData: 144ced28
|
|
# tb_core.u_sdram32 : at time 54537.0 ns WRITE: Bank = 3 Row = 643, Col = 217, Data = 1568bb2a
|
|
# Status: Burst-No: 14 Write Address: 00283f2f WriteData: 1568bb2a
|
|
# tb_core.u_sdram32 : at time 54547.0 ns WRITE: Bank = 3 Row = 643, Col = 218, Data = 2e97795d
|
|
# Status: Burst-No: 15 Write Address: 00283f2f WriteData: 2e97795d
|
|
# tb_core.u_sdram32 : at time 54557.0 ns WRITE: Bank = 3 Row = 643, Col = 219, Data = 776a61ee
|
|
# Status: Burst-No: 16 Write Address: 00283f2f WriteData: 776a61ee
|
|
# tb_core.u_sdram32 : at time 54567.0 ns WRITE: Bank = 3 Row = 643, Col = 220, Data = 66065bcc
|
|
# Status: Burst-No: 17 Write Address: 00283f2f WriteData: 66065bcc
|
|
# tb_core.u_sdram32 : at time 54577.0 ns WRITE: Bank = 3 Row = 643, Col = 221, Data = 5d8e95bb
|
|
# Status: Burst-No: 18 Write Address: 00283f2f WriteData: 5d8e95bb
|
|
# tb_core.u_sdram32 : at time 54587.0 ns WRITE: Bank = 3 Row = 643, Col = 222, Data = bc461478
|
|
# Status: Burst-No: 19 Write Address: 00283f2f WriteData: bc461478
|
|
# tb_core.u_sdram32 : at time 54597.0 ns WRITE: Bank = 3 Row = 643, Col = 223, Data = 652825ca
|
|
# Status: Burst-No: 20 Write Address: 00283f2f WriteData: 652825ca
|
|
# tb_core.u_sdram32 : at time 54607.0 ns WRITE: Bank = 3 Row = 643, Col = 224, Data = 2e94b75d
|
|
# Status: Burst-No: 21 Write Address: 00283f2f WriteData: 2e94b75d
|
|
# tb_core.u_sdram32 : at time 54617.0 ns WRITE: Bank = 3 Row = 643, Col = 225, Data = 8f32fa1e
|
|
# Status: Burst-No: 22 Write Address: 00283f2f WriteData: 8f32fa1e
|
|
# tb_core.u_sdram32 : at time 54627.0 ns WRITE: Bank = 3 Row = 643, Col = 226, Data = 3b07bd76
|
|
# Status: Burst-No: 23 Write Address: 00283f2f WriteData: 3b07bd76
|
|
# tb_core.u_sdram32 : at time 54637.0 ns WRITE: Bank = 3 Row = 643, Col = 227, Data = 65a879cb
|
|
# Status: Burst-No: 24 Write Address: 00283f2f WriteData: 65a879cb
|
|
# tb_core.u_sdram32 : at time 54647.0 ns WRITE: Bank = 3 Row = 643, Col = 228, Data = 6dfcf1db
|
|
# Status: Burst-No: 25 Write Address: 00283f2f WriteData: 6dfcf1db
|
|
# tb_core.u_sdram32 : at time 54657.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 54793.0 ns READ : Bank = 2 Row = 406, Col = 28, Data = 4b2f0596
|
|
# tb_core.u_sdram32 : at time 54803.0 ns READ : Bank = 2 Row = 406, Col = 29, Data = 9a544234
|
|
# READ STATUS: Burst-No: 0 Addr: 00196873 Rxd: 4b2f0596
|
|
# tb_core.u_sdram32 : at time 54813.0 ns READ : Bank = 2 Row = 406, Col = 30, Data = 1e85ed3d
|
|
# READ STATUS: Burst-No: 1 Addr: 00196875 Rxd: 9a544234
|
|
# tb_core.u_sdram32 : at time 54823.0 ns READ : Bank = 2 Row = 406, Col = 31, Data = 28b1f151
|
|
# READ STATUS: Burst-No: 2 Addr: 00196877 Rxd: 1e85ed3d
|
|
# tb_core.u_sdram32 : at time 54833.0 ns READ : Bank = 2 Row = 406, Col = 32, Data = 8db0281b
|
|
# READ STATUS: Burst-No: 3 Addr: 00196879 Rxd: 28b1f151
|
|
# tb_core.u_sdram32 : at time 54843.0 ns READ : Bank = 2 Row = 406, Col = 33, Data = 8e39901c
|
|
# READ STATUS: Burst-No: 4 Addr: 0019687b Rxd: 8db0281b
|
|
# tb_core.u_sdram32 : at time 54853.0 ns READ : Bank = 2 Row = 406, Col = 34, Data = 5ec5ebbd
|
|
# tb_core.u_sdram32 : at time 54857.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 5 Addr: 0019687d Rxd: 8e39901c
|
|
# tb_core.u_sdram32 : at time 54863.0 ns READ : Bank = 2 Row = 406, Col = 35, Data = da69e2b4
|
|
# READ STATUS: Burst-No: 6 Addr: 0019687f Rxd: 5ec5ebbd
|
|
# tb_core.u_sdram32 : at time 54873.0 ns READ : Bank = 2 Row = 406, Col = 36, Data = 2764754e
|
|
# READ STATUS: Burst-No: 7 Addr: 00196881 Rxd: da69e2b4
|
|
# READ STATUS: Burst-No: 8 Addr: 00196883 Rxd: 2764754e
|
|
# tb_core.u_sdram32 : at time 55043.0 ns READ : Bank = 3 Row = 643, Col = 203, Data = f670fcec
|
|
# tb_core.u_sdram32 : at time 55053.0 ns READ : Bank = 3 Row = 643, Col = 204, Data = 0f40551e
|
|
# READ STATUS: Burst-No: 0 Addr: 00283f2f Rxd: f670fcec
|
|
# tb_core.u_sdram32 : at time 55063.0 ns READ : Bank = 3 Row = 643, Col = 205, Data = ce96ca9d
|
|
# READ STATUS: Burst-No: 1 Addr: 00283f31 Rxd: 0f40551e
|
|
# tb_core.u_sdram32 : at time 55073.0 ns READ : Bank = 3 Row = 643, Col = 206, Data = e02148c0
|
|
# READ STATUS: Burst-No: 2 Addr: 00283f33 Rxd: ce96ca9d
|
|
# tb_core.u_sdram32 : at time 55083.0 ns READ : Bank = 3 Row = 643, Col = 207, Data = 71a919e3
|
|
# READ STATUS: Burst-No: 3 Addr: 00283f35 Rxd: e02148c0
|
|
# tb_core.u_sdram32 : at time 55093.0 ns READ : Bank = 3 Row = 643, Col = 208, Data = b24cf664
|
|
# READ STATUS: Burst-No: 4 Addr: 00283f37 Rxd: 71a919e3
|
|
# tb_core.u_sdram32 : at time 55103.0 ns READ : Bank = 3 Row = 643, Col = 209, Data = a5d9704b
|
|
# READ STATUS: Burst-No: 5 Addr: 00283f39 Rxd: b24cf664
|
|
# tb_core.u_sdram32 : at time 55113.0 ns READ : Bank = 3 Row = 643, Col = 210, Data = 48e9ff91
|
|
# READ STATUS: Burst-No: 6 Addr: 00283f3b Rxd: a5d9704b
|
|
# tb_core.u_sdram32 : at time 55123.0 ns READ : Bank = 3 Row = 643, Col = 211, Data = 4277d784
|
|
# READ STATUS: Burst-No: 7 Addr: 00283f3d Rxd: 48e9ff91
|
|
# tb_core.u_sdram32 : at time 55133.0 ns READ : Bank = 3 Row = 643, Col = 212, Data = 24d44749
|
|
# READ STATUS: Burst-No: 8 Addr: 00283f3f Rxd: 4277d784
|
|
# tb_core.u_sdram32 : at time 55143.0 ns READ : Bank = 3 Row = 643, Col = 213, Data = 89de2c13
|
|
# READ STATUS: Burst-No: 9 Addr: 00283f41 Rxd: 24d44749
|
|
# tb_core.u_sdram32 : at time 55153.0 ns READ : Bank = 3 Row = 643, Col = 214, Data = d9f8e0b3
|
|
# READ STATUS: Burst-No: 10 Addr: 00283f43 Rxd: 89de2c13
|
|
# tb_core.u_sdram32 : at time 55163.0 ns READ : Bank = 3 Row = 643, Col = 215, Data = 0e62911c
|
|
# READ STATUS: Burst-No: 11 Addr: 00283f45 Rxd: d9f8e0b3
|
|
# tb_core.u_sdram32 : at time 55173.0 ns READ : Bank = 3 Row = 643, Col = 216, Data = 144ced28
|
|
# READ STATUS: Burst-No: 12 Addr: 00283f47 Rxd: 0e62911c
|
|
# tb_core.u_sdram32 : at time 55183.0 ns READ : Bank = 3 Row = 643, Col = 217, Data = 1568bb2a
|
|
# READ STATUS: Burst-No: 13 Addr: 00283f49 Rxd: 144ced28
|
|
# tb_core.u_sdram32 : at time 55193.0 ns READ : Bank = 3 Row = 643, Col = 218, Data = 2e97795d
|
|
# READ STATUS: Burst-No: 14 Addr: 00283f4b Rxd: 1568bb2a
|
|
# tb_core.u_sdram32 : at time 55203.0 ns READ : Bank = 3 Row = 643, Col = 219, Data = 776a61ee
|
|
# READ STATUS: Burst-No: 15 Addr: 00283f4d Rxd: 2e97795d
|
|
# tb_core.u_sdram32 : at time 55213.0 ns READ : Bank = 3 Row = 643, Col = 220, Data = 66065bcc
|
|
# READ STATUS: Burst-No: 16 Addr: 00283f4f Rxd: 776a61ee
|
|
# tb_core.u_sdram32 : at time 55223.0 ns READ : Bank = 3 Row = 643, Col = 221, Data = 5d8e95bb
|
|
# READ STATUS: Burst-No: 17 Addr: 00283f51 Rxd: 66065bcc
|
|
# tb_core.u_sdram32 : at time 55233.0 ns READ : Bank = 3 Row = 643, Col = 222, Data = bc461478
|
|
# READ STATUS: Burst-No: 18 Addr: 00283f53 Rxd: 5d8e95bb
|
|
# tb_core.u_sdram32 : at time 55243.0 ns READ : Bank = 3 Row = 643, Col = 223, Data = 652825ca
|
|
# READ STATUS: Burst-No: 19 Addr: 00283f55 Rxd: bc461478
|
|
# tb_core.u_sdram32 : at time 55253.0 ns READ : Bank = 3 Row = 643, Col = 224, Data = 2e94b75d
|
|
# READ STATUS: Burst-No: 20 Addr: 00283f57 Rxd: 652825ca
|
|
# tb_core.u_sdram32 : at time 55263.0 ns READ : Bank = 3 Row = 643, Col = 225, Data = 8f32fa1e
|
|
# READ STATUS: Burst-No: 21 Addr: 00283f59 Rxd: 2e94b75d
|
|
# tb_core.u_sdram32 : at time 55273.0 ns READ : Bank = 3 Row = 643, Col = 226, Data = 3b07bd76
|
|
# tb_core.u_sdram32 : at time 55277.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 22 Addr: 00283f5b Rxd: 8f32fa1e
|
|
# tb_core.u_sdram32 : at time 55283.0 ns READ : Bank = 3 Row = 643, Col = 227, Data = 65a879cb
|
|
# READ STATUS: Burst-No: 23 Addr: 00283f5d Rxd: 3b07bd76
|
|
# tb_core.u_sdram32 : at time 55293.0 ns READ : Bank = 3 Row = 643, Col = 228, Data = 6dfcf1db
|
|
# READ STATUS: Burst-No: 24 Addr: 00283f5f Rxd: 65a879cb
|
|
# READ STATUS: Burst-No: 25 Addr: 00283f61 Rxd: 6dfcf1db
|
|
# Write Address: 0002e4b4, Burst Size: 33
|
|
# tb_core.u_sdram32 : at time 55467.0 ns ACT : Bank = 1 Row = 46
|
|
# tb_core.u_sdram32 : at time 55497.0 ns WRITE: Bank = 1 Row = 46, Col = 45, Data = 0207bb04
|
|
# Status: Burst-No: 0 Write Address: 0002e4b4 WriteData: 0207bb04
|
|
# tb_core.u_sdram32 : at time 55507.0 ns WRITE: Bank = 1 Row = 46, Col = 46, Data = bca0b279
|
|
# Status: Burst-No: 1 Write Address: 0002e4b4 WriteData: bca0b279
|
|
# tb_core.u_sdram32 : at time 55517.0 ns WRITE: Bank = 1 Row = 46, Col = 47, Data = e6b110cd
|
|
# Status: Burst-No: 2 Write Address: 0002e4b4 WriteData: e6b110cd
|
|
# tb_core.u_sdram32 : at time 55527.0 ns WRITE: Bank = 1 Row = 46, Col = 48, Data = c9662c92
|
|
# Status: Burst-No: 3 Write Address: 0002e4b4 WriteData: c9662c92
|
|
# tb_core.u_sdram32 : at time 55537.0 ns WRITE: Bank = 1 Row = 46, Col = 49, Data = a2ce0045
|
|
# Status: Burst-No: 4 Write Address: 0002e4b4 WriteData: a2ce0045
|
|
# tb_core.u_sdram32 : at time 55547.0 ns WRITE: Bank = 1 Row = 46, Col = 50, Data = d4ea6aa9
|
|
# Status: Burst-No: 5 Write Address: 0002e4b4 WriteData: d4ea6aa9
|
|
# tb_core.u_sdram32 : at time 55557.0 ns WRITE: Bank = 1 Row = 46, Col = 51, Data = cf31fc9e
|
|
# Status: Burst-No: 6 Write Address: 0002e4b4 WriteData: cf31fc9e
|
|
# tb_core.u_sdram32 : at time 55567.0 ns WRITE: Bank = 1 Row = 46, Col = 52, Data = 6ec2cbdd
|
|
# Status: Burst-No: 7 Write Address: 0002e4b4 WriteData: 6ec2cbdd
|
|
# tb_core.u_sdram32 : at time 55577.0 ns WRITE: Bank = 1 Row = 46, Col = 53, Data = 600b2dc0
|
|
# Status: Burst-No: 8 Write Address: 0002e4b4 WriteData: 600b2dc0
|
|
# tb_core.u_sdram32 : at time 55587.0 ns WRITE: Bank = 1 Row = 46, Col = 54, Data = a5b9424b
|
|
# Status: Burst-No: 9 Write Address: 0002e4b4 WriteData: a5b9424b
|
|
# tb_core.u_sdram32 : at time 55597.0 ns WRITE: Bank = 1 Row = 46, Col = 55, Data = 5db7e1bb
|
|
# Status: Burst-No: 10 Write Address: 0002e4b4 WriteData: 5db7e1bb
|
|
# tb_core.u_sdram32 : at time 55607.0 ns WRITE: Bank = 1 Row = 46, Col = 56, Data = 408a2981
|
|
# Status: Burst-No: 11 Write Address: 0002e4b4 WriteData: 408a2981
|
|
# tb_core.u_sdram32 : at time 55617.0 ns WRITE: Bank = 1 Row = 46, Col = 57, Data = d932d8b2
|
|
# Status: Burst-No: 12 Write Address: 0002e4b4 WriteData: d932d8b2
|
|
# tb_core.u_sdram32 : at time 55627.0 ns WRITE: Bank = 1 Row = 46, Col = 58, Data = 598d27b3
|
|
# Status: Burst-No: 13 Write Address: 0002e4b4 WriteData: 598d27b3
|
|
# tb_core.u_sdram32 : at time 55637.0 ns WRITE: Bank = 1 Row = 46, Col = 59, Data = 05aeb90b
|
|
# Status: Burst-No: 14 Write Address: 0002e4b4 WriteData: 05aeb90b
|
|
# tb_core.u_sdram32 : at time 55647.0 ns WRITE: Bank = 1 Row = 46, Col = 60, Data = 24011148
|
|
# Status: Burst-No: 15 Write Address: 0002e4b4 WriteData: 24011148
|
|
# tb_core.u_sdram32 : at time 55657.0 ns WRITE: Bank = 1 Row = 46, Col = 61, Data = f0b860e1
|
|
# Status: Burst-No: 16 Write Address: 0002e4b4 WriteData: f0b860e1
|
|
# tb_core.u_sdram32 : at time 55667.0 ns WRITE: Bank = 1 Row = 46, Col = 62, Data = 7e72c5fc
|
|
# Status: Burst-No: 17 Write Address: 0002e4b4 WriteData: 7e72c5fc
|
|
# tb_core.u_sdram32 : at time 55677.0 ns WRITE: Bank = 1 Row = 46, Col = 63, Data = d7f844af
|
|
# Status: Burst-No: 18 Write Address: 0002e4b4 WriteData: d7f844af
|
|
# tb_core.u_sdram32 : at time 55687.0 ns WRITE: Bank = 1 Row = 46, Col = 64, Data = d0770ea0
|
|
# Status: Burst-No: 19 Write Address: 0002e4b4 WriteData: d0770ea0
|
|
# tb_core.u_sdram32 : at time 55697.0 ns WRITE: Bank = 1 Row = 46, Col = 65, Data = 076adf0e
|
|
# Status: Burst-No: 20 Write Address: 0002e4b4 WriteData: 076adf0e
|
|
# tb_core.u_sdram32 : at time 55707.0 ns WRITE: Bank = 1 Row = 46, Col = 66, Data = 3aaf8775
|
|
# Status: Burst-No: 21 Write Address: 0002e4b4 WriteData: 3aaf8775
|
|
# tb_core.u_sdram32 : at time 55717.0 ns WRITE: Bank = 1 Row = 46, Col = 67, Data = 6ca7ffd9
|
|
# Status: Burst-No: 22 Write Address: 0002e4b4 WriteData: 6ca7ffd9
|
|
# tb_core.u_sdram32 : at time 55727.0 ns WRITE: Bank = 1 Row = 46, Col = 68, Data = 86d26e0d
|
|
# Status: Burst-No: 23 Write Address: 0002e4b4 WriteData: 86d26e0d
|
|
# tb_core.u_sdram32 : at time 55737.0 ns WRITE: Bank = 1 Row = 46, Col = 69, Data = 13913127
|
|
# Status: Burst-No: 24 Write Address: 0002e4b4 WriteData: 13913127
|
|
# tb_core.u_sdram32 : at time 55747.0 ns WRITE: Bank = 1 Row = 46, Col = 70, Data = 3a2d9974
|
|
# Status: Burst-No: 25 Write Address: 0002e4b4 WriteData: 3a2d9974
|
|
# tb_core.u_sdram32 : at time 55757.0 ns WRITE: Bank = 1 Row = 46, Col = 71, Data = 7e7f21fc
|
|
# Status: Burst-No: 26 Write Address: 0002e4b4 WriteData: 7e7f21fc
|
|
# tb_core.u_sdram32 : at time 55767.0 ns WRITE: Bank = 1 Row = 46, Col = 72, Data = dfdc3ebf
|
|
# Status: Burst-No: 27 Write Address: 0002e4b4 WriteData: dfdc3ebf
|
|
# tb_core.u_sdram32 : at time 55777.0 ns WRITE: Bank = 1 Row = 46, Col = 73, Data = afc5f25f
|
|
# Status: Burst-No: 28 Write Address: 0002e4b4 WriteData: afc5f25f
|
|
# tb_core.u_sdram32 : at time 55787.0 ns WRITE: Bank = 1 Row = 46, Col = 74, Data = c0a7e881
|
|
# Status: Burst-No: 29 Write Address: 0002e4b4 WriteData: c0a7e881
|
|
# tb_core.u_sdram32 : at time 55797.0 ns WRITE: Bank = 1 Row = 46, Col = 75, Data = b428aa68
|
|
# Status: Burst-No: 30 Write Address: 0002e4b4 WriteData: b428aa68
|
|
# tb_core.u_sdram32 : at time 55807.0 ns WRITE: Bank = 1 Row = 46, Col = 76, Data = fd4c48fa
|
|
# Status: Burst-No: 31 Write Address: 0002e4b4 WriteData: fd4c48fa
|
|
# tb_core.u_sdram32 : at time 55817.0 ns WRITE: Bank = 1 Row = 46, Col = 77, Data = fd9380fb
|
|
# Status: Burst-No: 32 Write Address: 0002e4b4 WriteData: fd9380fb
|
|
# tb_core.u_sdram32 : at time 55827.0 ns BST : Burst Terminate
|
|
# Write Address: 00162119, Burst Size: 39
|
|
# tb_core.u_sdram32 : at time 55967.0 ns ACT : Bank = 0 Row = 354
|
|
# tb_core.u_sdram32 : at time 55997.0 ns WRITE: Bank = 0 Row = 354, Col = 70, Data = 29951b53
|
|
# Status: Burst-No: 0 Write Address: 00162119 WriteData: 29951b53
|
|
# tb_core.u_sdram32 : at time 56007.0 ns WRITE: Bank = 0 Row = 354, Col = 71, Data = f7cff6ef
|
|
# Status: Burst-No: 1 Write Address: 00162119 WriteData: f7cff6ef
|
|
# tb_core.u_sdram32 : at time 56017.0 ns WRITE: Bank = 0 Row = 354, Col = 72, Data = f6d8aeed
|
|
# Status: Burst-No: 2 Write Address: 00162119 WriteData: f6d8aeed
|
|
# tb_core.u_sdram32 : at time 56027.0 ns WRITE: Bank = 0 Row = 354, Col = 73, Data = 58d79db1
|
|
# Status: Burst-No: 3 Write Address: 00162119 WriteData: 58d79db1
|
|
# tb_core.u_sdram32 : at time 56037.0 ns WRITE: Bank = 0 Row = 354, Col = 74, Data = b26ffe64
|
|
# Status: Burst-No: 4 Write Address: 00162119 WriteData: b26ffe64
|
|
# tb_core.u_sdram32 : at time 56047.0 ns WRITE: Bank = 0 Row = 354, Col = 75, Data = 90b93021
|
|
# Status: Burst-No: 5 Write Address: 00162119 WriteData: 90b93021
|
|
# tb_core.u_sdram32 : at time 56057.0 ns WRITE: Bank = 0 Row = 354, Col = 76, Data = 7b24bdf6
|
|
# Status: Burst-No: 6 Write Address: 00162119 WriteData: 7b24bdf6
|
|
# tb_core.u_sdram32 : at time 56067.0 ns WRITE: Bank = 0 Row = 354, Col = 77, Data = 345fbf68
|
|
# Status: Burst-No: 7 Write Address: 00162119 WriteData: 345fbf68
|
|
# tb_core.u_sdram32 : at time 56077.0 ns WRITE: Bank = 0 Row = 354, Col = 78, Data = 8a290014
|
|
# Status: Burst-No: 8 Write Address: 00162119 WriteData: 8a290014
|
|
# tb_core.u_sdram32 : at time 56087.0 ns WRITE: Bank = 0 Row = 354, Col = 79, Data = b7d0ca6f
|
|
# Status: Burst-No: 9 Write Address: 00162119 WriteData: b7d0ca6f
|
|
# tb_core.u_sdram32 : at time 56097.0 ns WRITE: Bank = 0 Row = 354, Col = 80, Data = 9530362a
|
|
# Status: Burst-No: 10 Write Address: 00162119 WriteData: 9530362a
|
|
# tb_core.u_sdram32 : at time 56107.0 ns WRITE: Bank = 0 Row = 354, Col = 81, Data = 1f77b73e
|
|
# Status: Burst-No: 11 Write Address: 00162119 WriteData: 1f77b73e
|
|
# tb_core.u_sdram32 : at time 56117.0 ns WRITE: Bank = 0 Row = 354, Col = 82, Data = fbaaeef7
|
|
# Status: Burst-No: 12 Write Address: 00162119 WriteData: fbaaeef7
|
|
# tb_core.u_sdram32 : at time 56127.0 ns WRITE: Bank = 0 Row = 354, Col = 83, Data = 23781f46
|
|
# Status: Burst-No: 13 Write Address: 00162119 WriteData: 23781f46
|
|
# tb_core.u_sdram32 : at time 56137.0 ns WRITE: Bank = 0 Row = 354, Col = 84, Data = 9e9dca3d
|
|
# Status: Burst-No: 14 Write Address: 00162119 WriteData: 9e9dca3d
|
|
# tb_core.u_sdram32 : at time 56147.0 ns WRITE: Bank = 0 Row = 354, Col = 85, Data = d01f40a0
|
|
# Status: Burst-No: 15 Write Address: 00162119 WriteData: d01f40a0
|
|
# tb_core.u_sdram32 : at time 56157.0 ns WRITE: Bank = 0 Row = 354, Col = 86, Data = 7d4b53fa
|
|
# Status: Burst-No: 16 Write Address: 00162119 WriteData: 7d4b53fa
|
|
# tb_core.u_sdram32 : at time 56167.0 ns WRITE: Bank = 0 Row = 354, Col = 87, Data = 7a4c4df4
|
|
# Status: Burst-No: 17 Write Address: 00162119 WriteData: 7a4c4df4
|
|
# tb_core.u_sdram32 : at time 56177.0 ns WRITE: Bank = 0 Row = 354, Col = 88, Data = 19a8e333
|
|
# Status: Burst-No: 18 Write Address: 00162119 WriteData: 19a8e333
|
|
# tb_core.u_sdram32 : at time 56187.0 ns WRITE: Bank = 0 Row = 354, Col = 89, Data = 0067d700
|
|
# Status: Burst-No: 19 Write Address: 00162119 WriteData: 0067d700
|
|
# tb_core.u_sdram32 : at time 56197.0 ns WRITE: Bank = 0 Row = 354, Col = 90, Data = 6e567bdc
|
|
# Status: Burst-No: 20 Write Address: 00162119 WriteData: 6e567bdc
|
|
# tb_core.u_sdram32 : at time 56207.0 ns WRITE: Bank = 0 Row = 354, Col = 91, Data = 38422d70
|
|
# Status: Burst-No: 21 Write Address: 00162119 WriteData: 38422d70
|
|
# tb_core.u_sdram32 : at time 56217.0 ns WRITE: Bank = 0 Row = 354, Col = 92, Data = 9491aa29
|
|
# Status: Burst-No: 22 Write Address: 00162119 WriteData: 9491aa29
|
|
# tb_core.u_sdram32 : at time 56227.0 ns WRITE: Bank = 0 Row = 354, Col = 93, Data = 07f0b90f
|
|
# Status: Burst-No: 23 Write Address: 00162119 WriteData: 07f0b90f
|
|
# tb_core.u_sdram32 : at time 56237.0 ns WRITE: Bank = 0 Row = 354, Col = 94, Data = 4b5b7196
|
|
# Status: Burst-No: 24 Write Address: 00162119 WriteData: 4b5b7196
|
|
# tb_core.u_sdram32 : at time 56247.0 ns WRITE: Bank = 0 Row = 354, Col = 95, Data = 6b825dd7
|
|
# Status: Burst-No: 25 Write Address: 00162119 WriteData: 6b825dd7
|
|
# tb_core.u_sdram32 : at time 56257.0 ns WRITE: Bank = 0 Row = 354, Col = 96, Data = 11c91123
|
|
# Status: Burst-No: 26 Write Address: 00162119 WriteData: 11c91123
|
|
# tb_core.u_sdram32 : at time 56267.0 ns WRITE: Bank = 0 Row = 354, Col = 97, Data = 8322de06
|
|
# Status: Burst-No: 27 Write Address: 00162119 WriteData: 8322de06
|
|
# tb_core.u_sdram32 : at time 56277.0 ns WRITE: Bank = 0 Row = 354, Col = 98, Data = a538004a
|
|
# Status: Burst-No: 28 Write Address: 00162119 WriteData: a538004a
|
|
# tb_core.u_sdram32 : at time 56287.0 ns WRITE: Bank = 0 Row = 354, Col = 99, Data = 2505394a
|
|
# Status: Burst-No: 29 Write Address: 00162119 WriteData: 2505394a
|
|
# tb_core.u_sdram32 : at time 56297.0 ns WRITE: Bank = 0 Row = 354, Col = 100, Data = 20dcbf41
|
|
# Status: Burst-No: 30 Write Address: 00162119 WriteData: 20dcbf41
|
|
# tb_core.u_sdram32 : at time 56307.0 ns WRITE: Bank = 0 Row = 354, Col = 101, Data = 442d0788
|
|
# Status: Burst-No: 31 Write Address: 00162119 WriteData: 442d0788
|
|
# tb_core.u_sdram32 : at time 56317.0 ns WRITE: Bank = 0 Row = 354, Col = 102, Data = e6e4b8cd
|
|
# Status: Burst-No: 32 Write Address: 00162119 WriteData: e6e4b8cd
|
|
# tb_core.u_sdram32 : at time 56327.0 ns WRITE: Bank = 0 Row = 354, Col = 103, Data = 38eedd71
|
|
# Status: Burst-No: 33 Write Address: 00162119 WriteData: 38eedd71
|
|
# tb_core.u_sdram32 : at time 56337.0 ns WRITE: Bank = 0 Row = 354, Col = 104, Data = 94232228
|
|
# Status: Burst-No: 34 Write Address: 00162119 WriteData: 94232228
|
|
# tb_core.u_sdram32 : at time 56347.0 ns WRITE: Bank = 0 Row = 354, Col = 105, Data = 89bfac13
|
|
# Status: Burst-No: 35 Write Address: 00162119 WriteData: 89bfac13
|
|
# tb_core.u_sdram32 : at time 56357.0 ns WRITE: Bank = 0 Row = 354, Col = 106, Data = b600e26c
|
|
# Status: Burst-No: 36 Write Address: 00162119 WriteData: b600e26c
|
|
# tb_core.u_sdram32 : at time 56367.0 ns WRITE: Bank = 0 Row = 354, Col = 107, Data = aaab2455
|
|
# Status: Burst-No: 37 Write Address: 00162119 WriteData: aaab2455
|
|
# tb_core.u_sdram32 : at time 56377.0 ns WRITE: Bank = 0 Row = 354, Col = 108, Data = 7f2767fe
|
|
# Status: Burst-No: 38 Write Address: 00162119 WriteData: 7f2767fe
|
|
# tb_core.u_sdram32 : at time 56387.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 56437.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 56527.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 56617.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 56707.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 56797.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 56887.0 ns AREF : Auto Refresh
|
|
# tb_core.u_sdram32 : at time 57007.0 ns ACT : Bank = 1 Row = 46
|
|
# tb_core.u_sdram32 : at time 57063.0 ns READ : Bank = 1 Row = 46, Col = 45, Data = 0207bb04
|
|
# tb_core.u_sdram32 : at time 57073.0 ns READ : Bank = 1 Row = 46, Col = 46, Data = bca0b279
|
|
# READ STATUS: Burst-No: 0 Addr: 0002e4b4 Rxd: 0207bb04
|
|
# tb_core.u_sdram32 : at time 57083.0 ns READ : Bank = 1 Row = 46, Col = 47, Data = e6b110cd
|
|
# READ STATUS: Burst-No: 1 Addr: 0002e4b6 Rxd: bca0b279
|
|
# tb_core.u_sdram32 : at time 57093.0 ns READ : Bank = 1 Row = 46, Col = 48, Data = c9662c92
|
|
# READ STATUS: Burst-No: 2 Addr: 0002e4b8 Rxd: e6b110cd
|
|
# tb_core.u_sdram32 : at time 57103.0 ns READ : Bank = 1 Row = 46, Col = 49, Data = a2ce0045
|
|
# READ STATUS: Burst-No: 3 Addr: 0002e4ba Rxd: c9662c92
|
|
# tb_core.u_sdram32 : at time 57113.0 ns READ : Bank = 1 Row = 46, Col = 50, Data = d4ea6aa9
|
|
# READ STATUS: Burst-No: 4 Addr: 0002e4bc Rxd: a2ce0045
|
|
# tb_core.u_sdram32 : at time 57123.0 ns READ : Bank = 1 Row = 46, Col = 51, Data = cf31fc9e
|
|
# READ STATUS: Burst-No: 5 Addr: 0002e4be Rxd: d4ea6aa9
|
|
# tb_core.u_sdram32 : at time 57133.0 ns READ : Bank = 1 Row = 46, Col = 52, Data = 6ec2cbdd
|
|
# READ STATUS: Burst-No: 6 Addr: 0002e4c0 Rxd: cf31fc9e
|
|
# tb_core.u_sdram32 : at time 57143.0 ns READ : Bank = 1 Row = 46, Col = 53, Data = 600b2dc0
|
|
# READ STATUS: Burst-No: 7 Addr: 0002e4c2 Rxd: 6ec2cbdd
|
|
# tb_core.u_sdram32 : at time 57153.0 ns READ : Bank = 1 Row = 46, Col = 54, Data = a5b9424b
|
|
# READ STATUS: Burst-No: 8 Addr: 0002e4c4 Rxd: 600b2dc0
|
|
# tb_core.u_sdram32 : at time 57163.0 ns READ : Bank = 1 Row = 46, Col = 55, Data = 5db7e1bb
|
|
# READ STATUS: Burst-No: 9 Addr: 0002e4c6 Rxd: a5b9424b
|
|
# tb_core.u_sdram32 : at time 57173.0 ns READ : Bank = 1 Row = 46, Col = 56, Data = 408a2981
|
|
# READ STATUS: Burst-No: 10 Addr: 0002e4c8 Rxd: 5db7e1bb
|
|
# tb_core.u_sdram32 : at time 57183.0 ns READ : Bank = 1 Row = 46, Col = 57, Data = d932d8b2
|
|
# READ STATUS: Burst-No: 11 Addr: 0002e4ca Rxd: 408a2981
|
|
# tb_core.u_sdram32 : at time 57193.0 ns READ : Bank = 1 Row = 46, Col = 58, Data = 598d27b3
|
|
# READ STATUS: Burst-No: 12 Addr: 0002e4cc Rxd: d932d8b2
|
|
# tb_core.u_sdram32 : at time 57203.0 ns READ : Bank = 1 Row = 46, Col = 59, Data = 05aeb90b
|
|
# READ STATUS: Burst-No: 13 Addr: 0002e4ce Rxd: 598d27b3
|
|
# tb_core.u_sdram32 : at time 57213.0 ns READ : Bank = 1 Row = 46, Col = 60, Data = 24011148
|
|
# READ STATUS: Burst-No: 14 Addr: 0002e4d0 Rxd: 05aeb90b
|
|
# tb_core.u_sdram32 : at time 57223.0 ns READ : Bank = 1 Row = 46, Col = 61, Data = f0b860e1
|
|
# READ STATUS: Burst-No: 15 Addr: 0002e4d2 Rxd: 24011148
|
|
# tb_core.u_sdram32 : at time 57233.0 ns READ : Bank = 1 Row = 46, Col = 62, Data = 7e72c5fc
|
|
# READ STATUS: Burst-No: 16 Addr: 0002e4d4 Rxd: f0b860e1
|
|
# tb_core.u_sdram32 : at time 57243.0 ns READ : Bank = 1 Row = 46, Col = 63, Data = d7f844af
|
|
# READ STATUS: Burst-No: 17 Addr: 0002e4d6 Rxd: 7e72c5fc
|
|
# tb_core.u_sdram32 : at time 57253.0 ns READ : Bank = 1 Row = 46, Col = 64, Data = d0770ea0
|
|
# READ STATUS: Burst-No: 18 Addr: 0002e4d8 Rxd: d7f844af
|
|
# tb_core.u_sdram32 : at time 57263.0 ns READ : Bank = 1 Row = 46, Col = 65, Data = 076adf0e
|
|
# READ STATUS: Burst-No: 19 Addr: 0002e4da Rxd: d0770ea0
|
|
# tb_core.u_sdram32 : at time 57273.0 ns READ : Bank = 1 Row = 46, Col = 66, Data = 3aaf8775
|
|
# READ STATUS: Burst-No: 20 Addr: 0002e4dc Rxd: 076adf0e
|
|
# tb_core.u_sdram32 : at time 57283.0 ns READ : Bank = 1 Row = 46, Col = 67, Data = 6ca7ffd9
|
|
# READ STATUS: Burst-No: 21 Addr: 0002e4de Rxd: 3aaf8775
|
|
# tb_core.u_sdram32 : at time 57293.0 ns READ : Bank = 1 Row = 46, Col = 68, Data = 86d26e0d
|
|
# READ STATUS: Burst-No: 22 Addr: 0002e4e0 Rxd: 6ca7ffd9
|
|
# tb_core.u_sdram32 : at time 57303.0 ns READ : Bank = 1 Row = 46, Col = 69, Data = 13913127
|
|
# READ STATUS: Burst-No: 23 Addr: 0002e4e2 Rxd: 86d26e0d
|
|
# tb_core.u_sdram32 : at time 57313.0 ns READ : Bank = 1 Row = 46, Col = 70, Data = 3a2d9974
|
|
# READ STATUS: Burst-No: 24 Addr: 0002e4e4 Rxd: 13913127
|
|
# tb_core.u_sdram32 : at time 57323.0 ns READ : Bank = 1 Row = 46, Col = 71, Data = 7e7f21fc
|
|
# READ STATUS: Burst-No: 25 Addr: 0002e4e6 Rxd: 3a2d9974
|
|
# tb_core.u_sdram32 : at time 57333.0 ns READ : Bank = 1 Row = 46, Col = 72, Data = dfdc3ebf
|
|
# READ STATUS: Burst-No: 26 Addr: 0002e4e8 Rxd: 7e7f21fc
|
|
# tb_core.u_sdram32 : at time 57343.0 ns READ : Bank = 1 Row = 46, Col = 73, Data = afc5f25f
|
|
# READ STATUS: Burst-No: 27 Addr: 0002e4ea Rxd: dfdc3ebf
|
|
# tb_core.u_sdram32 : at time 57353.0 ns READ : Bank = 1 Row = 46, Col = 74, Data = c0a7e881
|
|
# READ STATUS: Burst-No: 28 Addr: 0002e4ec Rxd: afc5f25f
|
|
# tb_core.u_sdram32 : at time 57363.0 ns READ : Bank = 1 Row = 46, Col = 75, Data = b428aa68
|
|
# tb_core.u_sdram32 : at time 57367.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 29 Addr: 0002e4ee Rxd: c0a7e881
|
|
# tb_core.u_sdram32 : at time 57373.0 ns READ : Bank = 1 Row = 46, Col = 76, Data = fd4c48fa
|
|
# READ STATUS: Burst-No: 30 Addr: 0002e4f0 Rxd: b428aa68
|
|
# tb_core.u_sdram32 : at time 57383.0 ns READ : Bank = 1 Row = 46, Col = 77, Data = fd9380fb
|
|
# READ STATUS: Burst-No: 31 Addr: 0002e4f2 Rxd: fd4c48fa
|
|
# READ STATUS: Burst-No: 32 Addr: 0002e4f4 Rxd: fd9380fb
|
|
# tb_core.u_sdram32 : at time 57557.0 ns ACT : Bank = 0 Row = 354
|
|
# tb_core.u_sdram32 : at time 57613.0 ns READ : Bank = 0 Row = 354, Col = 70, Data = 29951b53
|
|
# tb_core.u_sdram32 : at time 57623.0 ns READ : Bank = 0 Row = 354, Col = 71, Data = f7cff6ef
|
|
# READ STATUS: Burst-No: 0 Addr: 00162119 Rxd: 29951b53
|
|
# tb_core.u_sdram32 : at time 57633.0 ns READ : Bank = 0 Row = 354, Col = 72, Data = f6d8aeed
|
|
# READ STATUS: Burst-No: 1 Addr: 0016211b Rxd: f7cff6ef
|
|
# tb_core.u_sdram32 : at time 57643.0 ns READ : Bank = 0 Row = 354, Col = 73, Data = 58d79db1
|
|
# READ STATUS: Burst-No: 2 Addr: 0016211d Rxd: f6d8aeed
|
|
# tb_core.u_sdram32 : at time 57653.0 ns READ : Bank = 0 Row = 354, Col = 74, Data = b26ffe64
|
|
# READ STATUS: Burst-No: 3 Addr: 0016211f Rxd: 58d79db1
|
|
# tb_core.u_sdram32 : at time 57663.0 ns READ : Bank = 0 Row = 354, Col = 75, Data = 90b93021
|
|
# READ STATUS: Burst-No: 4 Addr: 00162121 Rxd: b26ffe64
|
|
# tb_core.u_sdram32 : at time 57673.0 ns READ : Bank = 0 Row = 354, Col = 76, Data = 7b24bdf6
|
|
# READ STATUS: Burst-No: 5 Addr: 00162123 Rxd: 90b93021
|
|
# tb_core.u_sdram32 : at time 57683.0 ns READ : Bank = 0 Row = 354, Col = 77, Data = 345fbf68
|
|
# READ STATUS: Burst-No: 6 Addr: 00162125 Rxd: 7b24bdf6
|
|
# tb_core.u_sdram32 : at time 57693.0 ns READ : Bank = 0 Row = 354, Col = 78, Data = 8a290014
|
|
# READ STATUS: Burst-No: 7 Addr: 00162127 Rxd: 345fbf68
|
|
# tb_core.u_sdram32 : at time 57703.0 ns READ : Bank = 0 Row = 354, Col = 79, Data = b7d0ca6f
|
|
# READ STATUS: Burst-No: 8 Addr: 00162129 Rxd: 8a290014
|
|
# tb_core.u_sdram32 : at time 57713.0 ns READ : Bank = 0 Row = 354, Col = 80, Data = 9530362a
|
|
# READ STATUS: Burst-No: 9 Addr: 0016212b Rxd: b7d0ca6f
|
|
# tb_core.u_sdram32 : at time 57723.0 ns READ : Bank = 0 Row = 354, Col = 81, Data = 1f77b73e
|
|
# READ STATUS: Burst-No: 10 Addr: 0016212d Rxd: 9530362a
|
|
# tb_core.u_sdram32 : at time 57733.0 ns READ : Bank = 0 Row = 354, Col = 82, Data = fbaaeef7
|
|
# READ STATUS: Burst-No: 11 Addr: 0016212f Rxd: 1f77b73e
|
|
# tb_core.u_sdram32 : at time 57743.0 ns READ : Bank = 0 Row = 354, Col = 83, Data = 23781f46
|
|
# READ STATUS: Burst-No: 12 Addr: 00162131 Rxd: fbaaeef7
|
|
# tb_core.u_sdram32 : at time 57753.0 ns READ : Bank = 0 Row = 354, Col = 84, Data = 9e9dca3d
|
|
# READ STATUS: Burst-No: 13 Addr: 00162133 Rxd: 23781f46
|
|
# tb_core.u_sdram32 : at time 57763.0 ns READ : Bank = 0 Row = 354, Col = 85, Data = d01f40a0
|
|
# READ STATUS: Burst-No: 14 Addr: 00162135 Rxd: 9e9dca3d
|
|
# tb_core.u_sdram32 : at time 57773.0 ns READ : Bank = 0 Row = 354, Col = 86, Data = 7d4b53fa
|
|
# READ STATUS: Burst-No: 15 Addr: 00162137 Rxd: d01f40a0
|
|
# tb_core.u_sdram32 : at time 57783.0 ns READ : Bank = 0 Row = 354, Col = 87, Data = 7a4c4df4
|
|
# READ STATUS: Burst-No: 16 Addr: 00162139 Rxd: 7d4b53fa
|
|
# tb_core.u_sdram32 : at time 57793.0 ns READ : Bank = 0 Row = 354, Col = 88, Data = 19a8e333
|
|
# READ STATUS: Burst-No: 17 Addr: 0016213b Rxd: 7a4c4df4
|
|
# tb_core.u_sdram32 : at time 57803.0 ns READ : Bank = 0 Row = 354, Col = 89, Data = 0067d700
|
|
# READ STATUS: Burst-No: 18 Addr: 0016213d Rxd: 19a8e333
|
|
# tb_core.u_sdram32 : at time 57813.0 ns READ : Bank = 0 Row = 354, Col = 90, Data = 6e567bdc
|
|
# READ STATUS: Burst-No: 19 Addr: 0016213f Rxd: 0067d700
|
|
# tb_core.u_sdram32 : at time 57823.0 ns READ : Bank = 0 Row = 354, Col = 91, Data = 38422d70
|
|
# READ STATUS: Burst-No: 20 Addr: 00162141 Rxd: 6e567bdc
|
|
# tb_core.u_sdram32 : at time 57833.0 ns READ : Bank = 0 Row = 354, Col = 92, Data = 9491aa29
|
|
# READ STATUS: Burst-No: 21 Addr: 00162143 Rxd: 38422d70
|
|
# tb_core.u_sdram32 : at time 57843.0 ns READ : Bank = 0 Row = 354, Col = 93, Data = 07f0b90f
|
|
# READ STATUS: Burst-No: 22 Addr: 00162145 Rxd: 9491aa29
|
|
# tb_core.u_sdram32 : at time 57853.0 ns READ : Bank = 0 Row = 354, Col = 94, Data = 4b5b7196
|
|
# READ STATUS: Burst-No: 23 Addr: 00162147 Rxd: 07f0b90f
|
|
# tb_core.u_sdram32 : at time 57863.0 ns READ : Bank = 0 Row = 354, Col = 95, Data = 6b825dd7
|
|
# READ STATUS: Burst-No: 24 Addr: 00162149 Rxd: 4b5b7196
|
|
# tb_core.u_sdram32 : at time 57873.0 ns READ : Bank = 0 Row = 354, Col = 96, Data = 11c91123
|
|
# READ STATUS: Burst-No: 25 Addr: 0016214b Rxd: 6b825dd7
|
|
# tb_core.u_sdram32 : at time 57883.0 ns READ : Bank = 0 Row = 354, Col = 97, Data = 8322de06
|
|
# READ STATUS: Burst-No: 26 Addr: 0016214d Rxd: 11c91123
|
|
# tb_core.u_sdram32 : at time 57893.0 ns READ : Bank = 0 Row = 354, Col = 98, Data = a538004a
|
|
# READ STATUS: Burst-No: 27 Addr: 0016214f Rxd: 8322de06
|
|
# tb_core.u_sdram32 : at time 57903.0 ns READ : Bank = 0 Row = 354, Col = 99, Data = 2505394a
|
|
# READ STATUS: Burst-No: 28 Addr: 00162151 Rxd: a538004a
|
|
# tb_core.u_sdram32 : at time 57913.0 ns READ : Bank = 0 Row = 354, Col = 100, Data = 20dcbf41
|
|
# READ STATUS: Burst-No: 29 Addr: 00162153 Rxd: 2505394a
|
|
# tb_core.u_sdram32 : at time 57923.0 ns READ : Bank = 0 Row = 354, Col = 101, Data = 442d0788
|
|
# READ STATUS: Burst-No: 30 Addr: 00162155 Rxd: 20dcbf41
|
|
# tb_core.u_sdram32 : at time 57933.0 ns READ : Bank = 0 Row = 354, Col = 102, Data = e6e4b8cd
|
|
# READ STATUS: Burst-No: 31 Addr: 00162157 Rxd: 442d0788
|
|
# tb_core.u_sdram32 : at time 57943.0 ns READ : Bank = 0 Row = 354, Col = 103, Data = 38eedd71
|
|
# READ STATUS: Burst-No: 32 Addr: 00162159 Rxd: e6e4b8cd
|
|
# tb_core.u_sdram32 : at time 57953.0 ns READ : Bank = 0 Row = 354, Col = 104, Data = 94232228
|
|
# READ STATUS: Burst-No: 33 Addr: 0016215b Rxd: 38eedd71
|
|
# tb_core.u_sdram32 : at time 57963.0 ns READ : Bank = 0 Row = 354, Col = 105, Data = 89bfac13
|
|
# READ STATUS: Burst-No: 34 Addr: 0016215d Rxd: 94232228
|
|
# tb_core.u_sdram32 : at time 57973.0 ns READ : Bank = 0 Row = 354, Col = 106, Data = b600e26c
|
|
# tb_core.u_sdram32 : at time 57977.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 35 Addr: 0016215f Rxd: 89bfac13
|
|
# tb_core.u_sdram32 : at time 57983.0 ns READ : Bank = 0 Row = 354, Col = 107, Data = aaab2455
|
|
# READ STATUS: Burst-No: 36 Addr: 00162161 Rxd: b600e26c
|
|
# tb_core.u_sdram32 : at time 57993.0 ns READ : Bank = 0 Row = 354, Col = 108, Data = 7f2767fe
|
|
# READ STATUS: Burst-No: 37 Addr: 00162163 Rxd: aaab2455
|
|
# READ STATUS: Burst-No: 38 Addr: 00162165 Rxd: 7f2767fe
|
|
# Write Address: 00090d6f, Burst Size: 53
|
|
# tb_core.u_sdram32 : at time 58167.0 ns ACT : Bank = 3 Row = 144
|
|
# tb_core.u_sdram32 : at time 58197.0 ns WRITE: Bank = 3 Row = 144, Col = 91, Data = e0c9acc1
|
|
# Status: Burst-No: 0 Write Address: 00090d6f WriteData: e0c9acc1
|
|
# tb_core.u_sdram32 : at time 58207.0 ns WRITE: Bank = 3 Row = 144, Col = 92, Data = e9d576d3
|
|
# Status: Burst-No: 1 Write Address: 00090d6f WriteData: e9d576d3
|
|
# tb_core.u_sdram32 : at time 58217.0 ns WRITE: Bank = 3 Row = 144, Col = 93, Data = 8c712218
|
|
# Status: Burst-No: 2 Write Address: 00090d6f WriteData: 8c712218
|
|
# tb_core.u_sdram32 : at time 58227.0 ns WRITE: Bank = 3 Row = 144, Col = 94, Data = 56ce7fad
|
|
# Status: Burst-No: 3 Write Address: 00090d6f WriteData: 56ce7fad
|
|
# tb_core.u_sdram32 : at time 58237.0 ns WRITE: Bank = 3 Row = 144, Col = 95, Data = 7c99cff9
|
|
# Status: Burst-No: 4 Write Address: 00090d6f WriteData: 7c99cff9
|
|
# tb_core.u_sdram32 : at time 58247.0 ns WRITE: Bank = 3 Row = 144, Col = 96, Data = 646601c8
|
|
# Status: Burst-No: 5 Write Address: 00090d6f WriteData: 646601c8
|
|
# tb_core.u_sdram32 : at time 58257.0 ns WRITE: Bank = 3 Row = 144, Col = 97, Data = 9295aa25
|
|
# Status: Burst-No: 6 Write Address: 00090d6f WriteData: 9295aa25
|
|
# tb_core.u_sdram32 : at time 58267.0 ns WRITE: Bank = 3 Row = 144, Col = 98, Data = a46c4848
|
|
# Status: Burst-No: 7 Write Address: 00090d6f WriteData: a46c4848
|
|
# tb_core.u_sdram32 : at time 58277.0 ns WRITE: Bank = 3 Row = 144, Col = 99, Data = 7186abe3
|
|
# Status: Burst-No: 8 Write Address: 00090d6f WriteData: 7186abe3
|
|
# tb_core.u_sdram32 : at time 58287.0 ns WRITE: Bank = 3 Row = 144, Col = 100, Data = 680a6fd0
|
|
# Status: Burst-No: 9 Write Address: 00090d6f WriteData: 680a6fd0
|
|
# tb_core.u_sdram32 : at time 58297.0 ns WRITE: Bank = 3 Row = 144, Col = 101, Data = 4506218a
|
|
# Status: Burst-No: 10 Write Address: 00090d6f WriteData: 4506218a
|
|
# tb_core.u_sdram32 : at time 58307.0 ns WRITE: Bank = 3 Row = 144, Col = 102, Data = b3aa3667
|
|
# Status: Burst-No: 11 Write Address: 00090d6f WriteData: b3aa3667
|
|
# tb_core.u_sdram32 : at time 58317.0 ns WRITE: Bank = 3 Row = 144, Col = 103, Data = b8331870
|
|
# Status: Burst-No: 12 Write Address: 00090d6f WriteData: b8331870
|
|
# tb_core.u_sdram32 : at time 58327.0 ns WRITE: Bank = 3 Row = 144, Col = 104, Data = 3058ef60
|
|
# Status: Burst-No: 13 Write Address: 00090d6f WriteData: 3058ef60
|
|
# tb_core.u_sdram32 : at time 58337.0 ns WRITE: Bank = 3 Row = 144, Col = 105, Data = 273fbf4e
|
|
# Status: Burst-No: 14 Write Address: 00090d6f WriteData: 273fbf4e
|
|
# tb_core.u_sdram32 : at time 58347.0 ns WRITE: Bank = 3 Row = 144, Col = 106, Data = 67dd53cf
|
|
# Status: Burst-No: 15 Write Address: 00090d6f WriteData: 67dd53cf
|
|
# tb_core.u_sdram32 : at time 58357.0 ns WRITE: Bank = 3 Row = 144, Col = 107, Data = b955b672
|
|
# Status: Burst-No: 16 Write Address: 00090d6f WriteData: b955b672
|
|
# tb_core.u_sdram32 : at time 58367.0 ns WRITE: Bank = 3 Row = 144, Col = 108, Data = 797869f2
|
|
# Status: Burst-No: 17 Write Address: 00090d6f WriteData: 797869f2
|
|
# tb_core.u_sdram32 : at time 58377.0 ns WRITE: Bank = 3 Row = 144, Col = 109, Data = ca698294
|
|
# Status: Burst-No: 18 Write Address: 00090d6f WriteData: ca698294
|
|
# tb_core.u_sdram32 : at time 58387.0 ns WRITE: Bank = 3 Row = 144, Col = 110, Data = f40968e8
|
|
# Status: Burst-No: 19 Write Address: 00090d6f WriteData: f40968e8
|
|
# tb_core.u_sdram32 : at time 58397.0 ns WRITE: Bank = 3 Row = 144, Col = 111, Data = 4c54e198
|
|
# Status: Burst-No: 20 Write Address: 00090d6f WriteData: 4c54e198
|
|
# tb_core.u_sdram32 : at time 58407.0 ns WRITE: Bank = 3 Row = 144, Col = 112, Data = 4f0c8f9e
|
|
# Status: Burst-No: 21 Write Address: 00090d6f WriteData: 4f0c8f9e
|
|
# tb_core.u_sdram32 : at time 58417.0 ns WRITE: Bank = 3 Row = 144, Col = 113, Data = 7c502bf8
|
|
# Status: Burst-No: 22 Write Address: 00090d6f WriteData: 7c502bf8
|
|
# tb_core.u_sdram32 : at time 58427.0 ns WRITE: Bank = 3 Row = 144, Col = 114, Data = c6ad048d
|
|
# Status: Burst-No: 23 Write Address: 00090d6f WriteData: c6ad048d
|
|
# tb_core.u_sdram32 : at time 58437.0 ns WRITE: Bank = 3 Row = 144, Col = 115, Data = e5a2b2cb
|
|
# Status: Burst-No: 24 Write Address: 00090d6f WriteData: e5a2b2cb
|
|
# tb_core.u_sdram32 : at time 58447.0 ns WRITE: Bank = 3 Row = 144, Col = 116, Data = d7e1c6af
|
|
# Status: Burst-No: 25 Write Address: 00090d6f WriteData: d7e1c6af
|
|
# tb_core.u_sdram32 : at time 58457.0 ns WRITE: Bank = 3 Row = 144, Col = 117, Data = 1c222f38
|
|
# Status: Burst-No: 26 Write Address: 00090d6f WriteData: 1c222f38
|
|
# tb_core.u_sdram32 : at time 58467.0 ns WRITE: Bank = 3 Row = 144, Col = 118, Data = 704d75e0
|
|
# Status: Burst-No: 27 Write Address: 00090d6f WriteData: 704d75e0
|
|
# tb_core.u_sdram32 : at time 58477.0 ns WRITE: Bank = 3 Row = 144, Col = 119, Data = 50d909a1
|
|
# Status: Burst-No: 28 Write Address: 00090d6f WriteData: 50d909a1
|
|
# tb_core.u_sdram32 : at time 58487.0 ns WRITE: Bank = 3 Row = 144, Col = 120, Data = ca594094
|
|
# Status: Burst-No: 29 Write Address: 00090d6f WriteData: ca594094
|
|
# tb_core.u_sdram32 : at time 58497.0 ns WRITE: Bank = 3 Row = 144, Col = 121, Data = d0ebcca1
|
|
# Status: Burst-No: 30 Write Address: 00090d6f WriteData: d0ebcca1
|
|
# tb_core.u_sdram32 : at time 58507.0 ns WRITE: Bank = 3 Row = 144, Col = 122, Data = 10c2c521
|
|
# Status: Burst-No: 31 Write Address: 00090d6f WriteData: 10c2c521
|
|
# tb_core.u_sdram32 : at time 58517.0 ns WRITE: Bank = 3 Row = 144, Col = 123, Data = 12957f25
|
|
# Status: Burst-No: 32 Write Address: 00090d6f WriteData: 12957f25
|
|
# tb_core.u_sdram32 : at time 58527.0 ns WRITE: Bank = 3 Row = 144, Col = 124, Data = f594e6eb
|
|
# Status: Burst-No: 33 Write Address: 00090d6f WriteData: f594e6eb
|
|
# tb_core.u_sdram32 : at time 58537.0 ns WRITE: Bank = 3 Row = 144, Col = 125, Data = 1dd3013b
|
|
# Status: Burst-No: 34 Write Address: 00090d6f WriteData: 1dd3013b
|
|
# tb_core.u_sdram32 : at time 58547.0 ns WRITE: Bank = 3 Row = 144, Col = 126, Data = 9743be2e
|
|
# Status: Burst-No: 35 Write Address: 00090d6f WriteData: 9743be2e
|
|
# tb_core.u_sdram32 : at time 58557.0 ns WRITE: Bank = 3 Row = 144, Col = 127, Data = 4e156f9c
|
|
# Status: Burst-No: 36 Write Address: 00090d6f WriteData: 4e156f9c
|
|
# tb_core.u_sdram32 : at time 58567.0 ns WRITE: Bank = 3 Row = 144, Col = 128, Data = 0b636716
|
|
# Status: Burst-No: 37 Write Address: 00090d6f WriteData: 0b636716
|
|
# tb_core.u_sdram32 : at time 58577.0 ns WRITE: Bank = 3 Row = 144, Col = 129, Data = 90138420
|
|
# Status: Burst-No: 38 Write Address: 00090d6f WriteData: 90138420
|
|
# tb_core.u_sdram32 : at time 58587.0 ns WRITE: Bank = 3 Row = 144, Col = 130, Data = e131eec2
|
|
# Status: Burst-No: 39 Write Address: 00090d6f WriteData: e131eec2
|
|
# tb_core.u_sdram32 : at time 58597.0 ns WRITE: Bank = 3 Row = 144, Col = 131, Data = ca91f895
|
|
# Status: Burst-No: 40 Write Address: 00090d6f WriteData: ca91f895
|
|
# tb_core.u_sdram32 : at time 58607.0 ns WRITE: Bank = 3 Row = 144, Col = 132, Data = 96ec2a2d
|
|
# Status: Burst-No: 41 Write Address: 00090d6f WriteData: 96ec2a2d
|
|
# tb_core.u_sdram32 : at time 58617.0 ns WRITE: Bank = 3 Row = 144, Col = 133, Data = 02bad905
|
|
# Status: Burst-No: 42 Write Address: 00090d6f WriteData: 02bad905
|
|
# tb_core.u_sdram32 : at time 58627.0 ns WRITE: Bank = 3 Row = 144, Col = 134, Data = 83a5a007
|
|
# Status: Burst-No: 43 Write Address: 00090d6f WriteData: 83a5a007
|
|
# tb_core.u_sdram32 : at time 58637.0 ns WRITE: Bank = 3 Row = 144, Col = 135, Data = 745bf5e8
|
|
# Status: Burst-No: 44 Write Address: 00090d6f WriteData: 745bf5e8
|
|
# tb_core.u_sdram32 : at time 58647.0 ns WRITE: Bank = 3 Row = 144, Col = 136, Data = cc1b6098
|
|
# Status: Burst-No: 45 Write Address: 00090d6f WriteData: cc1b6098
|
|
# tb_core.u_sdram32 : at time 58657.0 ns WRITE: Bank = 3 Row = 144, Col = 137, Data = 34243768
|
|
# Status: Burst-No: 46 Write Address: 00090d6f WriteData: 34243768
|
|
# tb_core.u_sdram32 : at time 58667.0 ns WRITE: Bank = 3 Row = 144, Col = 138, Data = cbb9e297
|
|
# Status: Burst-No: 47 Write Address: 00090d6f WriteData: cbb9e297
|
|
# tb_core.u_sdram32 : at time 58677.0 ns WRITE: Bank = 3 Row = 144, Col = 139, Data = 75b801eb
|
|
# Status: Burst-No: 48 Write Address: 00090d6f WriteData: 75b801eb
|
|
# tb_core.u_sdram32 : at time 58687.0 ns WRITE: Bank = 3 Row = 144, Col = 140, Data = 9bcdf237
|
|
# Status: Burst-No: 49 Write Address: 00090d6f WriteData: 9bcdf237
|
|
# tb_core.u_sdram32 : at time 58697.0 ns WRITE: Bank = 3 Row = 144, Col = 141, Data = 29349952
|
|
# Status: Burst-No: 50 Write Address: 00090d6f WriteData: 29349952
|
|
# tb_core.u_sdram32 : at time 58707.0 ns WRITE: Bank = 3 Row = 144, Col = 142, Data = 41987f83
|
|
# Status: Burst-No: 51 Write Address: 00090d6f WriteData: 41987f83
|
|
# tb_core.u_sdram32 : at time 58717.0 ns WRITE: Bank = 3 Row = 144, Col = 143, Data = c37a7886
|
|
# Status: Burst-No: 52 Write Address: 00090d6f WriteData: c37a7886
|
|
# tb_core.u_sdram32 : at time 58727.0 ns BST : Burst Terminate
|
|
# Write Address: 003d8d71, Burst Size: 53
|
|
# tb_core.u_sdram32 : at time 58867.0 ns ACT : Bank = 3 Row = 984
|
|
# tb_core.u_sdram32 : at time 58897.0 ns WRITE: Bank = 3 Row = 984, Col = 92, Data = ba460274
|
|
# Status: Burst-No: 0 Write Address: 003d8d71 WriteData: ba460274
|
|
# tb_core.u_sdram32 : at time 58907.0 ns WRITE: Bank = 3 Row = 984, Col = 93, Data = b9637872
|
|
# Status: Burst-No: 1 Write Address: 003d8d71 WriteData: b9637872
|
|
# tb_core.u_sdram32 : at time 58917.0 ns WRITE: Bank = 3 Row = 984, Col = 94, Data = f92c9af2
|
|
# Status: Burst-No: 2 Write Address: 003d8d71 WriteData: f92c9af2
|
|
# tb_core.u_sdram32 : at time 58927.0 ns WRITE: Bank = 3 Row = 984, Col = 95, Data = 66371fcc
|
|
# Status: Burst-No: 3 Write Address: 003d8d71 WriteData: 66371fcc
|
|
# tb_core.u_sdram32 : at time 58937.0 ns WRITE: Bank = 3 Row = 984, Col = 96, Data = c42db888
|
|
# Status: Burst-No: 4 Write Address: 003d8d71 WriteData: c42db888
|
|
# tb_core.u_sdram32 : at time 58947.0 ns WRITE: Bank = 3 Row = 984, Col = 97, Data = 223add44
|
|
# Status: Burst-No: 5 Write Address: 003d8d71 WriteData: 223add44
|
|
# tb_core.u_sdram32 : at time 58957.0 ns WRITE: Bank = 3 Row = 984, Col = 98, Data = 41524b82
|
|
# Status: Burst-No: 6 Write Address: 003d8d71 WriteData: 41524b82
|
|
# tb_core.u_sdram32 : at time 58967.0 ns WRITE: Bank = 3 Row = 984, Col = 99, Data = c63ffa8c
|
|
# Status: Burst-No: 7 Write Address: 003d8d71 WriteData: c63ffa8c
|
|
# tb_core.u_sdram32 : at time 58977.0 ns WRITE: Bank = 3 Row = 984, Col = 100, Data = fa6daef4
|
|
# Status: Burst-No: 8 Write Address: 003d8d71 WriteData: fa6daef4
|
|
# tb_core.u_sdram32 : at time 58987.0 ns WRITE: Bank = 3 Row = 984, Col = 101, Data = c7ac408f
|
|
# Status: Burst-No: 9 Write Address: 003d8d71 WriteData: c7ac408f
|
|
# tb_core.u_sdram32 : at time 58997.0 ns WRITE: Bank = 3 Row = 984, Col = 102, Data = e28688c5
|
|
# Status: Burst-No: 10 Write Address: 003d8d71 WriteData: e28688c5
|
|
# tb_core.u_sdram32 : at time 59007.0 ns WRITE: Bank = 3 Row = 984, Col = 103, Data = c0d54c81
|
|
# Status: Burst-No: 11 Write Address: 003d8d71 WriteData: c0d54c81
|
|
# tb_core.u_sdram32 : at time 59017.0 ns WRITE: Bank = 3 Row = 984, Col = 104, Data = 8ae2ac15
|
|
# Status: Burst-No: 12 Write Address: 003d8d71 WriteData: 8ae2ac15
|
|
# tb_core.u_sdram32 : at time 59027.0 ns WRITE: Bank = 3 Row = 984, Col = 105, Data = 65e2ffcb
|
|
# Status: Burst-No: 13 Write Address: 003d8d71 WriteData: 65e2ffcb
|
|
# tb_core.u_sdram32 : at time 59037.0 ns WRITE: Bank = 3 Row = 984, Col = 106, Data = 1b2dfd36
|
|
# Status: Burst-No: 14 Write Address: 003d8d71 WriteData: 1b2dfd36
|
|
# tb_core.u_sdram32 : at time 59047.0 ns WRITE: Bank = 3 Row = 984, Col = 107, Data = 1550d12a
|
|
# Status: Burst-No: 15 Write Address: 003d8d71 WriteData: 1550d12a
|
|
# tb_core.u_sdram32 : at time 59057.0 ns WRITE: Bank = 3 Row = 984, Col = 108, Data = faf442f5
|
|
# Status: Burst-No: 16 Write Address: 003d8d71 WriteData: faf442f5
|
|
# tb_core.u_sdram32 : at time 59067.0 ns WRITE: Bank = 3 Row = 984, Col = 109, Data = 9ee6363d
|
|
# Status: Burst-No: 17 Write Address: 003d8d71 WriteData: 9ee6363d
|
|
# tb_core.u_sdram32 : at time 59077.0 ns WRITE: Bank = 3 Row = 984, Col = 110, Data = 23661746
|
|
# Status: Burst-No: 18 Write Address: 003d8d71 WriteData: 23661746
|
|
# tb_core.u_sdram32 : at time 59087.0 ns WRITE: Bank = 3 Row = 984, Col = 111, Data = 9dbe003b
|
|
# Status: Burst-No: 19 Write Address: 003d8d71 WriteData: 9dbe003b
|
|
# tb_core.u_sdram32 : at time 59097.0 ns WRITE: Bank = 3 Row = 984, Col = 112, Data = f720bcee
|
|
# Status: Burst-No: 20 Write Address: 003d8d71 WriteData: f720bcee
|
|
# tb_core.u_sdram32 : at time 59107.0 ns WRITE: Bank = 3 Row = 984, Col = 113, Data = 49b4c193
|
|
# Status: Burst-No: 21 Write Address: 003d8d71 WriteData: 49b4c193
|
|
# tb_core.u_sdram32 : at time 59117.0 ns WRITE: Bank = 3 Row = 984, Col = 114, Data = f27102e4
|
|
# Status: Burst-No: 22 Write Address: 003d8d71 WriteData: f27102e4
|
|
# tb_core.u_sdram32 : at time 59127.0 ns WRITE: Bank = 3 Row = 984, Col = 115, Data = e2561cc4
|
|
# Status: Burst-No: 23 Write Address: 003d8d71 WriteData: e2561cc4
|
|
# tb_core.u_sdram32 : at time 59137.0 ns WRITE: Bank = 3 Row = 984, Col = 116, Data = b9492472
|
|
# Status: Burst-No: 24 Write Address: 003d8d71 WriteData: b9492472
|
|
# tb_core.u_sdram32 : at time 59147.0 ns WRITE: Bank = 3 Row = 984, Col = 117, Data = 39213b72
|
|
# Status: Burst-No: 25 Write Address: 003d8d71 WriteData: 39213b72
|
|
# tb_core.u_sdram32 : at time 59157.0 ns WRITE: Bank = 3 Row = 984, Col = 118, Data = a8e1aa51
|
|
# Status: Burst-No: 26 Write Address: 003d8d71 WriteData: a8e1aa51
|
|
# tb_core.u_sdram32 : at time 59167.0 ns WRITE: Bank = 3 Row = 984, Col = 119, Data = 5abc1db5
|
|
# Status: Burst-No: 27 Write Address: 003d8d71 WriteData: 5abc1db5
|
|
# tb_core.u_sdram32 : at time 59177.0 ns WRITE: Bank = 3 Row = 984, Col = 120, Data = 51bd47a3
|
|
# Status: Burst-No: 28 Write Address: 003d8d71 WriteData: 51bd47a3
|
|
# tb_core.u_sdram32 : at time 59187.0 ns WRITE: Bank = 3 Row = 984, Col = 121, Data = 566e01ac
|
|
# Status: Burst-No: 29 Write Address: 003d8d71 WriteData: 566e01ac
|
|
# tb_core.u_sdram32 : at time 59197.0 ns WRITE: Bank = 3 Row = 984, Col = 122, Data = cb87ba97
|
|
# Status: Burst-No: 30 Write Address: 003d8d71 WriteData: cb87ba97
|
|
# tb_core.u_sdram32 : at time 59207.0 ns WRITE: Bank = 3 Row = 984, Col = 123, Data = 98f8c031
|
|
# Status: Burst-No: 31 Write Address: 003d8d71 WriteData: 98f8c031
|
|
# tb_core.u_sdram32 : at time 59217.0 ns WRITE: Bank = 3 Row = 984, Col = 124, Data = df07b0be
|
|
# Status: Burst-No: 32 Write Address: 003d8d71 WriteData: df07b0be
|
|
# tb_core.u_sdram32 : at time 59227.0 ns WRITE: Bank = 3 Row = 984, Col = 125, Data = aba92e57
|
|
# Status: Burst-No: 33 Write Address: 003d8d71 WriteData: aba92e57
|
|
# tb_core.u_sdram32 : at time 59237.0 ns WRITE: Bank = 3 Row = 984, Col = 126, Data = 3b1ba176
|
|
# Status: Burst-No: 34 Write Address: 003d8d71 WriteData: 3b1ba176
|
|
# tb_core.u_sdram32 : at time 59247.0 ns WRITE: Bank = 3 Row = 984, Col = 127, Data = 5a3681b4
|
|
# Status: Burst-No: 35 Write Address: 003d8d71 WriteData: 5a3681b4
|
|
# tb_core.u_sdram32 : at time 59257.0 ns WRITE: Bank = 3 Row = 984, Col = 128, Data = 8079ac00
|
|
# Status: Burst-No: 36 Write Address: 003d8d71 WriteData: 8079ac00
|
|
# tb_core.u_sdram32 : at time 59267.0 ns WRITE: Bank = 3 Row = 984, Col = 129, Data = b9c8a073
|
|
# Status: Burst-No: 37 Write Address: 003d8d71 WriteData: b9c8a073
|
|
# tb_core.u_sdram32 : at time 59277.0 ns WRITE: Bank = 3 Row = 984, Col = 130, Data = 94aa8429
|
|
# Status: Burst-No: 38 Write Address: 003d8d71 WriteData: 94aa8429
|
|
# tb_core.u_sdram32 : at time 59287.0 ns WRITE: Bank = 3 Row = 984, Col = 131, Data = 393d9b72
|
|
# Status: Burst-No: 39 Write Address: 003d8d71 WriteData: 393d9b72
|
|
# tb_core.u_sdram32 : at time 59297.0 ns WRITE: Bank = 3 Row = 984, Col = 132, Data = 8f77461e
|
|
# Status: Burst-No: 40 Write Address: 003d8d71 WriteData: 8f77461e
|
|
# tb_core.u_sdram32 : at time 59307.0 ns WRITE: Bank = 3 Row = 984, Col = 133, Data = 3685f36d
|
|
# Status: Burst-No: 41 Write Address: 003d8d71 WriteData: 3685f36d
|
|
# tb_core.u_sdram32 : at time 59317.0 ns WRITE: Bank = 3 Row = 984, Col = 134, Data = 66c259cd
|
|
# Status: Burst-No: 42 Write Address: 003d8d71 WriteData: 66c259cd
|
|
# tb_core.u_sdram32 : at time 59327.0 ns WRITE: Bank = 3 Row = 984, Col = 135, Data = 7eb00bfd
|
|
# Status: Burst-No: 43 Write Address: 003d8d71 WriteData: 7eb00bfd
|
|
# tb_core.u_sdram32 : at time 59337.0 ns WRITE: Bank = 3 Row = 984, Col = 136, Data = 6b834dd7
|
|
# Status: Burst-No: 44 Write Address: 003d8d71 WriteData: 6b834dd7
|
|
# tb_core.u_sdram32 : at time 59347.0 ns WRITE: Bank = 3 Row = 984, Col = 137, Data = 0dfa7f1b
|
|
# Status: Burst-No: 45 Write Address: 003d8d71 WriteData: 0dfa7f1b
|
|
# tb_core.u_sdram32 : at time 59357.0 ns WRITE: Bank = 3 Row = 984, Col = 138, Data = 675dc5ce
|
|
# Status: Burst-No: 46 Write Address: 003d8d71 WriteData: 675dc5ce
|
|
# tb_core.u_sdram32 : at time 59367.0 ns WRITE: Bank = 3 Row = 984, Col = 139, Data = 4b058b96
|
|
# Status: Burst-No: 47 Write Address: 003d8d71 WriteData: 4b058b96
|
|
# tb_core.u_sdram32 : at time 59377.0 ns WRITE: Bank = 3 Row = 984, Col = 140, Data = e50b48ca
|
|
# Status: Burst-No: 48 Write Address: 003d8d71 WriteData: e50b48ca
|
|
# tb_core.u_sdram32 : at time 59387.0 ns WRITE: Bank = 3 Row = 984, Col = 141, Data = 43fb6587
|
|
# Status: Burst-No: 49 Write Address: 003d8d71 WriteData: 43fb6587
|
|
# tb_core.u_sdram32 : at time 59397.0 ns WRITE: Bank = 3 Row = 984, Col = 142, Data = 9690342d
|
|
# Status: Burst-No: 50 Write Address: 003d8d71 WriteData: 9690342d
|
|
# tb_core.u_sdram32 : at time 59407.0 ns WRITE: Bank = 3 Row = 984, Col = 143, Data = 16479b2c
|
|
# Status: Burst-No: 51 Write Address: 003d8d71 WriteData: 16479b2c
|
|
# tb_core.u_sdram32 : at time 59417.0 ns WRITE: Bank = 3 Row = 984, Col = 144, Data = 12f38925
|
|
# Status: Burst-No: 52 Write Address: 003d8d71 WriteData: 12f38925
|
|
# tb_core.u_sdram32 : at time 59427.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 59567.0 ns ACT : Bank = 3 Row = 144
|
|
# tb_core.u_sdram32 : at time 59623.0 ns READ : Bank = 3 Row = 144, Col = 91, Data = e0c9acc1
|
|
# tb_core.u_sdram32 : at time 59633.0 ns READ : Bank = 3 Row = 144, Col = 92, Data = e9d576d3
|
|
# READ STATUS: Burst-No: 0 Addr: 00090d6f Rxd: e0c9acc1
|
|
# tb_core.u_sdram32 : at time 59643.0 ns READ : Bank = 3 Row = 144, Col = 93, Data = 8c712218
|
|
# READ STATUS: Burst-No: 1 Addr: 00090d71 Rxd: e9d576d3
|
|
# tb_core.u_sdram32 : at time 59653.0 ns READ : Bank = 3 Row = 144, Col = 94, Data = 56ce7fad
|
|
# READ STATUS: Burst-No: 2 Addr: 00090d73 Rxd: 8c712218
|
|
# tb_core.u_sdram32 : at time 59663.0 ns READ : Bank = 3 Row = 144, Col = 95, Data = 7c99cff9
|
|
# READ STATUS: Burst-No: 3 Addr: 00090d75 Rxd: 56ce7fad
|
|
# tb_core.u_sdram32 : at time 59673.0 ns READ : Bank = 3 Row = 144, Col = 96, Data = 646601c8
|
|
# READ STATUS: Burst-No: 4 Addr: 00090d77 Rxd: 7c99cff9
|
|
# tb_core.u_sdram32 : at time 59683.0 ns READ : Bank = 3 Row = 144, Col = 97, Data = 9295aa25
|
|
# READ STATUS: Burst-No: 5 Addr: 00090d79 Rxd: 646601c8
|
|
# tb_core.u_sdram32 : at time 59693.0 ns READ : Bank = 3 Row = 144, Col = 98, Data = a46c4848
|
|
# READ STATUS: Burst-No: 6 Addr: 00090d7b Rxd: 9295aa25
|
|
# tb_core.u_sdram32 : at time 59703.0 ns READ : Bank = 3 Row = 144, Col = 99, Data = 7186abe3
|
|
# READ STATUS: Burst-No: 7 Addr: 00090d7d Rxd: a46c4848
|
|
# tb_core.u_sdram32 : at time 59713.0 ns READ : Bank = 3 Row = 144, Col = 100, Data = 680a6fd0
|
|
# READ STATUS: Burst-No: 8 Addr: 00090d7f Rxd: 7186abe3
|
|
# tb_core.u_sdram32 : at time 59723.0 ns READ : Bank = 3 Row = 144, Col = 101, Data = 4506218a
|
|
# READ STATUS: Burst-No: 9 Addr: 00090d81 Rxd: 680a6fd0
|
|
# tb_core.u_sdram32 : at time 59733.0 ns READ : Bank = 3 Row = 144, Col = 102, Data = b3aa3667
|
|
# READ STATUS: Burst-No: 10 Addr: 00090d83 Rxd: 4506218a
|
|
# tb_core.u_sdram32 : at time 59743.0 ns READ : Bank = 3 Row = 144, Col = 103, Data = b8331870
|
|
# READ STATUS: Burst-No: 11 Addr: 00090d85 Rxd: b3aa3667
|
|
# tb_core.u_sdram32 : at time 59753.0 ns READ : Bank = 3 Row = 144, Col = 104, Data = 3058ef60
|
|
# READ STATUS: Burst-No: 12 Addr: 00090d87 Rxd: b8331870
|
|
# tb_core.u_sdram32 : at time 59763.0 ns READ : Bank = 3 Row = 144, Col = 105, Data = 273fbf4e
|
|
# READ STATUS: Burst-No: 13 Addr: 00090d89 Rxd: 3058ef60
|
|
# tb_core.u_sdram32 : at time 59773.0 ns READ : Bank = 3 Row = 144, Col = 106, Data = 67dd53cf
|
|
# READ STATUS: Burst-No: 14 Addr: 00090d8b Rxd: 273fbf4e
|
|
# tb_core.u_sdram32 : at time 59783.0 ns READ : Bank = 3 Row = 144, Col = 107, Data = b955b672
|
|
# READ STATUS: Burst-No: 15 Addr: 00090d8d Rxd: 67dd53cf
|
|
# tb_core.u_sdram32 : at time 59793.0 ns READ : Bank = 3 Row = 144, Col = 108, Data = 797869f2
|
|
# READ STATUS: Burst-No: 16 Addr: 00090d8f Rxd: b955b672
|
|
# tb_core.u_sdram32 : at time 59803.0 ns READ : Bank = 3 Row = 144, Col = 109, Data = ca698294
|
|
# READ STATUS: Burst-No: 17 Addr: 00090d91 Rxd: 797869f2
|
|
# tb_core.u_sdram32 : at time 59813.0 ns READ : Bank = 3 Row = 144, Col = 110, Data = f40968e8
|
|
# READ STATUS: Burst-No: 18 Addr: 00090d93 Rxd: ca698294
|
|
# tb_core.u_sdram32 : at time 59823.0 ns READ : Bank = 3 Row = 144, Col = 111, Data = 4c54e198
|
|
# READ STATUS: Burst-No: 19 Addr: 00090d95 Rxd: f40968e8
|
|
# tb_core.u_sdram32 : at time 59833.0 ns READ : Bank = 3 Row = 144, Col = 112, Data = 4f0c8f9e
|
|
# READ STATUS: Burst-No: 20 Addr: 00090d97 Rxd: 4c54e198
|
|
# tb_core.u_sdram32 : at time 59843.0 ns READ : Bank = 3 Row = 144, Col = 113, Data = 7c502bf8
|
|
# READ STATUS: Burst-No: 21 Addr: 00090d99 Rxd: 4f0c8f9e
|
|
# tb_core.u_sdram32 : at time 59853.0 ns READ : Bank = 3 Row = 144, Col = 114, Data = c6ad048d
|
|
# READ STATUS: Burst-No: 22 Addr: 00090d9b Rxd: 7c502bf8
|
|
# tb_core.u_sdram32 : at time 59863.0 ns READ : Bank = 3 Row = 144, Col = 115, Data = e5a2b2cb
|
|
# READ STATUS: Burst-No: 23 Addr: 00090d9d Rxd: c6ad048d
|
|
# tb_core.u_sdram32 : at time 59873.0 ns READ : Bank = 3 Row = 144, Col = 116, Data = d7e1c6af
|
|
# READ STATUS: Burst-No: 24 Addr: 00090d9f Rxd: e5a2b2cb
|
|
# tb_core.u_sdram32 : at time 59883.0 ns READ : Bank = 3 Row = 144, Col = 117, Data = 1c222f38
|
|
# READ STATUS: Burst-No: 25 Addr: 00090da1 Rxd: d7e1c6af
|
|
# tb_core.u_sdram32 : at time 59893.0 ns READ : Bank = 3 Row = 144, Col = 118, Data = 704d75e0
|
|
# READ STATUS: Burst-No: 26 Addr: 00090da3 Rxd: 1c222f38
|
|
# tb_core.u_sdram32 : at time 59903.0 ns READ : Bank = 3 Row = 144, Col = 119, Data = 50d909a1
|
|
# READ STATUS: Burst-No: 27 Addr: 00090da5 Rxd: 704d75e0
|
|
# tb_core.u_sdram32 : at time 59913.0 ns READ : Bank = 3 Row = 144, Col = 120, Data = ca594094
|
|
# READ STATUS: Burst-No: 28 Addr: 00090da7 Rxd: 50d909a1
|
|
# tb_core.u_sdram32 : at time 59923.0 ns READ : Bank = 3 Row = 144, Col = 121, Data = d0ebcca1
|
|
# READ STATUS: Burst-No: 29 Addr: 00090da9 Rxd: ca594094
|
|
# tb_core.u_sdram32 : at time 59933.0 ns READ : Bank = 3 Row = 144, Col = 122, Data = 10c2c521
|
|
# READ STATUS: Burst-No: 30 Addr: 00090dab Rxd: d0ebcca1
|
|
# tb_core.u_sdram32 : at time 59943.0 ns READ : Bank = 3 Row = 144, Col = 123, Data = 12957f25
|
|
# READ STATUS: Burst-No: 31 Addr: 00090dad Rxd: 10c2c521
|
|
# tb_core.u_sdram32 : at time 59953.0 ns READ : Bank = 3 Row = 144, Col = 124, Data = f594e6eb
|
|
# READ STATUS: Burst-No: 32 Addr: 00090daf Rxd: 12957f25
|
|
# tb_core.u_sdram32 : at time 59963.0 ns READ : Bank = 3 Row = 144, Col = 125, Data = 1dd3013b
|
|
# READ STATUS: Burst-No: 33 Addr: 00090db1 Rxd: f594e6eb
|
|
# tb_core.u_sdram32 : at time 59973.0 ns READ : Bank = 3 Row = 144, Col = 126, Data = 9743be2e
|
|
# READ STATUS: Burst-No: 34 Addr: 00090db3 Rxd: 1dd3013b
|
|
# tb_core.u_sdram32 : at time 59983.0 ns READ : Bank = 3 Row = 144, Col = 127, Data = 4e156f9c
|
|
# READ STATUS: Burst-No: 35 Addr: 00090db5 Rxd: 9743be2e
|
|
# tb_core.u_sdram32 : at time 59993.0 ns READ : Bank = 3 Row = 144, Col = 128, Data = 0b636716
|
|
# READ STATUS: Burst-No: 36 Addr: 00090db7 Rxd: 4e156f9c
|
|
# tb_core.u_sdram32 : at time 60003.0 ns READ : Bank = 3 Row = 144, Col = 129, Data = 90138420
|
|
# READ STATUS: Burst-No: 37 Addr: 00090db9 Rxd: 0b636716
|
|
# tb_core.u_sdram32 : at time 60013.0 ns READ : Bank = 3 Row = 144, Col = 130, Data = e131eec2
|
|
# READ STATUS: Burst-No: 38 Addr: 00090dbb Rxd: 90138420
|
|
# tb_core.u_sdram32 : at time 60023.0 ns READ : Bank = 3 Row = 144, Col = 131, Data = ca91f895
|
|
# READ STATUS: Burst-No: 39 Addr: 00090dbd Rxd: e131eec2
|
|
# tb_core.u_sdram32 : at time 60033.0 ns READ : Bank = 3 Row = 144, Col = 132, Data = 96ec2a2d
|
|
# READ STATUS: Burst-No: 40 Addr: 00090dbf Rxd: ca91f895
|
|
# tb_core.u_sdram32 : at time 60043.0 ns READ : Bank = 3 Row = 144, Col = 133, Data = 02bad905
|
|
# READ STATUS: Burst-No: 41 Addr: 00090dc1 Rxd: 96ec2a2d
|
|
# tb_core.u_sdram32 : at time 60053.0 ns READ : Bank = 3 Row = 144, Col = 134, Data = 83a5a007
|
|
# READ STATUS: Burst-No: 42 Addr: 00090dc3 Rxd: 02bad905
|
|
# tb_core.u_sdram32 : at time 60063.0 ns READ : Bank = 3 Row = 144, Col = 135, Data = 745bf5e8
|
|
# READ STATUS: Burst-No: 43 Addr: 00090dc5 Rxd: 83a5a007
|
|
# tb_core.u_sdram32 : at time 60073.0 ns READ : Bank = 3 Row = 144, Col = 136, Data = cc1b6098
|
|
# READ STATUS: Burst-No: 44 Addr: 00090dc7 Rxd: 745bf5e8
|
|
# tb_core.u_sdram32 : at time 60083.0 ns READ : Bank = 3 Row = 144, Col = 137, Data = 34243768
|
|
# READ STATUS: Burst-No: 45 Addr: 00090dc9 Rxd: cc1b6098
|
|
# tb_core.u_sdram32 : at time 60093.0 ns READ : Bank = 3 Row = 144, Col = 138, Data = cbb9e297
|
|
# READ STATUS: Burst-No: 46 Addr: 00090dcb Rxd: 34243768
|
|
# tb_core.u_sdram32 : at time 60103.0 ns READ : Bank = 3 Row = 144, Col = 139, Data = 75b801eb
|
|
# READ STATUS: Burst-No: 47 Addr: 00090dcd Rxd: cbb9e297
|
|
# tb_core.u_sdram32 : at time 60113.0 ns READ : Bank = 3 Row = 144, Col = 140, Data = 9bcdf237
|
|
# READ STATUS: Burst-No: 48 Addr: 00090dcf Rxd: 75b801eb
|
|
# tb_core.u_sdram32 : at time 60123.0 ns READ : Bank = 3 Row = 144, Col = 141, Data = 29349952
|
|
# tb_core.u_sdram32 : at time 60127.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 49 Addr: 00090dd1 Rxd: 9bcdf237
|
|
# tb_core.u_sdram32 : at time 60133.0 ns READ : Bank = 3 Row = 144, Col = 142, Data = 41987f83
|
|
# READ STATUS: Burst-No: 50 Addr: 00090dd3 Rxd: 29349952
|
|
# tb_core.u_sdram32 : at time 60143.0 ns READ : Bank = 3 Row = 144, Col = 143, Data = c37a7886
|
|
# READ STATUS: Burst-No: 51 Addr: 00090dd5 Rxd: 41987f83
|
|
# READ STATUS: Burst-No: 52 Addr: 00090dd7 Rxd: c37a7886
|
|
# tb_core.u_sdram32 : at time 60317.0 ns ACT : Bank = 3 Row = 984
|
|
# tb_core.u_sdram32 : at time 60373.0 ns READ : Bank = 3 Row = 984, Col = 92, Data = ba460274
|
|
# tb_core.u_sdram32 : at time 60383.0 ns READ : Bank = 3 Row = 984, Col = 93, Data = b9637872
|
|
# READ STATUS: Burst-No: 0 Addr: 003d8d71 Rxd: ba460274
|
|
# tb_core.u_sdram32 : at time 60393.0 ns READ : Bank = 3 Row = 984, Col = 94, Data = f92c9af2
|
|
# READ STATUS: Burst-No: 1 Addr: 003d8d73 Rxd: b9637872
|
|
# tb_core.u_sdram32 : at time 60403.0 ns READ : Bank = 3 Row = 984, Col = 95, Data = 66371fcc
|
|
# READ STATUS: Burst-No: 2 Addr: 003d8d75 Rxd: f92c9af2
|
|
# tb_core.u_sdram32 : at time 60413.0 ns READ : Bank = 3 Row = 984, Col = 96, Data = c42db888
|
|
# READ STATUS: Burst-No: 3 Addr: 003d8d77 Rxd: 66371fcc
|
|
# tb_core.u_sdram32 : at time 60423.0 ns READ : Bank = 3 Row = 984, Col = 97, Data = 223add44
|
|
# READ STATUS: Burst-No: 4 Addr: 003d8d79 Rxd: c42db888
|
|
# tb_core.u_sdram32 : at time 60433.0 ns READ : Bank = 3 Row = 984, Col = 98, Data = 41524b82
|
|
# READ STATUS: Burst-No: 5 Addr: 003d8d7b Rxd: 223add44
|
|
# tb_core.u_sdram32 : at time 60443.0 ns READ : Bank = 3 Row = 984, Col = 99, Data = c63ffa8c
|
|
# READ STATUS: Burst-No: 6 Addr: 003d8d7d Rxd: 41524b82
|
|
# tb_core.u_sdram32 : at time 60453.0 ns READ : Bank = 3 Row = 984, Col = 100, Data = fa6daef4
|
|
# READ STATUS: Burst-No: 7 Addr: 003d8d7f Rxd: c63ffa8c
|
|
# tb_core.u_sdram32 : at time 60463.0 ns READ : Bank = 3 Row = 984, Col = 101, Data = c7ac408f
|
|
# READ STATUS: Burst-No: 8 Addr: 003d8d81 Rxd: fa6daef4
|
|
# tb_core.u_sdram32 : at time 60473.0 ns READ : Bank = 3 Row = 984, Col = 102, Data = e28688c5
|
|
# READ STATUS: Burst-No: 9 Addr: 003d8d83 Rxd: c7ac408f
|
|
# tb_core.u_sdram32 : at time 60483.0 ns READ : Bank = 3 Row = 984, Col = 103, Data = c0d54c81
|
|
# READ STATUS: Burst-No: 10 Addr: 003d8d85 Rxd: e28688c5
|
|
# tb_core.u_sdram32 : at time 60493.0 ns READ : Bank = 3 Row = 984, Col = 104, Data = 8ae2ac15
|
|
# READ STATUS: Burst-No: 11 Addr: 003d8d87 Rxd: c0d54c81
|
|
# tb_core.u_sdram32 : at time 60503.0 ns READ : Bank = 3 Row = 984, Col = 105, Data = 65e2ffcb
|
|
# READ STATUS: Burst-No: 12 Addr: 003d8d89 Rxd: 8ae2ac15
|
|
# tb_core.u_sdram32 : at time 60513.0 ns READ : Bank = 3 Row = 984, Col = 106, Data = 1b2dfd36
|
|
# READ STATUS: Burst-No: 13 Addr: 003d8d8b Rxd: 65e2ffcb
|
|
# tb_core.u_sdram32 : at time 60523.0 ns READ : Bank = 3 Row = 984, Col = 107, Data = 1550d12a
|
|
# READ STATUS: Burst-No: 14 Addr: 003d8d8d Rxd: 1b2dfd36
|
|
# tb_core.u_sdram32 : at time 60533.0 ns READ : Bank = 3 Row = 984, Col = 108, Data = faf442f5
|
|
# READ STATUS: Burst-No: 15 Addr: 003d8d8f Rxd: 1550d12a
|
|
# tb_core.u_sdram32 : at time 60543.0 ns READ : Bank = 3 Row = 984, Col = 109, Data = 9ee6363d
|
|
# READ STATUS: Burst-No: 16 Addr: 003d8d91 Rxd: faf442f5
|
|
# tb_core.u_sdram32 : at time 60553.0 ns READ : Bank = 3 Row = 984, Col = 110, Data = 23661746
|
|
# READ STATUS: Burst-No: 17 Addr: 003d8d93 Rxd: 9ee6363d
|
|
# tb_core.u_sdram32 : at time 60563.0 ns READ : Bank = 3 Row = 984, Col = 111, Data = 9dbe003b
|
|
# READ STATUS: Burst-No: 18 Addr: 003d8d95 Rxd: 23661746
|
|
# tb_core.u_sdram32 : at time 60573.0 ns READ : Bank = 3 Row = 984, Col = 112, Data = f720bcee
|
|
# READ STATUS: Burst-No: 19 Addr: 003d8d97 Rxd: 9dbe003b
|
|
# tb_core.u_sdram32 : at time 60583.0 ns READ : Bank = 3 Row = 984, Col = 113, Data = 49b4c193
|
|
# READ STATUS: Burst-No: 20 Addr: 003d8d99 Rxd: f720bcee
|
|
# tb_core.u_sdram32 : at time 60593.0 ns READ : Bank = 3 Row = 984, Col = 114, Data = f27102e4
|
|
# READ STATUS: Burst-No: 21 Addr: 003d8d9b Rxd: 49b4c193
|
|
# tb_core.u_sdram32 : at time 60603.0 ns READ : Bank = 3 Row = 984, Col = 115, Data = e2561cc4
|
|
# READ STATUS: Burst-No: 22 Addr: 003d8d9d Rxd: f27102e4
|
|
# tb_core.u_sdram32 : at time 60613.0 ns READ : Bank = 3 Row = 984, Col = 116, Data = b9492472
|
|
# READ STATUS: Burst-No: 23 Addr: 003d8d9f Rxd: e2561cc4
|
|
# tb_core.u_sdram32 : at time 60623.0 ns READ : Bank = 3 Row = 984, Col = 117, Data = 39213b72
|
|
# READ STATUS: Burst-No: 24 Addr: 003d8da1 Rxd: b9492472
|
|
# tb_core.u_sdram32 : at time 60633.0 ns READ : Bank = 3 Row = 984, Col = 118, Data = a8e1aa51
|
|
# READ STATUS: Burst-No: 25 Addr: 003d8da3 Rxd: 39213b72
|
|
# tb_core.u_sdram32 : at time 60643.0 ns READ : Bank = 3 Row = 984, Col = 119, Data = 5abc1db5
|
|
# READ STATUS: Burst-No: 26 Addr: 003d8da5 Rxd: a8e1aa51
|
|
# tb_core.u_sdram32 : at time 60653.0 ns READ : Bank = 3 Row = 984, Col = 120, Data = 51bd47a3
|
|
# READ STATUS: Burst-No: 27 Addr: 003d8da7 Rxd: 5abc1db5
|
|
# tb_core.u_sdram32 : at time 60663.0 ns READ : Bank = 3 Row = 984, Col = 121, Data = 566e01ac
|
|
# READ STATUS: Burst-No: 28 Addr: 003d8da9 Rxd: 51bd47a3
|
|
# tb_core.u_sdram32 : at time 60673.0 ns READ : Bank = 3 Row = 984, Col = 122, Data = cb87ba97
|
|
# READ STATUS: Burst-No: 29 Addr: 003d8dab Rxd: 566e01ac
|
|
# tb_core.u_sdram32 : at time 60683.0 ns READ : Bank = 3 Row = 984, Col = 123, Data = 98f8c031
|
|
# READ STATUS: Burst-No: 30 Addr: 003d8dad Rxd: cb87ba97
|
|
# tb_core.u_sdram32 : at time 60693.0 ns READ : Bank = 3 Row = 984, Col = 124, Data = df07b0be
|
|
# READ STATUS: Burst-No: 31 Addr: 003d8daf Rxd: 98f8c031
|
|
# tb_core.u_sdram32 : at time 60703.0 ns READ : Bank = 3 Row = 984, Col = 125, Data = aba92e57
|
|
# READ STATUS: Burst-No: 32 Addr: 003d8db1 Rxd: df07b0be
|
|
# tb_core.u_sdram32 : at time 60713.0 ns READ : Bank = 3 Row = 984, Col = 126, Data = 3b1ba176
|
|
# READ STATUS: Burst-No: 33 Addr: 003d8db3 Rxd: aba92e57
|
|
# tb_core.u_sdram32 : at time 60723.0 ns READ : Bank = 3 Row = 984, Col = 127, Data = 5a3681b4
|
|
# READ STATUS: Burst-No: 34 Addr: 003d8db5 Rxd: 3b1ba176
|
|
# tb_core.u_sdram32 : at time 60733.0 ns READ : Bank = 3 Row = 984, Col = 128, Data = 8079ac00
|
|
# READ STATUS: Burst-No: 35 Addr: 003d8db7 Rxd: 5a3681b4
|
|
# tb_core.u_sdram32 : at time 60743.0 ns READ : Bank = 3 Row = 984, Col = 129, Data = b9c8a073
|
|
# READ STATUS: Burst-No: 36 Addr: 003d8db9 Rxd: 8079ac00
|
|
# tb_core.u_sdram32 : at time 60753.0 ns READ : Bank = 3 Row = 984, Col = 130, Data = 94aa8429
|
|
# READ STATUS: Burst-No: 37 Addr: 003d8dbb Rxd: b9c8a073
|
|
# tb_core.u_sdram32 : at time 60763.0 ns READ : Bank = 3 Row = 984, Col = 131, Data = 393d9b72
|
|
# READ STATUS: Burst-No: 38 Addr: 003d8dbd Rxd: 94aa8429
|
|
# tb_core.u_sdram32 : at time 60773.0 ns READ : Bank = 3 Row = 984, Col = 132, Data = 8f77461e
|
|
# READ STATUS: Burst-No: 39 Addr: 003d8dbf Rxd: 393d9b72
|
|
# tb_core.u_sdram32 : at time 60783.0 ns READ : Bank = 3 Row = 984, Col = 133, Data = 3685f36d
|
|
# READ STATUS: Burst-No: 40 Addr: 003d8dc1 Rxd: 8f77461e
|
|
# tb_core.u_sdram32 : at time 60793.0 ns READ : Bank = 3 Row = 984, Col = 134, Data = 66c259cd
|
|
# READ STATUS: Burst-No: 41 Addr: 003d8dc3 Rxd: 3685f36d
|
|
# tb_core.u_sdram32 : at time 60803.0 ns READ : Bank = 3 Row = 984, Col = 135, Data = 7eb00bfd
|
|
# READ STATUS: Burst-No: 42 Addr: 003d8dc5 Rxd: 66c259cd
|
|
# tb_core.u_sdram32 : at time 60813.0 ns READ : Bank = 3 Row = 984, Col = 136, Data = 6b834dd7
|
|
# READ STATUS: Burst-No: 43 Addr: 003d8dc7 Rxd: 7eb00bfd
|
|
# tb_core.u_sdram32 : at time 60823.0 ns READ : Bank = 3 Row = 984, Col = 137, Data = 0dfa7f1b
|
|
# READ STATUS: Burst-No: 44 Addr: 003d8dc9 Rxd: 6b834dd7
|
|
# tb_core.u_sdram32 : at time 60833.0 ns READ : Bank = 3 Row = 984, Col = 138, Data = 675dc5ce
|
|
# READ STATUS: Burst-No: 45 Addr: 003d8dcb Rxd: 0dfa7f1b
|
|
# tb_core.u_sdram32 : at time 60843.0 ns READ : Bank = 3 Row = 984, Col = 139, Data = 4b058b96
|
|
# READ STATUS: Burst-No: 46 Addr: 003d8dcd Rxd: 675dc5ce
|
|
# tb_core.u_sdram32 : at time 60853.0 ns READ : Bank = 3 Row = 984, Col = 140, Data = e50b48ca
|
|
# READ STATUS: Burst-No: 47 Addr: 003d8dcf Rxd: 4b058b96
|
|
# tb_core.u_sdram32 : at time 60863.0 ns READ : Bank = 3 Row = 984, Col = 141, Data = 43fb6587
|
|
# READ STATUS: Burst-No: 48 Addr: 003d8dd1 Rxd: e50b48ca
|
|
# tb_core.u_sdram32 : at time 60873.0 ns READ : Bank = 3 Row = 984, Col = 142, Data = 9690342d
|
|
# tb_core.u_sdram32 : at time 60877.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 49 Addr: 003d8dd3 Rxd: 43fb6587
|
|
# tb_core.u_sdram32 : at time 60883.0 ns READ : Bank = 3 Row = 984, Col = 143, Data = 16479b2c
|
|
# READ STATUS: Burst-No: 50 Addr: 003d8dd5 Rxd: 9690342d
|
|
# tb_core.u_sdram32 : at time 60893.0 ns READ : Bank = 3 Row = 984, Col = 144, Data = 12f38925
|
|
# READ STATUS: Burst-No: 51 Addr: 003d8dd7 Rxd: 16479b2c
|
|
# READ STATUS: Burst-No: 52 Addr: 003d8dd9 Rxd: 12f38925
|
|
# Write Address: 00357d22, Burst Size: 52
|
|
# tb_core.u_sdram32 : at time 61067.0 ns ACT : Bank = 3 Row = 855
|
|
# tb_core.u_sdram32 : at time 61097.0 ns WRITE: Bank = 3 Row = 855, Col = 72, Data = 418d7383
|
|
# Status: Burst-No: 0 Write Address: 00357d22 WriteData: 418d7383
|
|
# tb_core.u_sdram32 : at time 61107.0 ns WRITE: Bank = 3 Row = 855, Col = 73, Data = 1ee3173d
|
|
# Status: Burst-No: 1 Write Address: 00357d22 WriteData: 1ee3173d
|
|
# tb_core.u_sdram32 : at time 61117.0 ns WRITE: Bank = 3 Row = 855, Col = 74, Data = 580965b0
|
|
# Status: Burst-No: 2 Write Address: 00357d22 WriteData: 580965b0
|
|
# tb_core.u_sdram32 : at time 61127.0 ns WRITE: Bank = 3 Row = 855, Col = 75, Data = 5ccb93b9
|
|
# Status: Burst-No: 3 Write Address: 00357d22 WriteData: 5ccb93b9
|
|
# tb_core.u_sdram32 : at time 61137.0 ns WRITE: Bank = 3 Row = 855, Col = 76, Data = 3638136c
|
|
# Status: Burst-No: 4 Write Address: 00357d22 WriteData: 3638136c
|
|
# tb_core.u_sdram32 : at time 61147.0 ns WRITE: Bank = 3 Row = 855, Col = 77, Data = 544fbfa8
|
|
# Status: Burst-No: 5 Write Address: 00357d22 WriteData: 544fbfa8
|
|
# tb_core.u_sdram32 : at time 61157.0 ns WRITE: Bank = 3 Row = 855, Col = 78, Data = 4d27799a
|
|
# Status: Burst-No: 6 Write Address: 00357d22 WriteData: 4d27799a
|
|
# tb_core.u_sdram32 : at time 61167.0 ns WRITE: Bank = 3 Row = 855, Col = 79, Data = 41031982
|
|
# Status: Burst-No: 7 Write Address: 00357d22 WriteData: 41031982
|
|
# tb_core.u_sdram32 : at time 61177.0 ns WRITE: Bank = 3 Row = 855, Col = 80, Data = 4eee339d
|
|
# Status: Burst-No: 8 Write Address: 00357d22 WriteData: 4eee339d
|
|
# tb_core.u_sdram32 : at time 61187.0 ns WRITE: Bank = 3 Row = 855, Col = 81, Data = 7e4a0ffc
|
|
# Status: Burst-No: 9 Write Address: 00357d22 WriteData: 7e4a0ffc
|
|
# tb_core.u_sdram32 : at time 61197.0 ns WRITE: Bank = 3 Row = 855, Col = 82, Data = efebd4df
|
|
# Status: Burst-No: 10 Write Address: 00357d22 WriteData: efebd4df
|
|
# tb_core.u_sdram32 : at time 61207.0 ns WRITE: Bank = 3 Row = 855, Col = 83, Data = ecc6d4d9
|
|
# Status: Burst-No: 11 Write Address: 00357d22 WriteData: ecc6d4d9
|
|
# tb_core.u_sdram32 : at time 61217.0 ns WRITE: Bank = 3 Row = 855, Col = 84, Data = 8658500c
|
|
# Status: Burst-No: 12 Write Address: 00357d22 WriteData: 8658500c
|
|
# tb_core.u_sdram32 : at time 61227.0 ns WRITE: Bank = 3 Row = 855, Col = 85, Data = 600951c0
|
|
# Status: Burst-No: 13 Write Address: 00357d22 WriteData: 600951c0
|
|
# tb_core.u_sdram32 : at time 61237.0 ns WRITE: Bank = 3 Row = 855, Col = 86, Data = ae7a545c
|
|
# Status: Burst-No: 14 Write Address: 00357d22 WriteData: ae7a545c
|
|
# tb_core.u_sdram32 : at time 61247.0 ns WRITE: Bank = 3 Row = 855, Col = 87, Data = 40f9f181
|
|
# Status: Burst-No: 15 Write Address: 00357d22 WriteData: 40f9f181
|
|
# tb_core.u_sdram32 : at time 61257.0 ns WRITE: Bank = 3 Row = 855, Col = 88, Data = a79ca84f
|
|
# Status: Burst-No: 16 Write Address: 00357d22 WriteData: a79ca84f
|
|
# tb_core.u_sdram32 : at time 61267.0 ns WRITE: Bank = 3 Row = 855, Col = 89, Data = d43790a8
|
|
# Status: Burst-No: 17 Write Address: 00357d22 WriteData: d43790a8
|
|
# tb_core.u_sdram32 : at time 61277.0 ns WRITE: Bank = 3 Row = 855, Col = 90, Data = 519a95a3
|
|
# Status: Burst-No: 18 Write Address: 00357d22 WriteData: 519a95a3
|
|
# tb_core.u_sdram32 : at time 61287.0 ns WRITE: Bank = 3 Row = 855, Col = 91, Data = c4605888
|
|
# Status: Burst-No: 19 Write Address: 00357d22 WriteData: c4605888
|
|
# tb_core.u_sdram32 : at time 61297.0 ns WRITE: Bank = 3 Row = 855, Col = 92, Data = 7c9b37f9
|
|
# Status: Burst-No: 20 Write Address: 00357d22 WriteData: 7c9b37f9
|
|
# tb_core.u_sdram32 : at time 61307.0 ns WRITE: Bank = 3 Row = 855, Col = 93, Data = defd9cbd
|
|
# Status: Burst-No: 21 Write Address: 00357d22 WriteData: defd9cbd
|
|
# tb_core.u_sdram32 : at time 61317.0 ns WRITE: Bank = 3 Row = 855, Col = 94, Data = 0c53ef18
|
|
# Status: Burst-No: 22 Write Address: 00357d22 WriteData: 0c53ef18
|
|
# tb_core.u_sdram32 : at time 61327.0 ns WRITE: Bank = 3 Row = 855, Col = 95, Data = 0f8abb1f
|
|
# Status: Burst-No: 23 Write Address: 00357d22 WriteData: 0f8abb1f
|
|
# tb_core.u_sdram32 : at time 61337.0 ns WRITE: Bank = 3 Row = 855, Col = 96, Data = 35e9b76b
|
|
# Status: Burst-No: 24 Write Address: 00357d22 WriteData: 35e9b76b
|
|
# tb_core.u_sdram32 : at time 61347.0 ns WRITE: Bank = 3 Row = 855, Col = 97, Data = becefe7d
|
|
# Status: Burst-No: 25 Write Address: 00357d22 WriteData: becefe7d
|
|
# tb_core.u_sdram32 : at time 61357.0 ns WRITE: Bank = 3 Row = 855, Col = 98, Data = 4b498396
|
|
# Status: Burst-No: 26 Write Address: 00357d22 WriteData: 4b498396
|
|
# tb_core.u_sdram32 : at time 61367.0 ns WRITE: Bank = 3 Row = 855, Col = 99, Data = 8582800b
|
|
# Status: Burst-No: 27 Write Address: 00357d22 WriteData: 8582800b
|
|
# tb_core.u_sdram32 : at time 61377.0 ns WRITE: Bank = 3 Row = 855, Col = 100, Data = 088fa311
|
|
# Status: Burst-No: 28 Write Address: 00357d22 WriteData: 088fa311
|
|
# tb_core.u_sdram32 : at time 61387.0 ns WRITE: Bank = 3 Row = 855, Col = 101, Data = c7f6028f
|
|
# Status: Burst-No: 29 Write Address: 00357d22 WriteData: c7f6028f
|
|
# tb_core.u_sdram32 : at time 61397.0 ns WRITE: Bank = 3 Row = 855, Col = 102, Data = 9fd6283f
|
|
# Status: Burst-No: 30 Write Address: 00357d22 WriteData: 9fd6283f
|
|
# tb_core.u_sdram32 : at time 61407.0 ns WRITE: Bank = 3 Row = 855, Col = 103, Data = 0535d70a
|
|
# Status: Burst-No: 31 Write Address: 00357d22 WriteData: 0535d70a
|
|
# tb_core.u_sdram32 : at time 61417.0 ns WRITE: Bank = 3 Row = 855, Col = 104, Data = bd823a7b
|
|
# Status: Burst-No: 32 Write Address: 00357d22 WriteData: bd823a7b
|
|
# tb_core.u_sdram32 : at time 61427.0 ns WRITE: Bank = 3 Row = 855, Col = 105, Data = 96dfb62d
|
|
# Status: Burst-No: 33 Write Address: 00357d22 WriteData: 96dfb62d
|
|
# tb_core.u_sdram32 : at time 61437.0 ns WRITE: Bank = 3 Row = 855, Col = 106, Data = e2e87ec5
|
|
# Status: Burst-No: 34 Write Address: 00357d22 WriteData: e2e87ec5
|
|
# tb_core.u_sdram32 : at time 61447.0 ns WRITE: Bank = 3 Row = 855, Col = 107, Data = ffa3aaff
|
|
# Status: Burst-No: 35 Write Address: 00357d22 WriteData: ffa3aaff
|
|
# tb_core.u_sdram32 : at time 61457.0 ns WRITE: Bank = 3 Row = 855, Col = 108, Data = aee0765d
|
|
# Status: Burst-No: 36 Write Address: 00357d22 WriteData: aee0765d
|
|
# tb_core.u_sdram32 : at time 61467.0 ns WRITE: Bank = 3 Row = 855, Col = 109, Data = e527e6ca
|
|
# Status: Burst-No: 37 Write Address: 00357d22 WriteData: e527e6ca
|
|
# tb_core.u_sdram32 : at time 61477.0 ns WRITE: Bank = 3 Row = 855, Col = 110, Data = 6b9ee1d7
|
|
# Status: Burst-No: 38 Write Address: 00357d22 WriteData: 6b9ee1d7
|
|
# tb_core.u_sdram32 : at time 61487.0 ns WRITE: Bank = 3 Row = 855, Col = 111, Data = 1ec7a73d
|
|
# Status: Burst-No: 39 Write Address: 00357d22 WriteData: 1ec7a73d
|
|
# tb_core.u_sdram32 : at time 61497.0 ns WRITE: Bank = 3 Row = 855, Col = 112, Data = 6eef15dd
|
|
# Status: Burst-No: 40 Write Address: 00357d22 WriteData: 6eef15dd
|
|
# tb_core.u_sdram32 : at time 61507.0 ns WRITE: Bank = 3 Row = 855, Col = 113, Data = 0d651b1a
|
|
# Status: Burst-No: 41 Write Address: 00357d22 WriteData: 0d651b1a
|
|
# tb_core.u_sdram32 : at time 61517.0 ns WRITE: Bank = 3 Row = 855, Col = 114, Data = f5a36aeb
|
|
# Status: Burst-No: 42 Write Address: 00357d22 WriteData: f5a36aeb
|
|
# tb_core.u_sdram32 : at time 61527.0 ns WRITE: Bank = 3 Row = 855, Col = 115, Data = 694639d2
|
|
# Status: Burst-No: 43 Write Address: 00357d22 WriteData: 694639d2
|
|
# tb_core.u_sdram32 : at time 61537.0 ns WRITE: Bank = 3 Row = 855, Col = 116, Data = 14d49329
|
|
# Status: Burst-No: 44 Write Address: 00357d22 WriteData: 14d49329
|
|
# tb_core.u_sdram32 : at time 61547.0 ns WRITE: Bank = 3 Row = 855, Col = 117, Data = 09b4a313
|
|
# Status: Burst-No: 45 Write Address: 00357d22 WriteData: 09b4a313
|
|
# tb_core.u_sdram32 : at time 61557.0 ns WRITE: Bank = 3 Row = 855, Col = 118, Data = 9347f826
|
|
# Status: Burst-No: 46 Write Address: 00357d22 WriteData: 9347f826
|
|
# tb_core.u_sdram32 : at time 61567.0 ns WRITE: Bank = 3 Row = 855, Col = 119, Data = 8ed88a1d
|
|
# Status: Burst-No: 47 Write Address: 00357d22 WriteData: 8ed88a1d
|
|
# tb_core.u_sdram32 : at time 61577.0 ns WRITE: Bank = 3 Row = 855, Col = 120, Data = eb1528d6
|
|
# Status: Burst-No: 48 Write Address: 00357d22 WriteData: eb1528d6
|
|
# tb_core.u_sdram32 : at time 61587.0 ns WRITE: Bank = 3 Row = 855, Col = 121, Data = 79068bf2
|
|
# Status: Burst-No: 49 Write Address: 00357d22 WriteData: 79068bf2
|
|
# tb_core.u_sdram32 : at time 61597.0 ns WRITE: Bank = 3 Row = 855, Col = 122, Data = c762268e
|
|
# Status: Burst-No: 50 Write Address: 00357d22 WriteData: c762268e
|
|
# tb_core.u_sdram32 : at time 61607.0 ns WRITE: Bank = 3 Row = 855, Col = 123, Data = c9788892
|
|
# Status: Burst-No: 51 Write Address: 00357d22 WriteData: c9788892
|
|
# tb_core.u_sdram32 : at time 61617.0 ns BST : Burst Terminate
|
|
# Write Address: 000ed2f7, Burst Size: 47
|
|
# tb_core.u_sdram32 : at time 61757.0 ns ACT : Bank = 0 Row = 237
|
|
# tb_core.u_sdram32 : at time 61787.0 ns WRITE: Bank = 0 Row = 237, Col = 189, Data = a2e74e45
|
|
# Status: Burst-No: 0 Write Address: 000ed2f7 WriteData: a2e74e45
|
|
# tb_core.u_sdram32 : at time 61797.0 ns WRITE: Bank = 0 Row = 237, Col = 190, Data = 7f4ce1fe
|
|
# Status: Burst-No: 1 Write Address: 000ed2f7 WriteData: 7f4ce1fe
|
|
# tb_core.u_sdram32 : at time 61807.0 ns WRITE: Bank = 0 Row = 237, Col = 191, Data = b6b5506d
|
|
# Status: Burst-No: 2 Write Address: 000ed2f7 WriteData: b6b5506d
|
|
# tb_core.u_sdram32 : at time 61817.0 ns WRITE: Bank = 0 Row = 237, Col = 192, Data = d39764a7
|
|
# Status: Burst-No: 3 Write Address: 000ed2f7 WriteData: d39764a7
|
|
# tb_core.u_sdram32 : at time 61827.0 ns WRITE: Bank = 0 Row = 237, Col = 193, Data = 82489004
|
|
# Status: Burst-No: 4 Write Address: 000ed2f7 WriteData: 82489004
|
|
# tb_core.u_sdram32 : at time 61837.0 ns WRITE: Bank = 0 Row = 237, Col = 194, Data = 9154fc22
|
|
# Status: Burst-No: 5 Write Address: 000ed2f7 WriteData: 9154fc22
|
|
# tb_core.u_sdram32 : at time 61847.0 ns WRITE: Bank = 0 Row = 237, Col = 195, Data = acce1c59
|
|
# Status: Burst-No: 6 Write Address: 000ed2f7 WriteData: acce1c59
|
|
# tb_core.u_sdram32 : at time 61857.0 ns WRITE: Bank = 0 Row = 237, Col = 196, Data = f3002ee6
|
|
# Status: Burst-No: 7 Write Address: 000ed2f7 WriteData: f3002ee6
|
|
# tb_core.u_sdram32 : at time 61867.0 ns WRITE: Bank = 0 Row = 237, Col = 197, Data = c68ec48d
|
|
# Status: Burst-No: 8 Write Address: 000ed2f7 WriteData: c68ec48d
|
|
# tb_core.u_sdram32 : at time 61877.0 ns WRITE: Bank = 0 Row = 237, Col = 198, Data = 02d50905
|
|
# Status: Burst-No: 9 Write Address: 000ed2f7 WriteData: 02d50905
|
|
# tb_core.u_sdram32 : at time 61887.0 ns WRITE: Bank = 0 Row = 237, Col = 199, Data = 1dec713b
|
|
# Status: Burst-No: 10 Write Address: 000ed2f7 WriteData: 1dec713b
|
|
# tb_core.u_sdram32 : at time 61897.0 ns WRITE: Bank = 0 Row = 237, Col = 200, Data = 679709cf
|
|
# Status: Burst-No: 11 Write Address: 000ed2f7 WriteData: 679709cf
|
|
# tb_core.u_sdram32 : at time 61907.0 ns WRITE: Bank = 0 Row = 237, Col = 201, Data = a636884c
|
|
# Status: Burst-No: 12 Write Address: 000ed2f7 WriteData: a636884c
|
|
# tb_core.u_sdram32 : at time 61917.0 ns WRITE: Bank = 0 Row = 237, Col = 202, Data = 6581f3cb
|
|
# Status: Burst-No: 13 Write Address: 000ed2f7 WriteData: 6581f3cb
|
|
# tb_core.u_sdram32 : at time 61927.0 ns WRITE: Bank = 0 Row = 237, Col = 203, Data = d3ed4ca7
|
|
# Status: Burst-No: 14 Write Address: 000ed2f7 WriteData: d3ed4ca7
|
|
# tb_core.u_sdram32 : at time 61937.0 ns WRITE: Bank = 0 Row = 237, Col = 204, Data = 0c1dbd18
|
|
# Status: Burst-No: 15 Write Address: 000ed2f7 WriteData: 0c1dbd18
|
|
# tb_core.u_sdram32 : at time 61947.0 ns WRITE: Bank = 0 Row = 237, Col = 205, Data = f1cc38e3
|
|
# Status: Burst-No: 16 Write Address: 000ed2f7 WriteData: f1cc38e3
|
|
# tb_core.u_sdram32 : at time 61957.0 ns WRITE: Bank = 0 Row = 237, Col = 206, Data = 366d676c
|
|
# Status: Burst-No: 17 Write Address: 000ed2f7 WriteData: 366d676c
|
|
# tb_core.u_sdram32 : at time 61967.0 ns WRITE: Bank = 0 Row = 237, Col = 207, Data = 87b3680f
|
|
# Status: Burst-No: 18 Write Address: 000ed2f7 WriteData: 87b3680f
|
|
# tb_core.u_sdram32 : at time 61977.0 ns WRITE: Bank = 0 Row = 237, Col = 208, Data = 2db0d95b
|
|
# Status: Burst-No: 19 Write Address: 000ed2f7 WriteData: 2db0d95b
|
|
# tb_core.u_sdram32 : at time 61987.0 ns WRITE: Bank = 0 Row = 237, Col = 209, Data = 6847f1d0
|
|
# Status: Burst-No: 20 Write Address: 000ed2f7 WriteData: 6847f1d0
|
|
# tb_core.u_sdram32 : at time 61997.0 ns WRITE: Bank = 0 Row = 237, Col = 210, Data = 17b1cd2f
|
|
# Status: Burst-No: 21 Write Address: 000ed2f7 WriteData: 17b1cd2f
|
|
# tb_core.u_sdram32 : at time 62007.0 ns WRITE: Bank = 0 Row = 237, Col = 211, Data = cbe34297
|
|
# Status: Burst-No: 22 Write Address: 000ed2f7 WriteData: cbe34297
|
|
# tb_core.u_sdram32 : at time 62017.0 ns WRITE: Bank = 0 Row = 237, Col = 212, Data = 1053a720
|
|
# Status: Burst-No: 23 Write Address: 000ed2f7 WriteData: 1053a720
|
|
# tb_core.u_sdram32 : at time 62027.0 ns WRITE: Bank = 0 Row = 237, Col = 213, Data = f7298cee
|
|
# Status: Burst-No: 24 Write Address: 000ed2f7 WriteData: f7298cee
|
|
# tb_core.u_sdram32 : at time 62037.0 ns WRITE: Bank = 0 Row = 237, Col = 214, Data = 92de5425
|
|
# Status: Burst-No: 25 Write Address: 000ed2f7 WriteData: 92de5425
|
|
# tb_core.u_sdram32 : at time 62047.0 ns WRITE: Bank = 0 Row = 237, Col = 215, Data = 395f1772
|
|
# Status: Burst-No: 26 Write Address: 000ed2f7 WriteData: 395f1772
|
|
# tb_core.u_sdram32 : at time 62057.0 ns WRITE: Bank = 0 Row = 237, Col = 216, Data = da3c32b4
|
|
# Status: Burst-No: 27 Write Address: 000ed2f7 WriteData: da3c32b4
|
|
# tb_core.u_sdram32 : at time 62067.0 ns WRITE: Bank = 0 Row = 237, Col = 217, Data = 0254a704
|
|
# Status: Burst-No: 28 Write Address: 000ed2f7 WriteData: 0254a704
|
|
# tb_core.u_sdram32 : at time 62077.0 ns WRITE: Bank = 0 Row = 237, Col = 218, Data = d022e8a0
|
|
# Status: Burst-No: 29 Write Address: 000ed2f7 WriteData: d022e8a0
|
|
# tb_core.u_sdram32 : at time 62087.0 ns WRITE: Bank = 0 Row = 237, Col = 219, Data = 5982e1b3
|
|
# Status: Burst-No: 30 Write Address: 000ed2f7 WriteData: 5982e1b3
|
|
# tb_core.u_sdram32 : at time 62097.0 ns WRITE: Bank = 0 Row = 237, Col = 220, Data = 31df4b63
|
|
# Status: Burst-No: 31 Write Address: 000ed2f7 WriteData: 31df4b63
|
|
# tb_core.u_sdram32 : at time 62107.0 ns WRITE: Bank = 0 Row = 237, Col = 221, Data = 8fac9e1f
|
|
# Status: Burst-No: 32 Write Address: 000ed2f7 WriteData: 8fac9e1f
|
|
# tb_core.u_sdram32 : at time 62117.0 ns WRITE: Bank = 0 Row = 237, Col = 222, Data = 6e3c37dc
|
|
# Status: Burst-No: 33 Write Address: 000ed2f7 WriteData: 6e3c37dc
|
|
# tb_core.u_sdram32 : at time 62127.0 ns WRITE: Bank = 0 Row = 237, Col = 223, Data = 8a205c14
|
|
# Status: Burst-No: 34 Write Address: 000ed2f7 WriteData: 8a205c14
|
|
# tb_core.u_sdram32 : at time 62137.0 ns WRITE: Bank = 0 Row = 237, Col = 224, Data = 9abc7835
|
|
# Status: Burst-No: 35 Write Address: 000ed2f7 WriteData: 9abc7835
|
|
# tb_core.u_sdram32 : at time 62147.0 ns WRITE: Bank = 0 Row = 237, Col = 225, Data = f2708ce4
|
|
# Status: Burst-No: 36 Write Address: 000ed2f7 WriteData: f2708ce4
|
|
# tb_core.u_sdram32 : at time 62157.0 ns WRITE: Bank = 0 Row = 237, Col = 226, Data = 671fa9ce
|
|
# Status: Burst-No: 37 Write Address: 000ed2f7 WriteData: 671fa9ce
|
|
# tb_core.u_sdram32 : at time 62167.0 ns WRITE: Bank = 0 Row = 237, Col = 227, Data = d73b04ae
|
|
# Status: Burst-No: 38 Write Address: 000ed2f7 WriteData: d73b04ae
|
|
# tb_core.u_sdram32 : at time 62177.0 ns WRITE: Bank = 0 Row = 237, Col = 228, Data = 5cea0bb9
|
|
# Status: Burst-No: 39 Write Address: 000ed2f7 WriteData: 5cea0bb9
|
|
# tb_core.u_sdram32 : at time 62187.0 ns WRITE: Bank = 0 Row = 237, Col = 229, Data = 525751a4
|
|
# Status: Burst-No: 40 Write Address: 000ed2f7 WriteData: 525751a4
|
|
# tb_core.u_sdram32 : at time 62197.0 ns WRITE: Bank = 0 Row = 237, Col = 230, Data = ad676c5a
|
|
# Status: Burst-No: 41 Write Address: 000ed2f7 WriteData: ad676c5a
|
|
# tb_core.u_sdram32 : at time 62207.0 ns WRITE: Bank = 0 Row = 237, Col = 231, Data = 8684180d
|
|
# Status: Burst-No: 42 Write Address: 000ed2f7 WriteData: 8684180d
|
|
# tb_core.u_sdram32 : at time 62217.0 ns WRITE: Bank = 0 Row = 237, Col = 232, Data = 83610a06
|
|
# Status: Burst-No: 43 Write Address: 000ed2f7 WriteData: 83610a06
|
|
# tb_core.u_sdram32 : at time 62227.0 ns WRITE: Bank = 0 Row = 237, Col = 233, Data = 2a6b8354
|
|
# Status: Burst-No: 44 Write Address: 000ed2f7 WriteData: 2a6b8354
|
|
# tb_core.u_sdram32 : at time 62237.0 ns WRITE: Bank = 0 Row = 237, Col = 234, Data = ee7e6adc
|
|
# Status: Burst-No: 45 Write Address: 000ed2f7 WriteData: ee7e6adc
|
|
# tb_core.u_sdram32 : at time 62247.0 ns WRITE: Bank = 0 Row = 237, Col = 235, Data = d09690a1
|
|
# Status: Burst-No: 46 Write Address: 000ed2f7 WriteData: d09690a1
|
|
# tb_core.u_sdram32 : at time 62257.0 ns BST : Burst Terminate
|
|
# tb_core.u_sdram32 : at time 62393.0 ns READ : Bank = 3 Row = 855, Col = 72, Data = 418d7383
|
|
# tb_core.u_sdram32 : at time 62403.0 ns READ : Bank = 3 Row = 855, Col = 73, Data = 1ee3173d
|
|
# READ STATUS: Burst-No: 0 Addr: 00357d22 Rxd: 418d7383
|
|
# tb_core.u_sdram32 : at time 62413.0 ns READ : Bank = 3 Row = 855, Col = 74, Data = 580965b0
|
|
# READ STATUS: Burst-No: 1 Addr: 00357d24 Rxd: 1ee3173d
|
|
# tb_core.u_sdram32 : at time 62423.0 ns READ : Bank = 3 Row = 855, Col = 75, Data = 5ccb93b9
|
|
# READ STATUS: Burst-No: 2 Addr: 00357d26 Rxd: 580965b0
|
|
# tb_core.u_sdram32 : at time 62433.0 ns READ : Bank = 3 Row = 855, Col = 76, Data = 3638136c
|
|
# READ STATUS: Burst-No: 3 Addr: 00357d28 Rxd: 5ccb93b9
|
|
# tb_core.u_sdram32 : at time 62443.0 ns READ : Bank = 3 Row = 855, Col = 77, Data = 544fbfa8
|
|
# READ STATUS: Burst-No: 4 Addr: 00357d2a Rxd: 3638136c
|
|
# tb_core.u_sdram32 : at time 62453.0 ns READ : Bank = 3 Row = 855, Col = 78, Data = 4d27799a
|
|
# READ STATUS: Burst-No: 5 Addr: 00357d2c Rxd: 544fbfa8
|
|
# tb_core.u_sdram32 : at time 62463.0 ns READ : Bank = 3 Row = 855, Col = 79, Data = 41031982
|
|
# READ STATUS: Burst-No: 6 Addr: 00357d2e Rxd: 4d27799a
|
|
# tb_core.u_sdram32 : at time 62473.0 ns READ : Bank = 3 Row = 855, Col = 80, Data = 4eee339d
|
|
# READ STATUS: Burst-No: 7 Addr: 00357d30 Rxd: 41031982
|
|
# tb_core.u_sdram32 : at time 62483.0 ns READ : Bank = 3 Row = 855, Col = 81, Data = 7e4a0ffc
|
|
# READ STATUS: Burst-No: 8 Addr: 00357d32 Rxd: 4eee339d
|
|
# tb_core.u_sdram32 : at time 62493.0 ns READ : Bank = 3 Row = 855, Col = 82, Data = efebd4df
|
|
# READ STATUS: Burst-No: 9 Addr: 00357d34 Rxd: 7e4a0ffc
|
|
# tb_core.u_sdram32 : at time 62503.0 ns READ : Bank = 3 Row = 855, Col = 83, Data = ecc6d4d9
|
|
# READ STATUS: Burst-No: 10 Addr: 00357d36 Rxd: efebd4df
|
|
# tb_core.u_sdram32 : at time 62513.0 ns READ : Bank = 3 Row = 855, Col = 84, Data = 8658500c
|
|
# READ STATUS: Burst-No: 11 Addr: 00357d38 Rxd: ecc6d4d9
|
|
# tb_core.u_sdram32 : at time 62523.0 ns READ : Bank = 3 Row = 855, Col = 85, Data = 600951c0
|
|
# READ STATUS: Burst-No: 12 Addr: 00357d3a Rxd: 8658500c
|
|
# tb_core.u_sdram32 : at time 62533.0 ns READ : Bank = 3 Row = 855, Col = 86, Data = ae7a545c
|
|
# READ STATUS: Burst-No: 13 Addr: 00357d3c Rxd: 600951c0
|
|
# tb_core.u_sdram32 : at time 62543.0 ns READ : Bank = 3 Row = 855, Col = 87, Data = 40f9f181
|
|
# READ STATUS: Burst-No: 14 Addr: 00357d3e Rxd: ae7a545c
|
|
# tb_core.u_sdram32 : at time 62553.0 ns READ : Bank = 3 Row = 855, Col = 88, Data = a79ca84f
|
|
# READ STATUS: Burst-No: 15 Addr: 00357d40 Rxd: 40f9f181
|
|
# tb_core.u_sdram32 : at time 62563.0 ns READ : Bank = 3 Row = 855, Col = 89, Data = d43790a8
|
|
# READ STATUS: Burst-No: 16 Addr: 00357d42 Rxd: a79ca84f
|
|
# tb_core.u_sdram32 : at time 62573.0 ns READ : Bank = 3 Row = 855, Col = 90, Data = 519a95a3
|
|
# READ STATUS: Burst-No: 17 Addr: 00357d44 Rxd: d43790a8
|
|
# tb_core.u_sdram32 : at time 62583.0 ns READ : Bank = 3 Row = 855, Col = 91, Data = c4605888
|
|
# READ STATUS: Burst-No: 18 Addr: 00357d46 Rxd: 519a95a3
|
|
# tb_core.u_sdram32 : at time 62593.0 ns READ : Bank = 3 Row = 855, Col = 92, Data = 7c9b37f9
|
|
# READ STATUS: Burst-No: 19 Addr: 00357d48 Rxd: c4605888
|
|
# tb_core.u_sdram32 : at time 62603.0 ns READ : Bank = 3 Row = 855, Col = 93, Data = defd9cbd
|
|
# READ STATUS: Burst-No: 20 Addr: 00357d4a Rxd: 7c9b37f9
|
|
# tb_core.u_sdram32 : at time 62613.0 ns READ : Bank = 3 Row = 855, Col = 94, Data = 0c53ef18
|
|
# READ STATUS: Burst-No: 21 Addr: 00357d4c Rxd: defd9cbd
|
|
# tb_core.u_sdram32 : at time 62623.0 ns READ : Bank = 3 Row = 855, Col = 95, Data = 0f8abb1f
|
|
# READ STATUS: Burst-No: 22 Addr: 00357d4e Rxd: 0c53ef18
|
|
# tb_core.u_sdram32 : at time 62633.0 ns READ : Bank = 3 Row = 855, Col = 96, Data = 35e9b76b
|
|
# READ STATUS: Burst-No: 23 Addr: 00357d50 Rxd: 0f8abb1f
|
|
# tb_core.u_sdram32 : at time 62643.0 ns READ : Bank = 3 Row = 855, Col = 97, Data = becefe7d
|
|
# READ STATUS: Burst-No: 24 Addr: 00357d52 Rxd: 35e9b76b
|
|
# tb_core.u_sdram32 : at time 62653.0 ns READ : Bank = 3 Row = 855, Col = 98, Data = 4b498396
|
|
# READ STATUS: Burst-No: 25 Addr: 00357d54 Rxd: becefe7d
|
|
# tb_core.u_sdram32 : at time 62663.0 ns READ : Bank = 3 Row = 855, Col = 99, Data = 8582800b
|
|
# READ STATUS: Burst-No: 26 Addr: 00357d56 Rxd: 4b498396
|
|
# tb_core.u_sdram32 : at time 62673.0 ns READ : Bank = 3 Row = 855, Col = 100, Data = 088fa311
|
|
# READ STATUS: Burst-No: 27 Addr: 00357d58 Rxd: 8582800b
|
|
# tb_core.u_sdram32 : at time 62683.0 ns READ : Bank = 3 Row = 855, Col = 101, Data = c7f6028f
|
|
# READ STATUS: Burst-No: 28 Addr: 00357d5a Rxd: 088fa311
|
|
# tb_core.u_sdram32 : at time 62693.0 ns READ : Bank = 3 Row = 855, Col = 102, Data = 9fd6283f
|
|
# READ STATUS: Burst-No: 29 Addr: 00357d5c Rxd: c7f6028f
|
|
# tb_core.u_sdram32 : at time 62703.0 ns READ : Bank = 3 Row = 855, Col = 103, Data = 0535d70a
|
|
# READ STATUS: Burst-No: 30 Addr: 00357d5e Rxd: 9fd6283f
|
|
# tb_core.u_sdram32 : at time 62713.0 ns READ : Bank = 3 Row = 855, Col = 104, Data = bd823a7b
|
|
# READ STATUS: Burst-No: 31 Addr: 00357d60 Rxd: 0535d70a
|
|
# tb_core.u_sdram32 : at time 62723.0 ns READ : Bank = 3 Row = 855, Col = 105, Data = 96dfb62d
|
|
# READ STATUS: Burst-No: 32 Addr: 00357d62 Rxd: bd823a7b
|
|
# tb_core.u_sdram32 : at time 62733.0 ns READ : Bank = 3 Row = 855, Col = 106, Data = e2e87ec5
|
|
# READ STATUS: Burst-No: 33 Addr: 00357d64 Rxd: 96dfb62d
|
|
# tb_core.u_sdram32 : at time 62743.0 ns READ : Bank = 3 Row = 855, Col = 107, Data = ffa3aaff
|
|
# READ STATUS: Burst-No: 34 Addr: 00357d66 Rxd: e2e87ec5
|
|
# tb_core.u_sdram32 : at time 62753.0 ns READ : Bank = 3 Row = 855, Col = 108, Data = aee0765d
|
|
# READ STATUS: Burst-No: 35 Addr: 00357d68 Rxd: ffa3aaff
|
|
# tb_core.u_sdram32 : at time 62763.0 ns READ : Bank = 3 Row = 855, Col = 109, Data = e527e6ca
|
|
# READ STATUS: Burst-No: 36 Addr: 00357d6a Rxd: aee0765d
|
|
# tb_core.u_sdram32 : at time 62773.0 ns READ : Bank = 3 Row = 855, Col = 110, Data = 6b9ee1d7
|
|
# READ STATUS: Burst-No: 37 Addr: 00357d6c Rxd: e527e6ca
|
|
# tb_core.u_sdram32 : at time 62783.0 ns READ : Bank = 3 Row = 855, Col = 111, Data = 1ec7a73d
|
|
# READ STATUS: Burst-No: 38 Addr: 00357d6e Rxd: 6b9ee1d7
|
|
# tb_core.u_sdram32 : at time 62793.0 ns READ : Bank = 3 Row = 855, Col = 112, Data = 6eef15dd
|
|
# READ STATUS: Burst-No: 39 Addr: 00357d70 Rxd: 1ec7a73d
|
|
# tb_core.u_sdram32 : at time 62803.0 ns READ : Bank = 3 Row = 855, Col = 113, Data = 0d651b1a
|
|
# READ STATUS: Burst-No: 40 Addr: 00357d72 Rxd: 6eef15dd
|
|
# tb_core.u_sdram32 : at time 62813.0 ns READ : Bank = 3 Row = 855, Col = 114, Data = f5a36aeb
|
|
# READ STATUS: Burst-No: 41 Addr: 00357d74 Rxd: 0d651b1a
|
|
# tb_core.u_sdram32 : at time 62823.0 ns READ : Bank = 3 Row = 855, Col = 115, Data = 694639d2
|
|
# READ STATUS: Burst-No: 42 Addr: 00357d76 Rxd: f5a36aeb
|
|
# tb_core.u_sdram32 : at time 62833.0 ns READ : Bank = 3 Row = 855, Col = 116, Data = 14d49329
|
|
# READ STATUS: Burst-No: 43 Addr: 00357d78 Rxd: 694639d2
|
|
# tb_core.u_sdram32 : at time 62843.0 ns READ : Bank = 3 Row = 855, Col = 117, Data = 09b4a313
|
|
# READ STATUS: Burst-No: 44 Addr: 00357d7a Rxd: 14d49329
|
|
# tb_core.u_sdram32 : at time 62853.0 ns READ : Bank = 3 Row = 855, Col = 118, Data = 9347f826
|
|
# READ STATUS: Burst-No: 45 Addr: 00357d7c Rxd: 09b4a313
|
|
# tb_core.u_sdram32 : at time 62863.0 ns READ : Bank = 3 Row = 855, Col = 119, Data = 8ed88a1d
|
|
# READ STATUS: Burst-No: 46 Addr: 00357d7e Rxd: 9347f826
|
|
# tb_core.u_sdram32 : at time 62873.0 ns READ : Bank = 3 Row = 855, Col = 120, Data = eb1528d6
|
|
# READ STATUS: Burst-No: 47 Addr: 00357d80 Rxd: 8ed88a1d
|
|
# tb_core.u_sdram32 : at time 62883.0 ns READ : Bank = 3 Row = 855, Col = 121, Data = 79068bf2
|
|
# tb_core.u_sdram32 : at time 62887.0 ns BST : Burst Terminate
|
|
# READ STATUS: Burst-No: 48 Addr: 00357d82 Rxd: eb1528d6
|
|
# tb_core.u_sdram32 : at time 62893.0 ns READ : Bank = 3 Row = 855, Col = 122, Data = c762268e
|
|
# READ STATUS: Burst-No: 49 Addr: 00357d84 Rxd: 79068bf2
|
|
# tb_core.u_sdram32 : at time 62903.0 ns READ : Bank = 3 Row = 855, Col = 123, Data = c9788892
|
|
# READ STATUS: Burst-No: 50 Addr: 00357d86 Rxd: c762268e
|
|
# READ STATUS: Burst-No: 51 Addr: 00357d88 Rxd: c9788892
|
|
# tb_core.u_sdram32 : at time 63073.0 ns READ : Bank = 0 Row = 237, Col = 189, Data = a2e74e45
|
|
# tb_core.u_sdram32 : at time 63083.0 ns READ : Bank = 0 Row = 237, Col = 190, Data = 7f4ce1fe
|
|
# READ STATUS: Burst-No: 0 Addr: 000ed2f7 Rxd: a2e74e45
|
|
# tb_core.u_sdram32 : at time 63093.0 ns READ : Bank = 0 Row = 237, Col = 191, Data = b6b5506d
|
|
# READ STATUS: Burst-No: 1 Addr: 000ed2f9 Rxd: 7f4ce1fe
|
|
# tb_core.u_sdram32 : at time 63103.0 ns READ : Bank = 0 Row = 237, Col = 192, Data = d39764a7
|
|
# READ STATUS: Burst-No: 2 Addr: 000ed2fb Rxd: b6b5506d
|
|
# tb_core.u_sdram32 : at time 63113.0 ns READ : Bank = 0 Row = 237, Col = 193, Data = 82489004
|
|
# READ STATUS: Burst-No: 3 Addr: 000ed2fd Rxd: d39764a7
|
|
# tb_core.u_sdram32 : at time 63123.0 ns READ : Bank = 0 Row = 237, Col = 194, Data = 9154fc22
|
|
# READ STATUS: Burst-No: 4 Addr: 000ed2ff Rxd: 82489004
|
|
# tb_core.u_sdram32 : at time 63133.0 ns READ : Bank = 0 Row = 237, Col = 195, Data = acce1c59
|
|
# READ STATUS: Burst-No: 5 Addr: 000ed301 Rxd: 9154fc22
|
|
# tb_core.u_sdram32 : at time 63143.0 ns READ : Bank = 0 Row = 237, Col = 196, Data = f3002ee6
|
|
# READ STATUS: Burst-No: 6 Addr: 000ed303 Rxd: acce1c59
|
|
# tb_core.u_sdram32 : at time 63153.0 ns READ : Bank = 0 Row = 237, Col = 197, Data = c68ec48d
|
|
# READ STATUS: Burst-No: 7 Addr: 000ed305 Rxd: f3002ee6
|
|
# tb_core.u_sdram32 : at time 63163.0 ns READ : Bank = 0 Row = 237, Col = 198, Data = 02d50905
|
|
# READ STATUS: Burst-No: 8 Addr: 000ed307 Rxd: c68ec48d
|
|
# tb_core.u_sdram32 : at time 63173.0 ns READ : Bank = 0 Row = 237, Col = 199, Data = 1dec713b
|
|
# READ STATUS: Burst-No: 9 Addr: 000ed309 Rxd: 02d50905
|
|
# tb_core.u_sdram32 : at time 63183.0 ns READ : Bank = 0 Row = 237, Col = 200, Data = 679709cf
|
|
# READ STATUS: Burst-No: 10 Addr: 000ed30b Rxd: 1dec713b
|
|
# tb_core.u_sdram32 : at time 63193.0 ns READ : Bank = 0 Row = 237, Col = 201, Data = a636884c
|
|
# READ STATUS: Burst-No: 11 Addr: 000ed30d Rxd: 679709cf
|
|
# tb_core.u_sdram32 : at time 63203.0 ns READ : Bank = 0 Row = 237, Col = 202, Data = 6581f3cb
|
|
# READ STATUS: Burst-No: 12 Addr: 000ed30f Rxd: a636884c
|
|
# tb_core.u_sdram32 : at time 63213.0 ns READ : Bank = 0 Row = 237, Col = 203, Data = d3ed4ca7
|
|
# READ STATUS: Burst-No: 13 Addr: 000ed311 Rxd: 6581f3cb
|
|
# tb_core.u_sdram32 : at time 63223.0 ns READ : Bank = 0 Row = 237, Col = 204, Data = 0c1dbd18
|
|
# READ STATUS: Burst-No: 14 Addr: 000ed313 Rxd: d3ed4ca7
|
|
# tb_core.u_sdram32 : at time 63233.0 ns READ : Bank = 0 Row = 237, Col = 205, Data = f1cc38e3
|
|
# READ STATUS: Burst-No: 15 Addr: 000ed315 Rxd: 0c1dbd18
|
|
# tb_core.u_sdram32 : at time 63243.0 ns READ : Bank = 0 Row = 237, Col = 206, Data = 366d676c
|
|
# READ STATUS: Burst-No: 16 Addr: 000ed317 Rxd: f1cc38e3
|
|
# tb_core.u_sdram32 : at time 63253.0 ns READ : Bank = 0 Row = 237, Col = 207, Data = 87b3680f
|
|
# READ STATUS: Burst-No: 17 Addr: 000ed319 Rxd: 366d676c
|
|
# tb_core.u_sdram32 : at time 63263.0 ns READ : Bank = 0 Row = 237, Col = 208, Data = 2db0d95b
|
|
# READ STATUS: Burst-No: 18 Addr: 000ed31b Rxd: 87b3680f
|
|
# tb_core.u_sdram32 : at time 63273.0 ns READ : Bank = 0 Row = 237, Col = 209, Data = 6847f1d0
|
|
# READ STATUS: Burst-No: 19 Addr: 000ed31d Rxd: 2db0d95b
|
|
# tb_core.u_sdram32 : at time 63283.0 ns READ : Bank = 0 Row = 237, Col = 210, Data = 17b1cd2f
|
|
# READ STATUS: Burst-No: 20 Addr: 000ed31f Rxd: 6847f1d0
|
|
# tb_core.u_sdram32 : at time 63293.0 ns READ : Bank = 0 Row = 237, Col = 211, Data = cbe34297
|
|
# READ STATUS: Burst-No: 21 Addr: 000ed321 Rxd: 17b1cd2f
|
|
# tb_core.u_sdram32 : at time 63303.0 ns READ : Bank = 0 Row = 237, Col = 212, Data = 1053a720
|
|
# READ STATUS: Burst-No: 22 Addr: 000ed323 Rxd: cbe34297
|
|
# tb_core.u_sdram32 : at time 63313.0 ns READ : Bank = 0 Row = 237, Col = 213, Data = f7298cee
|
|
# READ STATUS: Burst-No: 23 Addr: 000ed325 Rxd: 1053a720
|
|
# tb_core.u_sdram32 : at time 63323.0 ns READ : Bank = 0 Row = 237, Col = 214, Data = 92de5425
|
|
# READ STATUS: Burst-No: 24 Addr: 000ed327 Rxd: f7298cee
|
|
# tb_core.u_sdram32 : at time 63333.0 ns READ : Bank = 0 Row = 237, Col = 215, Data = 395f1772
|
|
# READ STATUS: Burst-No: 25 Addr: 000ed329 Rxd: 92de5425
|
|
# tb_core.u_sdram32 : at time 63343.0 ns READ : Bank = 0 Row = 237, Col = 216, Data = da3c32b4
|
|
# READ STATUS: Burst-No: 26 Addr: 000ed32b Rxd: 395f1772
|
|
# tb_core.u_sdram32 : at time 63353.0 ns READ : Bank = 0 Row = 237, Col = 217, Data = 0254a704
|
|
# READ STATUS: Burst-No: 27 Addr: 000ed32d Rxd: da3c32b4
|
|
# tb_core.u_sdram32 : at time 63363.0 ns READ : Bank = 0 Row = 237, Col = 218, Data = d022e8a0
|
|
# READ STATUS: Burst-No: 28 Addr: 000ed32f Rxd: 0254a704
|
|
# tb_core.u_sdram32 : at time 63373.0 ns READ : Bank = 0 Row = 237, Col = 219, Data = 5982e1b3
|
|
# READ STATUS: Burst-No: 29 Addr: 000ed331 Rxd: d022e8a0
|
|
# tb_core.u_sdram32 : at time 63383.0 ns READ : Bank = 0 Row = 237, Col = 220, Data = 31df4b63
|
|
# READ STATUS: Burst-No: 30 Addr: 000ed333 Rxd: 5982e1b3
|
|
# tb_core.u_sdram32 : at time 63393.0 ns READ : Bank = 0 Row = 237, Col = 221, Data = 8fac9e1f
|
|
# READ STATUS: Burst-No: 31 Addr: 000ed335 Rxd: 31df4b63
|
|
# tb_core.u_sdram32 : at time 63403.0 ns READ : Bank = 0 Row = 237, Col = 222, Data = 6e3c37dc
|
|
# READ STATUS: Burst-No: 32 Addr: 000ed337 Rxd: 8fac9e1f
|
|
# tb_core.u_sdram32 : at time 63413.0 ns READ : Bank = 0 Row = 237, Col = 223, Data = 8a205c14
|
|
# READ STATUS: Burst-No: 33 Addr: 000ed339 Rxd: 6e3c37dc
|
|
# tb_core.u_sdram32 : at time 63423.0 ns READ : Bank = 0 Row = 237, Col = 224, Data = 9abc7835
|
|
# READ STATUS: Burst-No: 34 Addr: 000ed33b Rxd: 8a205c14
|
|
# tb_core.u_sdram32 : at time 63433.0 ns READ : Bank = 0 Row = 237, Col = 225, Data = f2708ce4
|
|
# READ STATUS: Burst-No: 35 Addr: 000ed33d Rxd: 9abc7835
|
|
# tb_core.u_sdram32 : at time 63443.0 ns READ : Bank = 0 Row = 237, Col = 226, Data = 671fa9ce
|
|
# READ STATUS: Burst-No: 36 Addr: 000ed33f Rxd: f2708ce4
|
|
# tb_core.u_sdram32 : at time 63453.0 ns READ : Bank = 0 Row = 237, Col = 227, Data = d73b04ae
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# READ STATUS: Burst-No: 37 Addr: 000ed341 Rxd: 671fa9ce
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# tb_core.u_sdram32 : at time 63463.0 ns READ : Bank = 0 Row = 237, Col = 228, Data = 5cea0bb9
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# READ STATUS: Burst-No: 38 Addr: 000ed343 Rxd: d73b04ae
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# tb_core.u_sdram32 : at time 63473.0 ns READ : Bank = 0 Row = 237, Col = 229, Data = 525751a4
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# READ STATUS: Burst-No: 39 Addr: 000ed345 Rxd: 5cea0bb9
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# tb_core.u_sdram32 : at time 63483.0 ns READ : Bank = 0 Row = 237, Col = 230, Data = ad676c5a
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# READ STATUS: Burst-No: 40 Addr: 000ed347 Rxd: 525751a4
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# tb_core.u_sdram32 : at time 63493.0 ns READ : Bank = 0 Row = 237, Col = 231, Data = 8684180d
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# READ STATUS: Burst-No: 41 Addr: 000ed349 Rxd: ad676c5a
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# tb_core.u_sdram32 : at time 63503.0 ns READ : Bank = 0 Row = 237, Col = 232, Data = 83610a06
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# READ STATUS: Burst-No: 42 Addr: 000ed34b Rxd: 8684180d
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# tb_core.u_sdram32 : at time 63513.0 ns READ : Bank = 0 Row = 237, Col = 233, Data = 2a6b8354
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# tb_core.u_sdram32 : at time 63517.0 ns BST : Burst Terminate
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# READ STATUS: Burst-No: 43 Addr: 000ed34d Rxd: 83610a06
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# tb_core.u_sdram32 : at time 63523.0 ns READ : Bank = 0 Row = 237, Col = 234, Data = ee7e6adc
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# READ STATUS: Burst-No: 44 Addr: 000ed34f Rxd: 2a6b8354
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# tb_core.u_sdram32 : at time 63533.0 ns READ : Bank = 0 Row = 237, Col = 235, Data = d09690a1
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# READ STATUS: Burst-No: 45 Addr: 000ed351 Rxd: ee7e6adc
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# READ STATUS: Burst-No: 46 Addr: 000ed353 Rxd: d09690a1
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# tb_core.u_sdram32 : at time 71837.0 ns AREF : Auto Refresh
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# tb_core.u_sdram32 : at time 71927.0 ns AREF : Auto Refresh
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# tb_core.u_sdram32 : at time 72017.0 ns AREF : Auto Refresh
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|
# tb_core.u_sdram32 : at time 72107.0 ns AREF : Auto Refresh
|
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# tb_core.u_sdram32 : at time 72197.0 ns AREF : Auto Refresh
|
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# tb_core.u_sdram32 : at time 72287.0 ns AREF : Auto Refresh
|
|
###############################
|
###############################
|
# STATUS: SDRAM Write/Read TEST PASSED
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# STATUS: SDRAM Write/Read TEST PASSED
|
###############################
|
###############################
|
# ** Note: $finish : ../tb/tb_core.sv(383)
|
# ** Note: $finish : ../tb/tb_core.sv(382)
|
# Time: 73660 ns Iteration: 0 Instance: /tb_core
|
# Time: 23570 ns Iteration: 0 Instance: /tb_core
|
### test 1: basic_test1 --> PASSED
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### test 1: basic_test1 --> PASSED
|
###########################################
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###########################################
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|
|
###########################################
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###########################################
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### Test Logs
|
### Test Logs
|
