Subversion Repositories sdram_controller

-- TODO: implement reset signal

-- TODO: implement reset signal

entity sdram_controller is

entity sdram_controller is

        port(      -- user facing signals 

        port(      -- user facing signals 

                 clk100mhz : in  std_logic;

                 clk100mhz : in  std_logic;

                     reset : in  std_logic;

                     reset : in  std_logic;

                        op : in  std_logic_vector(1 downto 0);        -- 00/11: NOP, 01: READ, 10: write

                        op : in  std_logic_vector(1 downto 0);        -- 00/11: NOP, 01: READ, 10: write

                      addr : in  std_logic_vector(25 downto 0);       -- address to read/write 

                      addr : in  std_logic_vector(25 downto 0);       -- address to read/write 

                    op_ack : out std_logic;                           -- op, addr and data_i should be captured when this goes high

                    op_ack : out std_logic;                           -- op, addr and data_i should be captured when this goes high

                    busy_n : out std_logic;                           -- busy when LOW, ops will be ignored until busy goes high again

                    busy_n : out std_logic;                           -- busy when LOW, ops will be ignored until busy goes high again

        dram_cs <= '0';

        dram_cs <= '0';

        data_o <= data1_o when addr_save(0) = '1' else data0_o;

        data_o <= data1_o when addr_save(0) = '1' else data0_o;

        -- capture addr, data_i and op for the cmd fsm

        -- capture addr, data_i and op for the cmd fsm

        -- op needs to be captured during AR or it might get dropped

        -- op needs to be captured during AR or it might get dropped

        begin

        begin

                if (cap_en = '1') then

                if (cap_en = '1') then

                        if (rising_edge(clk_000)) then

                        if (rising_edge(clk_000)) then

                                addr_save <= addr;

                                addr_save <= addr;

                                datai_save <= data_i;

                                datai_save <= data_i;