URL
https://opencores.org/ocsvn/sdram_controller/sdram_controller/trunk
[/] [sdram_controller/] [trunk/] [sdram_support.vhd] - Diff between revs 2 and 6
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 2 |
Rev 6 |
Line 679... |
Line 679... |
|
|
entity inout_switch_2 is
|
entity inout_switch_2 is
|
port (
|
port (
|
ioport : inout std_logic_vector(1 downto 0);
|
ioport : inout std_logic_vector(1 downto 0);
|
dir : in std_logic;
|
dir : in std_logic;
|
data_o : out std_logic_vector(1 downto 0);
|
|
data_i : in std_logic_vector(1 downto 0)
|
data_i : in std_logic_vector(1 downto 0)
|
);
|
);
|
end inout_switch_2;
|
end inout_switch_2;
|
|
|
architecture impl of inout_switch_2 is
|
architecture impl of inout_switch_2 is
|
begin
|
begin
|
data_o <= ioport when dir = '0' else "ZZ";
|
|
ioport <= data_i when dir = '1' else "ZZ";
|
ioport <= data_i when dir = '1' else "ZZ";
|
end impl;
|
end impl;
|
|
|
|
|
library IEEE;
|
library IEEE;
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.