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\usepackage{import}
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\usepackage{import}
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\usepackage{bytefield}
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\usepackage{bytefield}
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\project{SDSPI Controller}
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\project{SDSPI Controller}
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\title{Specification}
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\title{Specification}
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\author{Dan Gisselquist, Ph.D.}
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\author{Dan Gisselquist, Ph.D.}
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\email{dgisselq (at) opencores.org}
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\email{dgisselq (at) ieee.org}
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\revision{Rev.~0.1}
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\revision{Rev.~0.1}
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\begin{document}
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\begin{document}
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\pagestyle{gqtekspecplain}
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\pagestyle{gqtekspecplain}
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\titlepage
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\titlepage
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\begin{license}
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\begin{license}
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The first step in any start up sequence is to clear the card from any
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The first step in any start up sequence is to clear the card from any
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prior condition. Hence we wait for the card to be no longer busy (it
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prior condition. Hence we wait for the card to be no longer busy (it
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shouldn't be busy anyway), and we then clear any errors:
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shouldn't be busy anyway), and we then clear any errors:
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\begin{tabbing}
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\begin{tabbing}
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{\tt SD\_WAIT\_WHILE\_BUSY;} \\
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{\tt SD\_WAIT\_WHILE\_BUSY;} \\
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{\tt CMD} \= {\tt SD\_CLEARERR};
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{\tt CMD} \= {\tt = SD\_CLEARERR};
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\end{tabbing}
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\end{tabbing}
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Now that the controller is idle (which it should've been from startup anyway),
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Now that the controller is idle (which it should've been from startup anyway),
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we can now set up our interface. For this, we'll set our clock rate to 400~KHz.
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we can now set up our interface. For this, we'll set our clock rate to 400~KHz.
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The clock division register, sometimes erroneously called the speed, is found
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The clock division register, sometimes erroneously called the speed, is found
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command to complete. Further, since this command is going to read from our
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command to complete. Further, since this command is going to read from our
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FIFO, we need to include the {\tt SD\_FIFO\_OP} part of the command:
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FIFO, we need to include the {\tt SD\_FIFO\_OP} part of the command:
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\begin{tabbing}
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\begin{tabbing}
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{\tt int CSD[4];}\\
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{\tt int CSD[4];}\\
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{\tt DATA} \= {\tt = 0;} \\
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{\tt DATA} \= {\tt = 0;} \\
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{\tt CMD} \> {\tt = (SD\_FIFO\_OP|SD\_CMD)+9;}
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{\tt CMD} \> {\tt = (SD\_FIFO\_OP|SD\_CMD)+9;} \\
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{\tt SD\_WAIT\_WHILE\_BUSY;} \\
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{\tt SD\_WAIT\_WHILE\_BUSY;} \\
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{\tt for(int i=0; i<4; i++) } \\
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{\tt for(int i=0; i<4; i++) } \\
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\> {\tt CSD[i] = FIFO[0];}
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\> {\tt CSD[i] = FIFO[0];}
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\end{tabbing}
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\end{tabbing}
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Once the command is complete, we can read the four 32--bit words of the CSD
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Once the command is complete, we can read the four 32--bit words of the CSD
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