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https://opencores.org/ocsvn/sgmii/sgmii/trunk
[/] [sgmii/] [trunk/] [src/] [mReceive.v] - Diff between revs 3 and 5
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| Rev 3 |
Rev 5 |
| Line 144... |
Line 144... |
begin
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begin
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case(r21_State)
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case(r21_State)
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stWAIT_FOR_K: if(i_IsComma && i_RxEven) r21_NxtState <= stRX_K; else r21_NxtState<=stWAIT_FOR_K;
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stWAIT_FOR_K: if(i_IsComma && i_RxEven) r21_NxtState <= stRX_K; else r21_NxtState<=stWAIT_FOR_K;
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stRX_K : if(wSUDID21_5||wSUDID2_2)
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stRX_K : if(wSUDID21_5||wSUDID2_2)
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r21_NxtState <= stRX_CB; else
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r21_NxtState <= stRX_CB; else
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if((!i_RxCodeInvalid) && (!i_RxCodeCtrl) && i3_Xmit!=`cXmitDATA)
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if((!i_RxCodeInvalid) && (i_RxCodeCtrl) && i3_Xmit!=`cXmitDATA)
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r21_NxtState <= stRX_INVALID; else
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r21_NxtState <= stRX_INVALID; else
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if(((!i_RxCodeInvalid) && (!i_RxCodeCtrl) && i3_Xmit!=`cXmitDATA && i8_RxCodeGroupIn!=`D21_5 && i8_RxCodeGroupIn!=`D2_2)||
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if(((!i_RxCodeInvalid) && (!i_RxCodeCtrl) && i3_Xmit!=`cXmitDATA && i8_RxCodeGroupIn!=`D21_5 && i8_RxCodeGroupIn!=`D2_2)||
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((!i_RxCodeInvalid) && i3_Xmit==`cXmitDATA && ((i8_RxCodeGroupIn!=`D21_5 && i8_RxCodeGroupIn!=`D2_2 && (!i_RxCodeCtrl))||i_RxCodeCtrl)))
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((!i_RxCodeInvalid) && i3_Xmit==`cXmitDATA && ((i8_RxCodeGroupIn!=`D21_5 && i8_RxCodeGroupIn!=`D2_2 && (!i_RxCodeCtrl))||i_RxCodeCtrl)))
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r21_NxtState <= stIDLE_D; else
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r21_NxtState <= stIDLE_D; else
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r21_NxtState <= stRX_K;
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r21_NxtState <= stRX_K;
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