URL https://opencores.org/ocsvn/sgmii/sgmii/trunk

Subversion Repositories sgmii

[/] [sgmii/] [trunk/] [src/] [mSGMII.v] - Diff between revs 15 and 16

Rev 15	Rev 16
Line 1...	Line 1...
`/*`	`/*`
`Copyright � 2012 JeffLieu-lieumychuong@gmail.com`	`Copyright � 2012 JeffLieu-jefflieu@fpga-ipcores.com`

`This file is part of SGMII-IP-Core.`	`This file is part of SGMII-IP-Core.`
`SGMII-IP-Core is free software: you can redistribute it and/or modify`	`SGMII-IP-Core is free software: you can redistribute it and/or modify`
`it under the terms of the GNU General Public License as published by`	`it under the terms of the GNU General Public License as published by`
`the Free Software Foundation, either version 3 of the License, or`	`the Free Software Foundation, either version 3 of the License, or`
Line 359...	Line 359...
`.i_Clk (w_ClkSys ),`	`.i_Clk (w_ClkSys ),`
`.i_ARst_L (w_ARstLogic_L ));`	`.i_ARst_L (w_ARstLogic_L ));`

`assign w_SignalDetect=~w_RxCodeInvalid;`	`assign w_SignalDetect=~w_RxCodeInvalid;`

`/*mXcver u0Xcver(`	`/*mXcver #(.pXcverName("AltArriaV"))u0Xcver(`

`.i_SerRx (i_SerRx ),`	`.i_SerRx (i_SerRx ),`
`.o_SerTx (o_SerTx ),`	`.o_SerTx (o_SerTx ),`

`.i_RefClk125M (i_RefClk125M ),`	`.i_RefClk125M (i_RefClk125M ),`
`.o_TxClk (w_ClkSys ),`	`.o_TxClk (w_ClkSys ),`
`.i_CalClk (i_CalClk ),`	`.i_CalClk (i_RefClk125M ),`
`.i_GxBPwrDwn (w_GxBPowerDown ),`	`.i_GxBPwrDwn (w_GxBPowerDown ),`
`.i_XcverDigitalRst (~w_ARstLogic_L ),`	`.i_XcverDigitalRst (~w_ARstLogic_L ),`
`.o_PllLocked (w_PllLocked ),`	`.o_PllLocked (w_PllLocked ),`

`.o_SignalDetect (),`	`.o_SignalDetect (),`