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[/] [simple_fm_receiver/] [trunk/] [source/] [adder_16bit_u.vhdl] - Diff between revs 32 and 39

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Rev 32 Rev 39
Line 11... Line 11...
-- Synthesizers: 
-- Synthesizers: 
-- Target      : 
-- Target      : 
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Description : Ripple carry adder 16 bit with output 16 bit
-- Description : Ripple carry adder 16 bit with output 16 bit
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Copyright (C) 2004 Arif E. Nugroho
-- Copyright (C) 2004 Arif Endro Nugroho
-- This VHDL design file is an open design; you can redistribute it and/or
 
-- modify it and/or implement it after contacting the author
 
-------------------------------------------------------------------------------
 
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- 
-- 
--      THIS SOURCE FILE MAY BE USED AND DISTRIBUTED WITHOUT RESTRICTION
--      THIS SOURCE FILE MAY BE USED AND DISTRIBUTED WITHOUT RESTRICTION
-- PROVIDED THAT THIS COPYRIGHT STATEMENT IS NOT REMOVED FROM THE FILE AND THAT
-- PROVIDED THAT THIS COPYRIGHT STATEMENT IS NOT REMOVED FROM THE FILE AND THAT
-- ANY DERIVATIVE WORK CONTAINS THE ORIGINAL COPYRIGHT NOTICE AND THE
-- ANY DERIVATIVE WORK CONTAINS THE ORIGINAL COPYRIGHT NOTICE AND THE

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