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Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
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Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
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Copyright (c) 1995 AT&T Corp. All rights reserved.
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Copyright (c) 1995 AT&T Corp. All rights reserved.
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Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
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Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
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Copyright (c) 2001 Agere Systems All rights reserved.
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Copyright (c) 2001 Agere Systems All rights reserved.
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Copyright (c) 2002-2016 Lattice Semiconductor Corporation, All rights reserved.
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Copyright (c) 2002-2016 Lattice Semiconductor Corporation, All rights reserved.
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Tue Jan 17 01:36:43 2017
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Wed Jan 18 01:08:29 2017
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C:/lscc/diamond/3.8_x64/ispfpga\bin\nt64\par -f DisplayDriverwDecoder_impl1.p2t
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C:/lscc/diamond/3.8_x64/ispfpga\bin\nt64\par -f DisplayDriverwDecoder_impl1.p2t
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DisplayDriverwDecoder_impl1_map.ncd DisplayDriverwDecoder_impl1.dir
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DisplayDriverwDecoder_impl1_map.ncd DisplayDriverwDecoder_impl1.dir
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DisplayDriverwDecoder_impl1.prf -gui -msgset
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DisplayDriverwDecoder_impl1.prf -gui -msgset
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C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/promote.xml
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C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/promote.xml
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Line 15... |
Line 15... |
Preference file: DisplayDriverwDecoder_impl1.prf.
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Preference file: DisplayDriverwDecoder_impl1.prf.
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Level/ Number Worst Timing Worst Timing Run NCD
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Level/ Number Worst Timing Worst Timing Run NCD
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Cost [ncd] Unrouted Slack Score Slack(hold) Score(hold) Time Status
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Cost [ncd] Unrouted Slack Score Slack(hold) Score(hold) Time Status
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---------- -------- ----- ------ ----------- ----------- ---- ------
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---------- -------- ----- ------ ----------- ----------- ---- ------
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5_1 * 0 -1.238 7103 0.178 0 26 Complete
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5_1 * 0 -1.238 7103 0.178 0 25 Complete
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* : Design saved.
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* : Design saved.
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Total (real) run time for 1-seed: 26 secs
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Total (real) run time for 1-seed: 25 secs
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par done!
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par done!
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Lattice Place and Route Report for Design "DisplayDriverwDecoder_impl1_map.ncd"
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Lattice Place and Route Report for Design "DisplayDriverwDecoder_impl1_map.ncd"
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Tue Jan 17 01:36:43 2017
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Wed Jan 18 01:08:29 2017
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PAR: Place And Route Diamond (64-bit) 3.8.0.115.3.
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PAR: Place And Route Diamond (64-bit) 3.8.0.115.3.
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Command Line: par -w -l 5 -i 6 -t 1 -c 0 -e 0 -gui -msgset C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/promote.xml -exp parUseNBR=1:parCDP=auto:parCDR=1:parPathBased=OFF DisplayDriverwDecoder_impl1_map.ncd DisplayDriverwDecoder_impl1.dir/5_1.ncd DisplayDriverwDecoder_impl1.prf
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Command Line: par -w -l 5 -i 6 -t 1 -c 0 -e 0 -gui -msgset C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/promote.xml -exp parUseNBR=1:parCDP=auto:parCDR=1:parPathBased=OFF DisplayDriverwDecoder_impl1_map.ncd DisplayDriverwDecoder_impl1.dir/5_1.ncd DisplayDriverwDecoder_impl1.prf
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Preference file: DisplayDriverwDecoder_impl1.prf.
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Preference file: DisplayDriverwDecoder_impl1.prf.
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Placement level-cost: 5-1.
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Placement level-cost: 5-1.
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Routing Iterations: 6
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Routing Iterations: 6
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Loading design for application par from file DisplayDriverwDecoder_impl1_map.ncd.
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Loading design for application par from file DisplayDriverwDecoder_impl1_map.ncd.
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Design name: DisplayDriverWrapper
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Design name: display_driver_wrapper
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NCD version: 3.3
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NCD version: 3.3
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Vendor: LATTICE
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Vendor: LATTICE
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Device: LFE5UM5G-45F
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Device: LFE5UM5G-45F
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Package: CABGA381
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Package: CABGA381
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Performance: 8
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Performance: 8
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Line 49... |
Line 49... |
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Ignore Preference Error(s): True
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Ignore Preference Error(s): True
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Device utilization summary:
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Device utilization summary:
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PIO (prelim) 20/245 8% used
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PIO (prelim) 19/245 7% used
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20/203 9% bonded
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19/203 9% bonded
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IOLOGIC 1/245 <1% used
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IOLOGIC 1/245 <1% used
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SLICE 65/21924 <1% used
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SLICE 65/21924 <1% used
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GSR 1/1 100% used
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GSR 1/1 100% used
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Line 62... |
Line 62... |
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Number of Signals: 131
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Number of Signals: 131
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Number of Connections: 657
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Number of Connections: 657
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Pin Constraint Summary:
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Pin Constraint Summary:
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19 out of 19 pins locked (100% locked).
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18 out of 18 pins locked (100% locked).
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The following 1 signal is selected to use the primary clock routing resources:
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The following 1 signal is selected to use the primary clock routing resources:
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clk_c (driver: clk, clk/ce/sr load #: 9/0/0)
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clk_c (driver: clk, clk/ce/sr load #: 9/0/0)
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Line 122... |
Line 122... |
--------------- End of Clock Report ---------------
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--------------- End of Clock Report ---------------
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+
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+
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I/O Usage Summary (final):
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I/O Usage Summary (final):
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20 out of 245 (8.2%) PIO sites used.
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19 out of 245 (7.8%) PIO sites used.
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20 out of 203 (9.9%) bonded PIO sites used.
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19 out of 203 (9.4%) bonded PIO sites used.
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Number of PIO comps: 19; differential: 1.
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Number of PIO comps: 18; differential: 1.
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Number of Vref pins used: 0.
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Number of Vref pins used: 0.
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I/O Bank Usage Summary:
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I/O Bank Usage Summary:
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+----------+----------------+------------+------------+------------+
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+----------+----------------+------------+------------+------------+
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| I/O Bank | Usage | Bank Vccio | Bank Vref1 | Bank Vref2 |
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| I/O Bank | Usage | Bank Vccio | Bank Vref1 | Bank Vref2 |
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+----------+----------------+------------+------------+------------+
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+----------+----------------+------------+------------+------------+
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| 0 | 0 / 27 ( 0%) | - | - | - |
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| 0 | 0 / 27 ( 0%) | - | - | - |
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| 1 | 0 / 33 ( 0%) | - | - | - |
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| 1 | 0 / 33 ( 0%) | - | - | - |
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| 2 | 1 / 32 ( 3%) | 2.5V | - | - |
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| 2 | 1 / 32 ( 3%) | 2.5V | - | - |
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| 3 | 14 / 33 ( 42%) | 2.5V | - | - |
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| 3 | 14 / 33 ( 42%) | 2.5V | - | - |
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| 6 | 3 / 33 ( 9%) | 2.5V | - | - |
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| 6 | 2 / 33 ( 6%) | 1.2V | - | - |
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| 7 | 0 / 32 ( 0%) | - | - | - |
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| 7 | 0 / 32 ( 0%) | - | - | - |
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| 8 | 2 / 13 ( 15%) | 2.5V | - | - |
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| 8 | 2 / 13 ( 15%) | 2.5V | - | - |
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+----------+----------------+------------+------------+------------+
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+----------+----------------+------------+------------+------------+
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Total placer CPU time: 15 secs
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Total placer CPU time: 14 secs
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Dumping design to file DisplayDriverwDecoder_impl1.dir/5_1.ncd.
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Dumping design to file DisplayDriverwDecoder_impl1.dir/5_1.ncd.
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0 connections routed; 657 unrouted.
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0 connections routed; 657 unrouted.
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Starting router resource preassignment
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Starting router resource preassignment
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Completed router resource preassignment. Real time: 23 secs
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Completed router resource preassignment. Real time: 22 secs
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Start NBR router at 01:37:06 01/17/17
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Start NBR router at 01:08:51 01/18/17
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*****************************************************************
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*****************************************************************
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Info: NBR allows conflicts(one node used by more than one signal)
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Info: NBR allows conflicts(one node used by more than one signal)
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in the earlier iterations. In each iteration, it tries to
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in the earlier iterations. In each iteration, it tries to
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solve the conflicts while keeping the critical connections
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solve the conflicts while keeping the critical connections
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Line 164... |
Line 164... |
worst slack and total negative slack may not be the same as
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worst slack and total negative slack may not be the same as
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that in TRCE report. You should always run TRCE to verify
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that in TRCE report. You should always run TRCE to verify
|
your design.
|
your design.
|
*****************************************************************
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*****************************************************************
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Start NBR special constraint process at 01:37:06 01/17/17
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Start NBR special constraint process at 01:08:52 01/18/17
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Start NBR section for initial routing at 01:37:06 01/17/17
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Start NBR section for initial routing at 01:08:52 01/18/17
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Level 1, iteration 1
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Level 1, iteration 1
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0(0.00%) conflict; 544(82.80%) untouched conns; 8380 (nbr) score;
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0(0.00%) conflict; 544(82.80%) untouched conns; 8380 (nbr) score;
|
Estimated worst slack/total negative slack: -1.227ns/-8.380ns; real time: 24 secs
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Estimated worst slack/total negative slack: -1.227ns/-8.380ns; real time: 23 secs
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Level 2, iteration 1
|
Level 2, iteration 1
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0(0.00%) conflict; 542(82.50%) untouched conns; 8800 (nbr) score;
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0(0.00%) conflict; 542(82.50%) untouched conns; 8800 (nbr) score;
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 23 secs
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Level 3, iteration 1
|
Level 3, iteration 1
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0(0.00%) conflict; 523(79.60%) untouched conns; 8800 (nbr) score;
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0(0.00%) conflict; 523(79.60%) untouched conns; 8800 (nbr) score;
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 23 secs
|
Level 4, iteration 1
|
Level 4, iteration 1
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5(0.00%) conflicts; 0(0.00%) untouched conn; 8800 (nbr) score;
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5(0.00%) conflicts; 0(0.00%) untouched conn; 8800 (nbr) score;
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 23 secs
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|
|
Info: Initial congestion level at 75% usage is 0
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Info: Initial congestion level at 75% usage is 0
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Info: Initial congestion area at 75% usage is 0 (0.00%)
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Info: Initial congestion area at 75% usage is 0 (0.00%)
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Start NBR section for normal routing at 01:37:07 01/17/17
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Start NBR section for normal routing at 01:08:53 01/18/17
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Level 1, iteration 1
|
Level 1, iteration 1
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0(0.00%) conflict; 8(1.22%) untouched conns; 8800 (nbr) score;
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0(0.00%) conflict; 8(1.22%) untouched conns; 8800 (nbr) score;
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
Level 2, iteration 1
|
Level 2, iteration 1
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0(0.00%) conflict; 8(1.22%) untouched conns; 8800 (nbr) score;
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0(0.00%) conflict; 8(1.22%) untouched conns; 8800 (nbr) score;
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Line 197... |
Line 197... |
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
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Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
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Level 4, iteration 1
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Level 4, iteration 1
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0(0.00%) conflict; 0(0.00%) untouched conn; 8800 (nbr) score;
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0(0.00%) conflict; 0(0.00%) untouched conn; 8800 (nbr) score;
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
|
|
Start NBR section for performance tuning (iteration 1) at 01:37:07 01/17/17
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Start NBR section for performance tuning (iteration 1) at 01:08:53 01/18/17
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Level 4, iteration 1
|
Level 4, iteration 1
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0(0.00%) conflict; 0(0.00%) untouched conn; 8800 (nbr) score;
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0(0.00%) conflict; 0(0.00%) untouched conn; 8800 (nbr) score;
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
|
|
Start NBR section for re-routing at 01:37:07 01/17/17
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Start NBR section for re-routing at 01:08:53 01/18/17
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Level 4, iteration 1
|
Level 4, iteration 1
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0(0.00%) conflict; 0(0.00%) untouched conn; 8800 (nbr) score;
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0(0.00%) conflict; 0(0.00%) untouched conn; 8800 (nbr) score;
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
Estimated worst slack/total negative slack: -1.238ns/-8.800ns; real time: 24 secs
|
|
|
Start NBR section for post-routing at 01:37:07 01/17/17
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Start NBR section for post-routing at 01:08:53 01/18/17
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|
|
End NBR router with 0 unrouted connection
|
End NBR router with 0 unrouted connection
|
|
|
NBR Summary
|
NBR Summary
|
-----------
|
-----------
|