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body,pre{
font-family:'Courier New', monospace;
color: #000000;
font-size:88%;
background-color: #ffffff;
}
h1 {
font-weight: bold;
margin-top: 24px;
margin-bottom: 10px;
border-bottom: 3px solid #000; font-size: 1em;
}
h2 {
font-weight: bold;
margin-top: 18px;
margin-bottom: 5px;
font-size: 0.90em;
}
h3 {
font-weight: bold;
margin-top: 12px;
margin-bottom: 5px;
font-size: 0.80em;
}
p {
font-size:78%;
}
P.Table {
margin-top: 4px;
margin-bottom: 4px;
margin-right: 4px;
margin-left: 4px;
}
table
{
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
border-collapse: collapse;
}
th {
font-weight:bold;
padding: 4px;
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
vertical-align:top;
text-align:left;
font-size:78%;
}
td {
padding: 4px;
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
vertical-align:top;
font-size:78%;
}
a {
color:#013C9A;
text-decoration:none;
}
a:visited {
color:#013C9A;
}
a:hover, a:active {
text-decoration:underline;
color:#5BAFD4;
}
.pass
{
background-color: #00ff00;
}
.fail
{
background-color: #ff0000;
}
.comment
{
font-size: 90%;
font-style: italic;
}
|
body,pre{
font-family:'Courier New', monospace;
color: #000000;
font-size:88%;
background-color: #ffffff;
}
h1 {
font-weight: bold;
margin-top: 24px;
margin-bottom: 10px;
border-bottom: 3px solid #000; font-size: 1em;
}
h2 {
font-weight: bold;
margin-top: 18px;
margin-bottom: 5px;
font-size: 0.90em;
}
h3 {
font-weight: bold;
margin-top: 12px;
margin-bottom: 5px;
font-size: 0.80em;
}
p {
font-size:78%;
}
P.Table {
margin-top: 4px;
margin-bottom: 4px;
margin-right: 4px;
margin-left: 4px;
}
table
{
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
border-collapse: collapse;
}
th {
font-weight:bold;
padding: 4px;
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
vertical-align:top;
text-align:left;
font-size:78%;
}
td {
padding: 4px;
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
vertical-align:top;
font-size:78%;
}
a {
color:#013C9A;
text-decoration:none;
}
a:visited {
color:#013C9A;
}
a:hover, a:active {
text-decoration:underline;
color:#5BAFD4;
}
.pass
{
background-color: #00ff00;
}
.fail
{
background-color: #ff0000;
}
.comment
{
font-size: 90%;
font-style: italic;
}
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-->
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-->
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</STYLE>
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</STYLE>
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</HEAD>
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</HEAD>
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<PRE><A name="Mrp"></A>
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<PRE><A name="Mrp"></A>
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Lattice Mapping Report File for Design Module 'DisplayDriverWrapper'
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Lattice Mapping Report File for Design Module 'display_driver_wrapper'
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<A name="mrp_di"></A><B><U><big>Design Information</big></U></B>
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<A name="mrp_di"></A><B><U><big>Design Information</big></U></B>
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Line 23... |
Line 23... |
decoder/Project/Lattice_FPGA_Build/promote.xml
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decoder/Project/Lattice_FPGA_Build/promote.xml
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Target Vendor: LATTICE
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Target Vendor: LATTICE
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Target Device: LFE5UM5G-45FCABGA381
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Target Device: LFE5UM5G-45FCABGA381
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Target Performance: 8
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Target Performance: 8
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Mapper: sa5p00g, version: Diamond (64-bit) 3.8.0.115.3
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Mapper: sa5p00g, version: Diamond (64-bit) 3.8.0.115.3
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Mapped on: 01/17/17 01:36:37
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Mapped on: 01/18/17 01:08:21
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<A name="mrp_ds"></A><B><U><big>Design Summary</big></U></B>
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<A name="mrp_ds"></A><B><U><big>Design Summary</big></U></B>
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Number of registers: 13 out of 44457 (0%)
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Number of registers: 13 out of 44457 (0%)
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PFU registers: 12 out of 43848 (0%)
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PFU registers: 12 out of 43848 (0%)
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Line 39... |
Line 39... |
Number of LUT4s: 127 out of 43848 (0%)
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Number of LUT4s: 127 out of 43848 (0%)
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Number used as logic LUTs: 117
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Number used as logic LUTs: 117
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Number used as distributed RAM: 0
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Number used as distributed RAM: 0
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Number used as ripple logic: 10
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Number used as ripple logic: 10
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Number used as shift registers: 0
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Number used as shift registers: 0
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Number of PIO sites used: 20 out of 203 (10%)
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Number of PIO sites used: 19 out of 203 (9%)
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Number of PIO sites used for single ended IOs: 18
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Number of PIO sites used for single ended IOs: 17
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Number of PIO sites used for differential IOs: 2 (represented by 1 PIO
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Number of PIO sites used for differential IOs: 2 (represented by 1 PIO
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comps in NCD)
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comps in NCD)
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Number of block RAMs: 0 out of 108 (0%)
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Number of block RAMs: 0 out of 108 (0%)
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Number of GSRs: 1 out of 1 (100%)
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Number of GSRs: 1 out of 1 (100%)
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JTAG used : No
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JTAG used : No
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Line 114... |
Line 114... |
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<A name="mrp_dwe"></A><B><U><big>Design Errors/Warnings</big></U></B>
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<A name="mrp_dwe"></A><B><U><big>Design Errors/Warnings</big></U></B>
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WARNING - map: C:/Projects/single-14-segment-display-driver-w-decoder/Project/La
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WARNING - map: C:/Projects/single-14-segment-display-driver-w-decoder/Project/La
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ttice_FPGA_Build/DisplayDriverwDecoder.lpf(21): Semantic error in "USERCODE
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ttice_FPGA_Build/DisplayDriverwDecoder.lpf(29): Semantic error in "USERCODE
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ASCII "G.L." ; ": Invalid Ascii char <.>.Invalid Ascii char <.>.. This
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ASCII "G.L." ; ": Invalid Ascii char <.>.Invalid Ascii char <.>.. This
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preference has been disabled.
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preference has been disabled.
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WARNING - map: Preference parsing results: 1 semantic error detected.
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WARNING - map: Preference parsing results: 1 semantic error detected.
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WARNING - map: Using local reset signal 'n_rst_c' to infer global GSR net.
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WARNING - map: Using local reset signal 'n_rst_c' to infer global GSR net.
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WARNING - map: There are semantic errors in the preference file C:/Projects/sing
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WARNING - map: There are semantic errors in the preference file C:/Projects/sing
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Line 133... |
Line 133... |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| IO Name | Direction | Levelmode | IO |
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| IO Name | Direction | Levelmode | IO |
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| | | IO_TYPE | Register |
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| | | IO_TYPE | Register |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[0] | OUTPUT | LVCMOS25 | |
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| disp_data_q[0] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| clk | INPUT | LVDS | |
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| clk | INPUT | LVDS | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_sel | OUTPUT | LVCMOS25 | |
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| disp_data_q[14] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[14] | OUTPUT | LVCMOS25 | |
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| disp_data_q[13] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[13] | OUTPUT | LVCMOS25 | |
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| disp_data_q[12] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[12] | OUTPUT | LVCMOS25 | |
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| disp_data_q[11] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[11] | OUTPUT | LVCMOS25 | |
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| disp_data_q[10] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[10] | OUTPUT | LVCMOS25 | |
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| disp_data_q[9] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[9] | OUTPUT | LVCMOS25 | |
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| disp_data_q[8] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[8] | OUTPUT | LVCMOS25 | |
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| disp_data_q[7] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[7] | OUTPUT | LVCMOS25 | |
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| disp_data_q[6] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[6] | OUTPUT | LVCMOS25 | |
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| disp_data_q[5] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[5] | OUTPUT | LVCMOS25 | |
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| disp_data_q[4] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[4] | OUTPUT | LVCMOS25 | |
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| disp_data_q[3] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[3] | OUTPUT | LVCMOS25 | |
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| disp_data_q[2] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| disp_data[2] | OUTPUT | LVCMOS25 | |
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| disp_data_q[1] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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| disp_data[1] | OUTPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| button | INPUT | LVCMOS25 | IN |
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| button | INPUT | LVCMOS25 | IN |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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| n_rst | INPUT | LVCMOS25 | |
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| n_rst | INPUT | LVCMOS25 | |
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+---------------------+-----------+-----------+------------+
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+---------------------+-----------+-----------+------------+
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<A name="mrp_rm"></A><B><U><big>Removed logic</big></U></B>
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<A name="mrp_rm"></A><B><U><big>Removed logic</big></U></B>
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Block GND undriven or does not drive anything - clipped.
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Signal n_rst_c_i was merged into signal n_rst_c
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Signal n_rst_c_i was merged into signal n_rst_c
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Signal GND undriven or does not drive anything - clipped.
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Signal VCC undriven or does not drive anything - clipped.
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Signal VCC undriven or does not drive anything - clipped.
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Signal symbol_scan_cntr_cry_0_S0[0] undriven or does not drive anything -
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Signal symbol_scan_cntr_cry_0_S0[0] undriven or does not drive anything -
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clipped.
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clipped.
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Signal N_1 undriven or does not drive anything - clipped.
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Signal N_1 undriven or does not drive anything - clipped.
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Signal symbol_scan_cntr_s_0_S1[7] undriven or does not drive anything - clipped.
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Signal symbol_scan_cntr_s_0_S1[7] undriven or does not drive anything - clipped.
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Signal symbol_scan_cntr_s_0_COUT[7] undriven or does not drive anything -
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Signal symbol_scan_cntr_s_0_COUT[7] undriven or does not drive anything -
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clipped.
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clipped.
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Block n_rst_pad_RNIQVTF was optimized away.
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Block n_rst_pad_RNIQVTF was optimized away.
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Block GND was optimized away.
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Block VCC was optimized away.
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Block VCC was optimized away.
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<A name="mrp_mem"></A><B><U><big>Memory Usage</big></U></B>
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<A name="mrp_mem"></A><B><U><big>Memory Usage</big></U></B>
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Line 236... |
Line 233... |
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<A name="mrp_runtime"></A><B><U><big>Run Time and Memory Usage</big></U></B>
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<A name="mrp_runtime"></A><B><U><big>Run Time and Memory Usage</big></U></B>
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-------------------------
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-------------------------
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Total CPU Time: 1 secs
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Total CPU Time: 1 secs
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Total REAL Time: 2 secs
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Total REAL Time: 3 secs
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Peak Memory Usage: 152 MB
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Peak Memory Usage: 152 MB
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