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Line 2... |
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1101672
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1101672
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Warning
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Warning
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C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/DisplayDriverwDecoder.lpf(21): Semantic error in "USERCODE ASCII "G.L." ; ":
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C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/DisplayDriverwDecoder.lpf(29): Semantic error in "USERCODE ASCII "G.L." ; ":
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Invalid Ascii char <.>.Invalid Ascii char <.>.
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Invalid Ascii char <.>.Invalid Ascii char <.>.
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C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/DisplayDriverwDecoder.lpf
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C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/DisplayDriverwDecoder.lpf
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21
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29
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1104062
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1104062
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Warning
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Warning
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| Line 167... |
Line 167... |
Info
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Info
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2019991
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2019991
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Warning
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Warning
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CD638 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":38:11:38:15|Signal empty is undriven. Either assign the signal a value or remove the signal declaration.
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CD638 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd":42:11:42:19|Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.
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CD638
|
CD638
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C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd
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C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd
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38
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42
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11
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11
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38
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42
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15
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Signal empty is undriven. Either assign the signal a value or remove the signal declaration.
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2019991
|
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Warning
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CD638 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd":53:11:53:19|Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.
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CD638
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C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd
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53
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11
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53
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19
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19
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Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.
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Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.
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2019991
|
2019991
|
Warning
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Warning
|
CL169 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":54:4:54:5|Pruning unused register bttn_state_5. Make sure that there are no unused intermediate registers.
|
MT529 :"c:\projects\single-14-segment-display-driver-w-decoder\project\sources\display_driver_wrapper.vhd":52:8:52:9|Found inferred clock display_driver_wrapper|clk which controls 5 sequential elements including bttn_state. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance.
|
CL169
|
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C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd
|
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54
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|
4
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54
|
|
5
|
|
Pruning unused register bttn_state_5. Make sure that there are no unused intermediate registers.
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2019991
|
|
Warning
|
|
CL169 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":54:4:54:5|Pruning unused register bttn_state_fifo_5(3 downto 0). Make sure that there are no unused intermediate registers.
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CL169
|
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C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd
|
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54
|
|
4
|
|
54
|
|
5
|
|
Pruning unused register bttn_state_fifo_5(3 downto 0). Make sure that there are no unused intermediate registers.
|
|
|
|
|
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2019991
|
|
Warning
|
|
MT529 :"c:\projects\single-14-segment-display-driver-w-decoder\project\sources\displaydriverwrapper.vhd":74:4:74:5|Found inferred clock DisplayDriverWrapper|button which controls 8 sequential elements including symbol_scan_cntr[7:0]. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance.
|
|
MT529
|
MT529
|
c:\projects\single-14-segment-display-driver-w-decoder\project\sources\displaydriverwrapper.vhd
|
c:\projects\single-14-segment-display-driver-w-decoder\project\sources\display_driver_wrapper.vhd
|
74
|
52
|
4
|
8
|
74
|
52
|
5
|
9
|
Found inferred clock DisplayDriverWrapper|button which controls 8 sequential elements including symbol_scan_cntr[7:0]. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance.
|
Found inferred clock display_driver_wrapper|clk which controls 5 sequential elements including bttn_state. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance.
|
|
|
|
|
2019993
|
2019993
|
Warning
|
Warning
|
MT420 |Found inferred clock DisplayDriverWrapper|button with period 2.25ns. Please declare a user-defined clock on object "p:button"
|
MT420 |Found inferred clock display_driver_wrapper|clk with period 2.30ns. Please declare a user-defined clock on object "p:clk"
|
MT420
|
MT420
|
Found inferred clock DisplayDriverWrapper|button with period 2.25ns. Please declare a user-defined clock on object "p:button"
|
Found inferred clock display_driver_wrapper|clk with period 2.30ns. Please declare a user-defined clock on object "p:clk"
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No newline at end of file
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No newline at end of file
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