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Line 4... |
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#project files
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#project files
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add_file -vhdl -lib work "C:/lscc/diamond/3.8_x64/cae_library/synthesis/vhdl/ecp5um.vhd"
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add_file -vhdl -lib work "C:/lscc/diamond/3.8_x64/cae_library/synthesis/vhdl/ecp5um.vhd"
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add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverwDecoder_Top.vhd"
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add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverwDecoder_Top.vhd"
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add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverWrapper.vhd"
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add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverWrapper.vhd"
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add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ASCIIDecoder.vhd"
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add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd"
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#implementation: "impl1"
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#implementation: "impl1"
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impl -add impl1 -type fpga
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impl -add impl1 -type fpga
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#
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#
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#implementation attributes
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#implementation attributes
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set_option -vlog_std v2001
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set_option -vlog_std sysv
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set_option -project_relative_includes 1
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set_option -project_relative_includes 1
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#device options
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#device options
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set_option -technology ECP5UM5G
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set_option -technology ECP5UM5G
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set_option -part LFE5UM5G_45F
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set_option -part LFE5UM5G_45F
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set_option -package BG381C
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set_option -package BG381C
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set_option -speed_grade -8
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set_option -speed_grade -8
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set_option -part_companion ""
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set_option -part_companion ""
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#compilation/mapping options
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#compilation/mapping options
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set_option -top_module "DisplayDriverWrapper"
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# hdl_compiler_options
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# hdl_compiler_options
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set_option -distributed_compile 0
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set_option -distributed_compile 0
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# mapper_without_write_options
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# mapper_without_write_options
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Line 38... |
Line 39... |
# mapper_options
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# mapper_options
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set_option -write_verilog 0
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set_option -write_verilog 0
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set_option -write_vhdl 0
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set_option -write_vhdl 0
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# Lattice XP
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# Lattice XP
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set_option -maxfan 1000
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set_option -maxfan 100
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set_option -disable_io_insertion 0
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set_option -disable_io_insertion 0
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set_option -retiming 0
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set_option -retiming 0
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set_option -pipe 1
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set_option -pipe 1
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set_option -forcegsr false
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set_option -forcegsr no
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set_option -fix_gated_and_generated_clocks 1
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set_option -fix_gated_and_generated_clocks 1
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set_option -rw_check_on_ram 1
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set_option -rw_check_on_ram 1
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set_option -update_models_cp 0
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set_option -update_models_cp 0
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set_option -syn_edif_array_rename 1
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set_option -syn_edif_array_rename 1
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set_option -Write_declared_clocks_only 1
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set_option -Write_declared_clocks_only 1
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Line 67... |
Line 68... |
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#automatic place and route (vendor) options
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#automatic place and route (vendor) options
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set_option -write_apr_constraint 1
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set_option -write_apr_constraint 1
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#set result format/file last
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#set result format/file last
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project -result_file "./DisplayDriverwDecoder_impl1.edi"
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project -result_file "./impl1.edi"
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#set log file
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set_option log_file "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/impl1/DisplayDriverwDecoder_impl1.srf"
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impl -active "impl1"
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impl -active "impl1"
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