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URL https://opencores.org/ocsvn/single-14-segment-display-driver-w-decoder/single-14-segment-display-driver-w-decoder/trunk

Subversion Repositories single-14-segment-display-driver-w-decoder

[/] [single-14-segment-display-driver-w-decoder/] [trunk/] [Project/] [Lattice_FPGA_Build/] [impl1/] [synlog/] [impl1_compiler.srr] - Diff between revs 6 and 9

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Rev 6 Rev 9
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Synopsys VHDL Compiler, version comp2016q2rc, Build 192R, built Jul  5 2016
Synopsys VHDL Compiler, version comp2016q2rc, Build 192R, built Jul  5 2016
@N|Running in 64-bit mode
@N|Running in 64-bit mode
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
 
 
@N: CD720 :"C:\lscc\diamond\3.8_x64\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N: CD720 :"C:\lscc\diamond\3.8_x64\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N:"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":15:7:15:26|Top entity is set to DisplayDriverWrapper.
@N:"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd":15:7:15:26|Top entity is set to DisplayDriverWrapper.
Options changed - recompiling
File C:\lscc\diamond\3.8_x64\synpbase\lib\lucent\ecp5um.vhd changed - recompiling
 
File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd changed - recompiling
 
File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd changed - recompiling
 
File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd changed - recompiling
VHDL syntax check successful!
VHDL syntax check successful!
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":15:7:15:26|Synthesizing work.displaydriverwrapper.arch.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd":15:7:15:26|Synthesizing work.displaydriverwrapper.arch.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd":16:7:16:31|Synthesizing work.displaydriverwdecoder_top.arch.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd":17:7:17:30|Synthesizing work.display_driver_w_decoder.display_driver_w_decoder_arch.
@W: CD638 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd":53:11:53:19|Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.
@W: CD638 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd":47:11:47:19|Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd":15:7:15:18|Synthesizing work.asciidecoder.arch.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ascii_decoder.vhd":15:7:15:18|Synthesizing work.asciidecoder.arch.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\Decoding_Table\ROM_ASCII_Decoder\DistRomAsciiDecoder\DistRomAsciiDecoder\DistRomAsciiDecoder.vhd":12:7:12:25|Synthesizing work.distromasciidecoder.structure.
@N: CD630 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\Decoding_Table\ROM_ASCII_Decoder\DistRomAsciiDecoder\DistRomAsciiDecoder\DistRomAsciiDecoder.vhd":12:7:12:25|Synthesizing work.distromasciidecoder.structure.
@N: CD630 :"C:\lscc\diamond\3.8_x64\cae_library\synthesis\vhdl\ecp5um.vhd":801:10:801:18|Synthesizing work.rom128x1a.syn_black_box.
@N: CD630 :"C:\lscc\diamond\3.8_x64\cae_library\synthesis\vhdl\ecp5um.vhd":801:10:801:18|Synthesizing work.rom128x1a.syn_black_box.
Post processing for work.rom128x1a.syn_black_box
Post processing for work.rom128x1a.syn_black_box
Post processing for work.distromasciidecoder.structure
Post processing for work.distromasciidecoder.structure
Post processing for work.asciidecoder.arch
Post processing for work.asciidecoder.arch
Post processing for work.displaydriverwdecoder_top.arch
Post processing for work.display_driver_w_decoder.display_driver_w_decoder_arch
Post processing for work.displaydriverwrapper.arch
Post processing for work.displaydriverwrapper.arch
@N: CL159 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd":17:8:17:10|Input clk is unused.
@N: CL159 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ascii_decoder.vhd":17:8:17:10|Input clk is unused.
@N: CL159 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd":18:8:18:12|Input reset is unused.
@N: CL159 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ascii_decoder.vhd":18:8:18:12|Input reset is unused.
@N: CL159 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd":29:8:29:12|Input wr_en is unused.
@N: CL159 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd":23:8:23:12|Input wr_en is unused.
 
 
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB)
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB)
 
 
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
 
 
Process completed successfully.
Process completed successfully.
# Tue Jan 17 01:29:36 2017
# Tue Jan 17 23:41:20 2017
 
 
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Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul  5 2016
Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul  5 2016
@N|Running in 64-bit mode
@N|Running in 64-bit mode
File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\layer0.srs changed - recompiling
File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\layer0.srs changed - recompiling
@N: NF107 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":15:7:15:26|Selected library: work cell: DisplayDriverWrapper view arch as top level
@N: NF107 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd":15:7:15:26|Selected library: work cell: DisplayDriverWrapper view arch as top level
@N: NF107 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd":15:7:15:26|Selected library: work cell: DisplayDriverWrapper view arch as top level
@N: NF107 :"C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd":15:7:15:26|Selected library: work cell: DisplayDriverWrapper view arch as top level
 
 
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
 
 
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
 
 
Process completed successfully.
Process completed successfully.
# Tue Jan 17 01:29:36 2017
# Tue Jan 17 23:41:20 2017
 
 
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@END
@END
 
 
At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)
At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)
 
 
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
 
 
Process completed successfully.
Process completed successfully.
# Tue Jan 17 01:29:36 2017
# Tue Jan 17 23:41:20 2017
 
 
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