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URL https://opencores.org/ocsvn/single-14-segment-display-driver-w-decoder/single-14-segment-display-driver-w-decoder/trunk

Subversion Repositories single-14-segment-display-driver-w-decoder

[/] [single-14-segment-display-driver-w-decoder/] [trunk/] [Project/] [Lattice_FPGA_Build/] [impl1/] [synlog/] [report/] [DisplayDriverwDecoder_impl1_fpga_mapper_notes.txt] - Diff between revs 6 and 9

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Rev 6 Rev 9
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@N: MF248 |Running in 64-bit mode.
 
@N: MF248 |Running in 64-bit mode.
 
@N: MF666 |Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)
 
@N: MF666 |Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)
 
@N: MT206 |Auto Constrain mode is enabled
 
@N: MT206 |Auto Constrain mode is enabled
 
@N: FX271 :"c:\projects\single-14-segment-display-driver-w-decoder\project\sources\displaydriverwrapper.vhd":74:4:74:5|Replicating instance symbol_scan_cntr[0] (in view: work.DisplayDriverWrapper(arch)) with 15 loads 1 time to improve timing.
 
 
 
@N: FX164 |The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute.
 
@N: FX164 |The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute.
 
 
 
@N: MT611 :|Automatically generated clock display_driver_wrapper|bttn_state_derived_clock is not used and is being removed
 
@N: FX1056 |Writing EDF file: C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\DisplayDriverwDecoder_impl1.edi
 
@N: FX1056 |Writing EDF file: C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\DisplayDriverwDecoder_impl1.edi
 
@N: BW106 |Synplicity Constraint File capacitance units using default value of 1pF
 
@N: BW106 |Synplicity Constraint File capacitance units using default value of 1pF
 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
 
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
 
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.

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