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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#performanceSummary10" target="srrFrame" title="">Performance Summary</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#performanceSummary10" target="srrFrame" title="">Performance Summary</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#clockRelationships11" target="srrFrame" title="">Clock Relationships</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#clockRelationships11" target="srrFrame" title="">Clock Relationships</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#interfaceInfo12" target="srrFrame" title="">Interface Information</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#interfaceInfo12" target="srrFrame" title="">Interface Information</a> </li>
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<li><a href="file:///#" target="srrFrame" title="">Detailed Report for Clocks</a>
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<li><a href="file:///#" target="srrFrame" title="">Detailed Report for Clocks</a>
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<ul >
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#clockReport13" target="srrFrame" title="">Clock: DisplayDriverWrapper|button</a>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#clockReport13" target="srrFrame" title="">Clock: display_driver_wrapper|clk</a>
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<ul >
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<ul >
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#startingSlack14" target="srrFrame" title="">Starting Points with Worst Slack</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#startingSlack14" target="srrFrame" title="">Starting Points with Worst Slack</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#endingSlack15" target="srrFrame" title="">Ending Points with Worst Slack</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#endingSlack15" target="srrFrame" title="">Ending Points with Worst Slack</a> </li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#worstPaths16" target="srrFrame" title="">Worst Path Information</a> </li></ul></li></ul></li></ul></li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#worstPaths16" target="srrFrame" title="">Worst Path Information</a> </li></ul></li></ul></li></ul></li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#resourceUsage17" target="srrFrame" title="">Resource Utilization</a> </li></ul></li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\syntmp\DisplayDriverwDecoder_impl1_srr.htm#resourceUsage17" target="srrFrame" title="">Resource Utilization</a> </li></ul></li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\DisplayDriverwDecoder_impl1_cck.rpt" target="srrFrame" title="">Constraint Checker Report (01:19 17-Jan)</a> </li></ul></li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\DisplayDriverwDecoder_impl1_cck.rpt" target="srrFrame" title="">Constraint Checker Report (01:08 18-Jan)</a> </li></ul></li>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\stdout.log" target="srrFrame" title="">Session Log (01:19 17-Jan)</a>
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<li><a href="file:///C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\stdout.log" target="srrFrame" title="">Session Log (01:08 18-Jan)</a>
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<ul ></ul></li> </ul>
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<ul ></ul></li> </ul>
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</li>
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</li>
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</ul>
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</ul>
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<script type="text/javascript"> reportLogObj.generateLog("impl1-menu")</script>
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<script type="text/javascript"> reportLogObj.generateLog("impl1-menu")</script>
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